| commit | ddee87f208b6229d2910dd5930c87089dc56c87e | |
| author | Will Deacon <will.deacon@arm.com> | |
| Thu, 25 Feb 2010 14:04:14 +0000 (25 15:04 +0100) | ||
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | |
| Sat, 13 Mar 2010 10:50:28 +0000 (13 10:50 +0000) | ||
| tree | 88cc9fcbe85243dbfd5bb4d988f78268431b16f3 | treesnapshot (tar.gz zip) |
| parent | a91ed072d6135926c296a42b0b46de35e6347845 | commitdiff |
ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING
If IRQ balancing is used on a multicore ARM system, PMU interrupt
lines may be relocated onto CPUs other than the one causing the
counter overflow. This can result in misattribution of events to
the wrong core and, in the case that the CPU handling the interrupt
has not experience counter overflow, the interrupt can be disabled
because the handler returns IRQ_NONE.
This patch adds the IRQF_NOBALANCING flag to the request_irq call
in perf_events.c.
Acked-by: Jamie Iles <jamie.iles@picochip.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
If IRQ balancing is used on a multicore ARM system, PMU interrupt
lines may be relocated onto CPUs other than the one causing the
counter overflow. This can result in misattribution of events to
the wrong core and, in the case that the CPU handling the interrupt
has not experience counter overflow, the interrupt can be disabled
because the handler returns IRQ_NONE.
This patch adds the IRQF_NOBALANCING flag to the request_irq call
in perf_events.c.
Acked-by: Jamie Iles <jamie.iles@picochip.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| arch/arm/kernel/perf_event.c | diffblobblamehistory |