| commit | b3ec0a37a7907813bb4fb85a2d94102c152470b7 | |
| author | Suresh Siddha <suresh.b.siddha@intel.com> | |
| Mon, 26 Oct 2009 22:24:35 +0000 (26 14:24 -0800) | ||
| committer | Ingo Molnar <mingo@elte.hu> | |
| Mon, 2 Nov 2009 14:56:36 +0000 (2 15:56 +0100) | ||
| tree | aec7a1de95df7b05231f52608899ca34d48f5105 | treesnapshot (tar.gz zip) |
| parent | a5e74b841930bec78a4684ab9f208b2ddfe7c736 | commitdiff |
x86: Use EOI register in io-apic on intel platforms
IO-APIC's in intel chipsets support EOI register starting from
IO-APIC version 2. Use that when ever we need to clear the
IO-APIC RTE's RemoteIRR bit explicitly.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Acked-by: Gary Hade <garyhade@us.ibm.com>
Cc: Eric W. Biederman <ebiederm@xmission.com>
LKML-Reference: <20091026230001.947855317@sbs-t61.sc.intel.com>
[ Marked use_eio_reg as __read_mostly, fixed small details ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
IO-APIC's in intel chipsets support EOI register starting from
IO-APIC version 2. Use that when ever we need to clear the
IO-APIC RTE's RemoteIRR bit explicitly.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Acked-by: Gary Hade <garyhade@us.ibm.com>
Cc: Eric W. Biederman <ebiederm@xmission.com>
LKML-Reference: <20091026230001.947855317@sbs-t61.sc.intel.com>
[ Marked use_eio_reg as __read_mostly, fixed small details ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
| arch/x86/kernel/apic/io_apic.c | diffblobblamehistory |