| commit | 8c4b8c3f34de4e2da20df042bba173fe557f8b45 | |
| author | Chris Wilson <chris@chris-wilson.co.uk> | |
| Wed, 17 Jun 2009 21:08:52 +0000 (17 22:08 +0100) | ||
| committer | Eric Anholt <eric@anholt.net> | |
| Thu, 18 Jun 2009 18:47:04 +0000 (18 11:47 -0700) | ||
| tree | 665c717af9a0b630303294bcbe48d9cafb10f186 | treesnapshot (tar.gz zip) |
| parent | d78b47b9a527bf46cb6081555847facd6efd5f81 | commitdiff |
drm/i915: Install fence register for tiled scanout on i915
With the work by Jesse Barnes to eliminate allocation of fences during
execbuffer, it becomes possible to write to the scan-out buffer with it
never acquiring a fence (simply by only ever writing to the object using
tiled GPU commands and never writing to it via the GTT). So for pre-i965
chipsets which require fenced access for tiled scan-out buffers, we need
to obtain a fence register.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
With the work by Jesse Barnes to eliminate allocation of fences during
execbuffer, it becomes possible to write to the scan-out buffer with it
never acquiring a fence (simply by only ever writing to the object using
tiled GPU commands and never writing to it via the GTT). So for pre-i965
chipsets which require fenced access for tiled scan-out buffers, we need
to obtain a fence register.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
| drivers/gpu/drm/i915/i915_drv.h | diffblobblamehistory | |
| drivers/gpu/drm/i915/i915_gem.c | diffblobblamehistory | |
| drivers/gpu/drm/i915/intel_display.c | diffblobblamehistory |