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pinctrl: st: Use ARRAY_SIZE instead of raw value for number of delays
2014-03-12
Ma
x
ime COQUELIN
p
inctrl: st: Use ARRAY_SIZ
E
ins
t
ea
d
o
f raw
value for
.
.
.
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@st.com>
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|
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2013-12-04
Maxime COQUELIN
A
R
M: STi: Add I
2
C confi
g
t
o
B
2
0
0
0 and B2020 boards
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@st.com>
commit
|
commitdiff
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tree
2013-12-04
Maxime COQUE
L
IN
ARM:
STi
:
Supply I2C co
n
figuration to S
T
iH41
5
SoC
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@st.com>
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|
commitdiff
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tree
2013-12-04
Maxime
C
OQU
E
L
IN
AR
M
: STi: Suppl
y
I2C configurat
i
on to STiH
4
16 SoC
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@st.com>
commit
|
commitdiff
|
tree
2013-11-14
Maxime COQUELIN
i
2
c: i2c-st: Add ST I2
C
c
o
ntrol
l
er
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@st.com>
commit
|
commitdiff
|
tree
2013-03-27
Maxi
m
e Coquelin
clk: ux500:
F
ix
p
rcmu cl
o
cks registration
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@st.com>
commit
|
commitdiff
|
tree
2013-03-18
Maxime C
o
quelin
ARM: mac
h
-ux500: enable 128KB way L2 cache on DB8540
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@stericsson.com>
commit
|
commitdiff
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tree
2013-01-29
Maxim
e
C
o
quel
i
n
ARM: ux500: Introduc
e
cpu_is_u85
8
0
()
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@stericsson.com>
commit
|
commitdiff
|
tree
2012-10-28
Max
i
m
e C
o
qu
e
lin
ARM: pla
t
-no
m
a
d
i
k: Introduce n
e
w
D
B
85
4
0
G
PIO regi
s
ters
Signed-off-by:
Maxime Coquelin
<maxime.coquelin@stericsson.com>
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|
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