From b2ac44fa39569094131b2a998e60023a10794b17 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 10:32:03 +0100 Subject: [PATCH] ARM: dts: r8a7779: Add SCIF fallback compatibility strings Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 93f3fdf95e31..1671839f55a6 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -211,7 +211,8 @@ }; scif0: serial@ffe40000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; @@ -221,7 +222,8 @@ }; scif1: serial@ffe41000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF1>; @@ -231,7 +233,8 @@ }; scif2: serial@ffe42000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF2>; @@ -241,7 +244,8 @@ }; scif3: serial@ffe43000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF3>; @@ -251,7 +255,8 @@ }; scif4: serial@ffe44000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF4>; @@ -261,7 +266,8 @@ }; scif5: serial@ffe45000 { - compatible = "renesas,scif-r8a7779", "renesas,scif"; + compatible = "renesas,scif-r8a7779", "renesas,rcar-gen1-scif", + "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = ; clocks = <&mstp0_clks R8A7779_CLK_SCIF5>; -- 2.11.4.GIT