2 * Copyright (C) 2002 Paul Mackerras, IBM Corp.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 #include <asm/processor.h>
10 #include <asm/ppc_asm.h>
11 #include <asm/export.h>
12 #include <asm/asm-compat.h>
13 #include <asm/feature-fixups.h>
16 /* For big-endian, 0 == most CPUs, 1 == POWER6, 2 == Cell */
17 #define SELFTEST_CASE 0
23 #ifdef __LITTLE_ENDIAN__
26 std r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* save destination pointer for return value */
29 #ifdef CONFIG_PPC_BOOK3S_64
32 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
33 #ifdef __LITTLE_ENDIAN__
34 /* dumb little-endian memcpy that will get replaced at runtime */
46 neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry
50 /* Below we want to nop out the bne if we're on a CPU that has the
51 CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
53 At the time of writing the only CPU that has this combination of bits
55 test_feature = (SELFTEST_CASE == 1)
60 ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
61 CPU_FTR_UNALIGNED_LD_STD)
64 test_feature = (SELFTEST_CASE == 0)
68 END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
101 3: ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* return dest pointer */
118 ld r9,0(r4) # 3+2n loads, 2+2n stores
127 # s1<< in r8, d0=(s0<<|s1>>) in r7, s3 in r0, s2 in r9, nix in r6 & r12
130 0: ld r0,0(r4) # 4+2n loads, 3+2n stores
145 # d0=(s0<<|s1>>) in r12, s1<< in r6, s2>> in r7, s2<< in r8, s3 in r9
184 3: ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* return dest pointer */
188 PPC_MTOCRF(0x01,r6) # put #bytes to 8B bdry into cr7
203 3: PPC_MTOCRF(0x01,r5)
229 4: ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1) /* return dest pointer */
232 EXPORT_SYMBOL(memcpy)