| commit | f5bad43b53cbcd1a017c6df3d1bf2c6412a465bd | |
| author | Adam Sampson <ats@offog.org> | |
| Sat, 17 Oct 2015 22:08:29 +0000 (17 23:08 +0100) | ||
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | |
| Mon, 19 Oct 2015 18:05:24 +0000 (19 20:05 +0200) | ||
| tree | 6dd19eb5a2944622c0e49a587993e1a4df0247fd | treesnapshot (tar.gz zip) |
| parent | 96577bcdf4868605325485d27d89726a30450e5c | commitdiff |
ARM: dts: sun7i: Enable USB DRC on pcDuino v3 Nano
The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
bus (it's not switchable), and the OTG port's ID pin is connected to PH4
on the A20.
Tested successfully in both host and device modes.
Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The OTG arrangement on the LinkSprite pcDuino v3 Nano is the same as the
pcDuino 1/2/3: the OTG port's 5V line is connected directly to the 5V
bus (it's not switchable), and the OTG port's ID pin is connected to PH4
on the A20.
Tested successfully in both host and device modes.
Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | diffblobblamehistory |