| commit | f2654a4781318dc7ab8d6cde66f1fa39eab980a9 | |
| author | Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com> | |
| Fri, 15 Sep 2017 06:31:58 +0000 (15 12:01 +0530) | ||
| committer | David S. Miller <davem@davemloft.net> | |
| Mon, 18 Sep 2017 23:33:18 +0000 (18 16:33 -0700) | ||
| tree | 33f494ace32d312982c077589809070e2ce4c4d5 | treesnapshot (tar.gz zip) |
| parent | 76cc0d3282d4b933fa144fa41fbc5318e0fdca24 | commitdiff |
net: phy: Fix mask value write on gmii2rgmii converter speed register
To clear Speed Selection in MDIO control register(0x10),
ie, clear bits 6 and 13 to zero while keeping other bits same.
Before AND operation,The Mask value has to be perform with bitwise NOT
operation (ie, ~ operator)
This patch clears current speed selection before writing the
new speed settings to gmii2rgmii converter
Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
To clear Speed Selection in MDIO control register(0x10),
ie, clear bits 6 and 13 to zero while keeping other bits same.
Before AND operation,The Mask value has to be perform with bitwise NOT
operation (ie, ~ operator)
This patch clears current speed selection before writing the
new speed settings to gmii2rgmii converter
Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
| drivers/net/phy/xilinx_gmii2rgmii.c | diffblobblamehistory |