| commit | e3c3f19bc6185e0a24454e7b439e11635e6db960 | |
| author | Krzysztof Kozlowski <k.kozlowski@samsung.com> | |
| Tue, 2 Sep 2014 13:21:15 +0000 (2 15:21 +0200) | ||
| committer | Tomasz Figa <tomasz.figa@gmail.com> | |
| Mon, 22 Sep 2014 12:28:49 +0000 (22 14:28 +0200) | ||
| tree | 8f6212dd1706bb388ca9fd86057a97267acfcc88 | treesnapshot (tar.gz zip) |
| parent | 22842d244af353a66fa4e6d1978d3f4c39ee4d20 | commitdiff |
clk: samsung: exynos3250: Register DMC clk provider
Add clock provider for clocks in DMC domain including EPLL and BPLL. The
DMC clocks are necessary for Exynos3 devfreq driver.
The DMC clock domain uses different address space (0x105C0000) than
standard clock domain (0x10030000 - 0x10050000). The difference is huge
enough to add new DT node for the clock provider, rather than extending
existing address space.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Add clock provider for clocks in DMC domain including EPLL and BPLL. The
DMC clocks are necessary for Exynos3 devfreq driver.
The DMC clock domain uses different address space (0x105C0000) than
standard clock domain (0x10030000 - 0x10050000). The difference is huge
enough to add new DT node for the clock provider, rather than extending
existing address space.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
| drivers/clk/samsung/clk-exynos3250.c | diffblobblamehistory | |
| include/dt-bindings/clock/exynos3250.h | diffblobblamehistory |