| commit | ce5b972bc840d024289c73a096d61cfdf57eff2e | |
| author | Huang, Xiong <xiong@qca.qualcomm.com> | |
| Wed, 25 Apr 2012 20:27:14 +0000 (25 20:27 +0000) | ||
| committer | David S. Miller <davem@davemloft.net> | |
| Thu, 26 Apr 2012 09:03:32 +0000 (26 05:03 -0400) | ||
| tree | 6d51dab262288aa3ac1d33b8cfce5e224d4112b0 | treesnapshot (tar.gz zip) |
| parent | 7c6c44f064adf11628c8815cab02f3bdf95ef8bc | commitdiff |
atl1c: update PHY reset related routine
Many magic data are re-configured for PHY during its reset operation
based on chip type to get better compability and stability.
REG_PHY_CTRL register may be configured by BIOS before enter OS.
so, the driver can't directly write to it without any Read-Op.
this change also affect suspend and phy_disable routines.
PHY debug ports and extension registers are refined as well.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Many magic data are re-configured for PHY during its reset operation
based on chip type to get better compability and stability.
REG_PHY_CTRL register may be configured by BIOS before enter OS.
so, the driver can't directly write to it without any Read-Op.
this change also affect suspend and phy_disable routines.
PHY debug ports and extension registers are refined as well.
Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>