| commit | 9bcb144c83d4df12c8150352fa876aeff289e39c | |
| author | Ben Widawsky <benjamin.widawsky@intel.com> | |
| Tue, 29 Apr 2014 02:29:25 +0000 (28 19:29 -0700) | ||
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | |
| Mon, 5 May 2014 14:01:58 +0000 (5 16:01 +0200) | ||
| tree | da8a9e0208c9b32704cad6eeb76e844cb8e24e01 | treesnapshot (tar.gz zip) |
| parent | 192d47a64ea3f50387079e1f91276f9b683bee46 | commitdiff |
drm/i915: Support 64b execbuf
Previously, our code only had a 32b offset value for where the
batchbuffer starts. With full PPGTT, and 64b canonical GPU address
space, that is an insufficient value. The code to expand is pretty
straight forward, and only one platform needs to do anything with the
extra bits.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Previously, our code only had a 32b offset value for where the
batchbuffer starts. With full PPGTT, and 64b canonical GPU address
space, that is an insufficient value. The code to expand is pretty
straight forward, and only one platform needs to do anything with the
extra bits.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| drivers/gpu/drm/i915/i915_gem_execbuffer.c | diffblobblamehistory | |
| drivers/gpu/drm/i915/intel_ringbuffer.c | diffblobblamehistory | |
| drivers/gpu/drm/i915/intel_ringbuffer.h | diffblobblamehistory |