| commit | 8f1ae77f466660b6da2455cccecc07ae631fa66d | |
| author | Maxime Ripard <maxime.ripard@free-electrons.com> | |
| Tue, 24 Sep 2013 08:07:43 +0000 (24 11:07 +0300) | ||
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | |
| Fri, 22 Nov 2013 20:20:36 +0000 (22 21:20 +0100) | ||
| tree | 72bb8bfd609c1e5bde3118fc75a3d478baee8d00 | treesnapshot (tar.gz zip) |
| parent | 6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae | commitdiff |
reset: Add Allwinner SoCs Reset Controller Driver
The Allwinner A31 and most of the other Allwinner SoCs have an IP
maintaining a few other IPs in the SoC in reset by default. Among these
IPs are the A31's High Speed Timers, hence why we can't use the regular
driver construct in every cases, and need to call the registering
function directly during machine initialisation.
Apart from this, the implementation is fairly straightforward, and could
easily be moved to a generic MMIO-based reset controller driver if the
need ever arise.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
The Allwinner A31 and most of the other Allwinner SoCs have an IP
maintaining a few other IPs in the SoC in reset by default. Among these
IPs are the A31's High Speed Timers, hence why we can't use the regular
driver construct in every cases, and need to call the registering
function directly during machine initialisation.
Apart from this, the implementation is fairly straightforward, and could
easily be moved to a generic MMIO-based reset controller driver if the
need ever arise.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
| drivers/reset/Makefile | diffblobblamehistory | |
| drivers/reset/reset-sunxi.c | [new file with mode: 0644] | blob |