| commit | 737c16dffc458e58ee7840556d43b874cb8e16a0 | |
| author | Will Deacon <will.deacon@arm.com> | |
| Wed, 5 Jun 2013 11:40:34 +0000 (5 12:40 +0100) | ||
| committer | Catalin Marinas <catalin.marinas@arm.com> | |
| Fri, 7 Jun 2013 17:00:11 +0000 (7 18:00 +0100) | ||
| tree | 298c257517f97ad21236588c189c3e1e5bd38aa7 | treesnapshot (tar.gz zip) |
| parent | 4ecf7ccb1973fd826456b6ab1e6dfafe9023c753 | commitdiff |
arm64: mm: don't bother invalidating the icache in switch_mm
We don't support software broadcast of cache maintenance operations, so
this flush is not required (__sync_icache_dcache will always affect all
CPUs).
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
We don't support software broadcast of cache maintenance operations, so
this flush is not required (__sync_icache_dcache will always affect all
CPUs).
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| arch/arm64/include/asm/mmu_context.h | diffblobblamehistory |