| commit | 4d52b2acefdfceae0e47ed08324a96f511dc80b1 | |
| author | Boris Brezillon <boris.brezillon@free-electrons.com> | |
| Tue, 26 May 2015 12:42:57 +0000 (26 14:42 +0200) | ||
| committer | Michael Turquette <mturquette@linaro.org> | |
| Wed, 3 Jun 2015 22:17:07 +0000 (3 15:17 -0700) | ||
| tree | 7348889850e9f896bda2842ad0e3c15165832fad | treesnapshot (tar.gz zip) |
| parent | 5343325ff3dd299f459fa9dacbd95dca5c9bf215 | commitdiff |
clk: mvebu: add missing CESA gate clk
Even if not documented in the datasheet, the Armada 370 SoC can actually
gate the CESA (crypto engine) clock.
Add an entry in the gating_desc table to be able to reference the CESA
gateclk in the crypto node.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Even if not documented in the datasheet, the Armada 370 SoC can actually
gate the CESA (crypto engine) clock.
Add an entry in the gating_desc table to be able to reference the CESA
gateclk in the crypto node.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
| Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt | diffblobblamehistory | |
| drivers/clk/mvebu/armada-370.c | diffblobblamehistory |