| commit | 38912bdbde5f39aa00dfc6228ef580ff79b46bd3 | |
| author | Deepak SIKRI <deepak.sikri@st.com> | |
| Wed, 4 Apr 2012 04:33:21 +0000 (4 04:33 +0000) | ||
| committer | David S. Miller <davem@davemloft.net> | |
| Wed, 4 Apr 2012 22:39:23 +0000 (4 18:39 -0400) | ||
| tree | edd34f950438e75d8b47a71c832830e934117b77 | treesnapshot (tar.gz zip) |
| parent | 55f9a4d6facb35198ddb88a8fe21ca2ee753af7a | commitdiff |
stmmac: sanitize the rx coe and add the type-1 csum (v2)
This patch sanities the RX coe and adds the Type-1 Rx checksum offload engine (COE).
So the RX COE can be passed through the platform but can be fixed
at run-time in case of the core has the HW capability register.
Also to support the Type-1 Rx COE the driver must append the
HW checksum at the end of payload in case the Rx checksum
engine was used to offload the HW checksum.
This v2 version also fixes the IPC that has to be enabled and verified.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch sanities the RX coe and adds the Type-1 Rx checksum offload engine (COE).
So the RX COE can be passed through the platform but can be fixed
at run-time in case of the core has the HW capability register.
Also to support the Type-1 Rx COE the driver must append the
HW checksum at the end of payload in case the Rx checksum
engine was used to offload the HW checksum.
This v2 version also fixes the IPC that has to be enabled and verified.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Hacked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>