ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source
commit2a6f06141533fc48dc4077b0b4a9e722c1b72711
authorAlexander Shiyan <shc_work@mail.ru>
Mon, 13 May 2013 17:07:23 +0000 (13 21:07 +0400)
committerOlof Johansson <olof@lixom.net>
Tue, 11 Jun 2013 22:47:15 +0000 (11 15:47 -0700)
treebe0614eda369f144636b5790bb5844bea19490a7
parent5c15bd28ff194b2d738f0fa408696f2684470a26
ARM: clps711x: Set PLL clock to zero if we work from 13 mHz source

This clock will be used in audio subsystem. Since audio cannot work
without PLL we should indicate this.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/mach-clps711x/common.c