pwm: mxs: Fix period divider computation
commit24ccea1ce6717b91bb1e71b12cfd956f8d32dcf3
authorGaetan Hug <ghug@induct.be>
Wed, 11 Mar 2015 12:08:12 +0000 (11 13:08 +0100)
committerThierry Reding <thierry.reding@gmail.com>
Wed, 11 Mar 2015 12:11:16 +0000 (11 13:11 +0100)
tree931a34a00fc38bc38ee9367a0b47ceaa3c7dcb0b
parent054d3e1f9a995e13b8be07482fe5c1c42655223d
pwm: mxs: Fix period divider computation

The driver computes which clock divider it sould be using from the
requested period. This computation assumes that the link between the
register value and the actual divider value is raising 2 to the power of
the registry value.

    div = 1 << regvalue

This is true only for the first 5 values out of 8. Next values are 64,
256 and, 1024 - instead of 32, 64, 128.
This affects only the users requesting a period > 0.04369s.

Replace the computation with a look-up table.

Signed-off-by: Gaetan Hug <ghug@induct.be>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
drivers/pwm/pwm-mxs.c