| commit | 0c521ccbd0c9ad5623ff9b37b20b3ff9d4ad65a7 | |
| author | Sahitya Tummala <stummala@codeaurora.org> | |
| Wed, 8 Dec 2010 09:33:07 +0000 (8 15:03 +0530) | ||
| committer | David Brown <davidb@codeaurora.org> | |
| Mon, 20 Dec 2010 20:28:32 +0000 (20 12:28 -0800) | ||
| tree | 5cd3b61994a3891ec2ceff729ac33eea35ae205e | treesnapshot (tar.gz zip) |
| parent | 71dd9106af54de0f758875fa4b595af42a327448 | commitdiff |
mmc: msm_sdcc: Check for only DATA_END interrupt to end a request
The current code checks for both DATA_END and DATA_BLK_END bits in
MCI_STATUS register and ends a request only if both are set at a time.
The hardware doesn't always set DATA_BLK_END when DATA_END is set.
But DATA_END status itself is sufficient condition from hardware that
data transfer is done and hence, check for only DATA_END interrupt in
software to end a request.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
The current code checks for both DATA_END and DATA_BLK_END bits in
MCI_STATUS register and ends a request only if both are set at a time.
The hardware doesn't always set DATA_BLK_END when DATA_END is set.
But DATA_END status itself is sufficient condition from hardware that
data transfer is done and hence, check for only DATA_END interrupt in
software to end a request.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
| drivers/mmc/host/msm_sdcc.c | diffblobblamehistory | |
| drivers/mmc/host/msm_sdcc.h | diffblobblamehistory |