| commit | 1f2d6c49f087c84ed54ad3e0801faeca3e2ccfdd | |
| author | Changhwan Youn <chaos.youn@samsung.com> | |
| Mon, 29 Nov 2010 08:04:46 +0000 (29 17:04 +0900) | ||
| committer | Kukjin Kim <kgene.kim@samsung.com> | |
| Wed, 8 Dec 2010 09:11:37 +0000 (8 18:11 +0900) | ||
| tree | 3798b268d2d6bcd238483ee6a7e5cb91ae1a0b1a | treesnapshot (tar.gz zip) |
| parent | b45756f65d90dca10cbe3e9ef04ecf96c01124a2 | commitdiff |
ARM: S5PV310: Limit the irqs which support cascade interrupt
The irqs from SPI(0) to SPI(39) and SPI(51), SPI(53) are connected to the
interrupt combiner. This patch limits the irqs which should be initialized
to support cascade interrupt.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The irqs from SPI(0) to SPI(39) and SPI(51), SPI(53) are connected to the
interrupt combiner. This patch limits the irqs which should be initialized
to support cascade interrupt.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| arch/arm/mach-s5pv310/cpu.c | diffblobblamehistory |