1 /*****************************************************************************
5 * $Date: 2005/06/21 18:29:48 $ *
8 * part of the Chelsio 10Gb Ethernet Driver. *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License, version 2, as *
12 * published by the Free Software Foundation. *
14 * You should have received a copy of the GNU General Public License along *
15 * with this program; if not, write to the Free Software Foundation, Inc., *
16 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
19 * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
22 * http://www.chelsio.com *
24 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
25 * All rights reserved. *
27 * Maintainers: maintainers@chelsio.com *
29 * Authors: Dimitrios Michailidis <dm@chelsio.com> *
30 * Tina Yang <tainay@chelsio.com> *
31 * Felix Marti <felix@chelsio.com> *
32 * Scott Bardone <sbardone@chelsio.com> *
33 * Kurt Ottaway <kottaway@chelsio.com> *
34 * Frank DiMambro <frank@chelsio.com> *
38 ****************************************************************************/
42 #include <linux/types.h>
43 #include <linux/errno.h>
44 #include <linux/pci.h>
45 #include <linux/ktime.h>
46 #include <linux/netdevice.h>
47 #include <linux/etherdevice.h>
48 #include <linux/if_vlan.h>
49 #include <linux/skbuff.h>
50 #include <linux/init.h>
52 #include <linux/tcp.h>
55 #include <linux/if_arp.h>
62 /* This belongs in if_ether.h */
63 #define ETH_P_CPL5 0xf
66 #define SGE_FREELQ_N 2
67 #define SGE_CMDQ0_E_N 1024
68 #define SGE_CMDQ1_E_N 128
69 #define SGE_FREEL_SIZE 4096
70 #define SGE_JUMBO_FREEL_SIZE 512
71 #define SGE_FREEL_REFILL_THRESH 16
72 #define SGE_RESPQ_E_N 1024
73 #define SGE_INTRTIMER_NRES 1000
74 #define SGE_RX_SM_BUF_SIZE 1536
75 #define SGE_TX_DESC_MAX_PLEN 16384
77 #define SGE_RESPQ_REPLENISH_THRES (SGE_RESPQ_E_N / 4)
80 * Period of the TX buffer reclaim timer. This timer does not need to run
81 * frequently as TX buffers are usually reclaimed by new TX packets.
83 #define TX_RECLAIM_PERIOD (HZ / 4)
85 #define M_CMD_LEN 0x7fffffff
86 #define V_CMD_LEN(v) (v)
87 #define G_CMD_LEN(v) ((v) & M_CMD_LEN)
88 #define V_CMD_GEN1(v) ((v) << 31)
89 #define V_CMD_GEN2(v) (v)
90 #define F_CMD_DATAVALID (1 << 1)
91 #define F_CMD_SOP (1 << 2)
92 #define V_CMD_EOP(v) ((v) << 3)
95 * Command queue, receive buffer list, and response queue descriptors.
97 #if defined(__BIG_ENDIAN_BITFIELD)
114 u32 Cmdq1CreditReturn
: 5;
115 u32 Cmdq1DmaComplete
: 5;
116 u32 Cmdq0CreditReturn
: 5;
117 u32 Cmdq0DmaComplete
: 5;
124 u32 GenerationBit
: 1;
127 #elif defined(__LITTLE_ENDIAN_BITFIELD)
144 u32 GenerationBit
: 1;
151 u32 Cmdq0DmaComplete
: 5;
152 u32 Cmdq0CreditReturn
: 5;
153 u32 Cmdq1DmaComplete
: 5;
154 u32 Cmdq1CreditReturn
: 5;
160 * SW Context Command and Freelist Queue Descriptors
164 DECLARE_PCI_UNMAP_ADDR(dma_addr
);
165 DECLARE_PCI_UNMAP_LEN(dma_len
);
170 DECLARE_PCI_UNMAP_ADDR(dma_addr
);
171 DECLARE_PCI_UNMAP_LEN(dma_len
);
175 * SW command, freelist and response rings
178 unsigned long status
; /* HW DMA fetch status */
179 unsigned int in_use
; /* # of in-use command descriptors */
180 unsigned int size
; /* # of descriptors */
181 unsigned int processed
; /* total # of descs HW has processed */
182 unsigned int cleaned
; /* total # of descs SW has reclaimed */
183 unsigned int stop_thres
; /* SW TX queue suspend threshold */
184 u16 pidx
; /* producer index (SW) */
185 u16 cidx
; /* consumer index (HW) */
186 u8 genbit
; /* current generation (=valid) bit */
187 u8 sop
; /* is next entry start of packet? */
188 struct cmdQ_e
*entries
; /* HW command descriptor Q */
189 struct cmdQ_ce
*centries
; /* SW command context descriptor Q */
190 dma_addr_t dma_addr
; /* DMA addr HW command descriptor Q */
191 spinlock_t lock
; /* Lock to protect cmdQ enqueuing */
195 unsigned int credits
; /* # of available RX buffers */
196 unsigned int size
; /* free list capacity */
197 u16 pidx
; /* producer index (SW) */
198 u16 cidx
; /* consumer index (HW) */
199 u16 rx_buffer_size
; /* Buffer size on this free list */
200 u16 dma_offset
; /* DMA offset to align IP headers */
201 u16 recycleq_idx
; /* skb recycle q to use */
202 u8 genbit
; /* current generation (=valid) bit */
203 struct freelQ_e
*entries
; /* HW freelist descriptor Q */
204 struct freelQ_ce
*centries
; /* SW freelist context descriptor Q */
205 dma_addr_t dma_addr
; /* DMA addr HW freelist descriptor Q */
209 unsigned int credits
; /* credits to be returned to SGE */
210 unsigned int size
; /* # of response Q descriptors */
211 u16 cidx
; /* consumer index (SW) */
212 u8 genbit
; /* current generation(=valid) bit */
213 struct respQ_e
*entries
; /* HW response descriptor Q */
214 dma_addr_t dma_addr
; /* DMA addr HW response descriptor Q */
217 /* Bit flags for cmdQ.status */
219 CMDQ_STAT_RUNNING
= 1, /* fetch engine is running */
220 CMDQ_STAT_LAST_PKT_DB
= 2 /* last packet rung the doorbell */
223 /* T204 TX SW scheduler */
225 /* Per T204 TX port */
227 unsigned int avail
; /* available bits - quota */
228 unsigned int drain_bits_per_1024ns
; /* drain rate */
229 unsigned int speed
; /* drain rate, mbps */
230 unsigned int mtu
; /* mtu size */
231 struct sk_buff_head skbq
; /* pending skbs */
234 /* Per T204 device */
236 ktime_t last_updated
; /* last time quotas were computed */
237 unsigned int max_avail
; /* max bits to be sent to any port */
238 unsigned int port
; /* port index (round robin ports) */
239 unsigned int num
; /* num skbs in per port queues */
240 struct sched_port p
[MAX_NPORTS
];
241 struct tasklet_struct sched_tsk
;/* tasklet used to run scheduler */
243 static void restart_sched(unsigned long);
247 * Main SGE data structure
249 * Interrupts are handled by a single CPU and it is likely that on a MP system
250 * the application is migrated to another CPU. In that scenario, we try to
251 * seperate the RX(in irq context) and TX state in order to decrease memory
255 struct adapter
*adapter
; /* adapter backpointer */
256 struct net_device
*netdev
; /* netdevice backpointer */
257 struct freelQ freelQ
[SGE_FREELQ_N
]; /* buffer free lists */
258 struct respQ respQ
; /* response Q */
259 unsigned long stopped_tx_queues
; /* bitmap of suspended Tx queues */
260 unsigned int rx_pkt_pad
; /* RX padding for L2 packets */
261 unsigned int jumbo_fl
; /* jumbo freelist Q index */
262 unsigned int intrtimer_nres
; /* no-resource interrupt timer */
263 unsigned int fixed_intrtimer
;/* non-adaptive interrupt timer */
264 struct timer_list tx_reclaim_timer
; /* reclaims TX buffers */
265 struct timer_list espibug_timer
;
266 unsigned long espibug_timeout
;
267 struct sk_buff
*espibug_skb
[MAX_NPORTS
];
268 u32 sge_control
; /* shadow value of sge control reg */
269 struct sge_intr_counts stats
;
270 struct sge_port_stats
*port_stats
[MAX_NPORTS
];
271 struct sched
*tx_sched
;
272 struct cmdQ cmdQ
[SGE_CMDQ_N
] ____cacheline_aligned_in_smp
;
276 * stop tasklet and free all pending skb's
278 static void tx_sched_stop(struct sge
*sge
)
280 struct sched
*s
= sge
->tx_sched
;
283 tasklet_kill(&s
->sched_tsk
);
285 for (i
= 0; i
< MAX_NPORTS
; i
++)
286 __skb_queue_purge(&s
->p
[s
->port
].skbq
);
290 * t1_sched_update_parms() is called when the MTU or link speed changes. It
291 * re-computes scheduler parameters to scope with the change.
293 unsigned int t1_sched_update_parms(struct sge
*sge
, unsigned int port
,
294 unsigned int mtu
, unsigned int speed
)
296 struct sched
*s
= sge
->tx_sched
;
297 struct sched_port
*p
= &s
->p
[port
];
298 unsigned int max_avail_segs
;
300 pr_debug("t1_sched_update_params mtu=%d speed=%d\n", mtu
, speed
);
307 unsigned long long drain
= 1024ULL * p
->speed
* (p
->mtu
- 40);
308 do_div(drain
, (p
->mtu
+ 50) * 1000);
309 p
->drain_bits_per_1024ns
= (unsigned int) drain
;
312 p
->drain_bits_per_1024ns
=
313 90 * p
->drain_bits_per_1024ns
/ 100;
316 if (board_info(sge
->adapter
)->board
== CHBT_BOARD_CHT204
) {
317 p
->drain_bits_per_1024ns
-= 16;
318 s
->max_avail
= max(4096U, p
->mtu
+ 16 + 14 + 4);
319 max_avail_segs
= max(1U, 4096 / (p
->mtu
- 40));
321 s
->max_avail
= 16384;
322 max_avail_segs
= max(1U, 9000 / (p
->mtu
- 40));
325 pr_debug("t1_sched_update_parms: mtu %u speed %u max_avail %u "
326 "max_avail_segs %u drain_bits_per_1024ns %u\n", p
->mtu
,
327 p
->speed
, s
->max_avail
, max_avail_segs
,
328 p
->drain_bits_per_1024ns
);
330 return max_avail_segs
* (p
->mtu
- 40);
334 * t1_sched_max_avail_bytes() tells the scheduler the maximum amount of
335 * data that can be pushed per port.
337 void t1_sched_set_max_avail_bytes(struct sge
*sge
, unsigned int val
)
339 struct sched
*s
= sge
->tx_sched
;
343 for (i
= 0; i
< MAX_NPORTS
; i
++)
344 t1_sched_update_parms(sge
, i
, 0, 0);
348 * t1_sched_set_drain_bits_per_us() tells the scheduler at which rate a port
351 void t1_sched_set_drain_bits_per_us(struct sge
*sge
, unsigned int port
,
354 struct sched
*s
= sge
->tx_sched
;
355 struct sched_port
*p
= &s
->p
[port
];
356 p
->drain_bits_per_1024ns
= val
* 1024 / 1000;
357 t1_sched_update_parms(sge
, port
, 0, 0);
362 * get_clock() implements a ns clock (see ktime_get)
364 static inline ktime_t
get_clock(void)
369 return timespec_to_ktime(ts
);
373 * tx_sched_init() allocates resources and does basic initialization.
375 static int tx_sched_init(struct sge
*sge
)
380 s
= kzalloc(sizeof (struct sched
), GFP_KERNEL
);
384 pr_debug("tx_sched_init\n");
385 tasklet_init(&s
->sched_tsk
, restart_sched
, (unsigned long) sge
);
388 for (i
= 0; i
< MAX_NPORTS
; i
++) {
389 skb_queue_head_init(&s
->p
[i
].skbq
);
390 t1_sched_update_parms(sge
, i
, 1500, 1000);
397 * sched_update_avail() computes the delta since the last time it was called
398 * and updates the per port quota (number of bits that can be sent to the any
401 static inline int sched_update_avail(struct sge
*sge
)
403 struct sched
*s
= sge
->tx_sched
;
404 ktime_t now
= get_clock();
406 long long delta_time_ns
;
408 delta_time_ns
= ktime_to_ns(ktime_sub(now
, s
->last_updated
));
410 pr_debug("sched_update_avail delta=%lld\n", delta_time_ns
);
411 if (delta_time_ns
< 15000)
414 for (i
= 0; i
< MAX_NPORTS
; i
++) {
415 struct sched_port
*p
= &s
->p
[i
];
416 unsigned int delta_avail
;
418 delta_avail
= (p
->drain_bits_per_1024ns
* delta_time_ns
) >> 13;
419 p
->avail
= min(p
->avail
+ delta_avail
, s
->max_avail
);
422 s
->last_updated
= now
;
428 * sched_skb() is called from two different places. In the tx path, any
429 * packet generating load on an output port will call sched_skb()
430 * (skb != NULL). In addition, sched_skb() is called from the irq/soft irq
431 * context (skb == NULL).
432 * The scheduler only returns a skb (which will then be sent) if the
433 * length of the skb is <= the current quota of the output port.
435 static struct sk_buff
*sched_skb(struct sge
*sge
, struct sk_buff
*skb
,
436 unsigned int credits
)
438 struct sched
*s
= sge
->tx_sched
;
439 struct sk_buff_head
*skbq
;
440 unsigned int i
, len
, update
= 1;
442 pr_debug("sched_skb %p\n", skb
);
447 skbq
= &s
->p
[skb
->dev
->if_port
].skbq
;
448 __skb_queue_tail(skbq
, skb
);
453 if (credits
< MAX_SKB_FRAGS
+ 1)
457 for (i
= 0; i
< MAX_NPORTS
; i
++) {
458 s
->port
= ++s
->port
& (MAX_NPORTS
- 1);
459 skbq
= &s
->p
[s
->port
].skbq
;
461 skb
= skb_peek(skbq
);
467 if (len
<= s
->p
[s
->port
].avail
) {
468 s
->p
[s
->port
].avail
-= len
;
470 __skb_unlink(skb
, skbq
);
476 if (update
-- && sched_update_avail(sge
))
480 /* If there are more pending skbs, we use the hardware to schedule us
483 if (s
->num
&& !skb
) {
484 struct cmdQ
*q
= &sge
->cmdQ
[0];
485 clear_bit(CMDQ_STAT_LAST_PKT_DB
, &q
->status
);
486 if (test_and_set_bit(CMDQ_STAT_RUNNING
, &q
->status
) == 0) {
487 set_bit(CMDQ_STAT_LAST_PKT_DB
, &q
->status
);
488 writel(F_CMDQ0_ENABLE
, sge
->adapter
->regs
+ A_SG_DOORBELL
);
491 pr_debug("sched_skb ret %p\n", skb
);
497 * PIO to indicate that memory mapped Q contains valid descriptor(s).
499 static inline void doorbell_pio(struct adapter
*adapter
, u32 val
)
502 writel(val
, adapter
->regs
+ A_SG_DOORBELL
);
506 * Frees all RX buffers on the freelist Q. The caller must make sure that
507 * the SGE is turned off before calling this function.
509 static void free_freelQ_buffers(struct pci_dev
*pdev
, struct freelQ
*q
)
511 unsigned int cidx
= q
->cidx
;
513 while (q
->credits
--) {
514 struct freelQ_ce
*ce
= &q
->centries
[cidx
];
516 pci_unmap_single(pdev
, pci_unmap_addr(ce
, dma_addr
),
517 pci_unmap_len(ce
, dma_len
),
519 dev_kfree_skb(ce
->skb
);
521 if (++cidx
== q
->size
)
527 * Free RX free list and response queue resources.
529 static void free_rx_resources(struct sge
*sge
)
531 struct pci_dev
*pdev
= sge
->adapter
->pdev
;
532 unsigned int size
, i
;
534 if (sge
->respQ
.entries
) {
535 size
= sizeof(struct respQ_e
) * sge
->respQ
.size
;
536 pci_free_consistent(pdev
, size
, sge
->respQ
.entries
,
537 sge
->respQ
.dma_addr
);
540 for (i
= 0; i
< SGE_FREELQ_N
; i
++) {
541 struct freelQ
*q
= &sge
->freelQ
[i
];
544 free_freelQ_buffers(pdev
, q
);
548 size
= sizeof(struct freelQ_e
) * q
->size
;
549 pci_free_consistent(pdev
, size
, q
->entries
,
556 * Allocates basic RX resources, consisting of memory mapped freelist Qs and a
559 static int alloc_rx_resources(struct sge
*sge
, struct sge_params
*p
)
561 struct pci_dev
*pdev
= sge
->adapter
->pdev
;
562 unsigned int size
, i
;
564 for (i
= 0; i
< SGE_FREELQ_N
; i
++) {
565 struct freelQ
*q
= &sge
->freelQ
[i
];
568 q
->size
= p
->freelQ_size
[i
];
569 q
->dma_offset
= sge
->rx_pkt_pad
? 0 : NET_IP_ALIGN
;
570 size
= sizeof(struct freelQ_e
) * q
->size
;
571 q
->entries
= pci_alloc_consistent(pdev
, size
, &q
->dma_addr
);
575 size
= sizeof(struct freelQ_ce
) * q
->size
;
576 q
->centries
= kzalloc(size
, GFP_KERNEL
);
582 * Calculate the buffer sizes for the two free lists. FL0 accommodates
583 * regular sized Ethernet frames, FL1 is sized not to exceed 16K,
584 * including all the sk_buff overhead.
586 * Note: For T2 FL0 and FL1 are reversed.
588 sge
->freelQ
[!sge
->jumbo_fl
].rx_buffer_size
= SGE_RX_SM_BUF_SIZE
+
589 sizeof(struct cpl_rx_data
) +
590 sge
->freelQ
[!sge
->jumbo_fl
].dma_offset
;
593 SKB_DATA_ALIGN(sizeof(struct skb_shared_info
));
595 sge
->freelQ
[sge
->jumbo_fl
].rx_buffer_size
= size
;
598 * Setup which skb recycle Q should be used when recycling buffers from
601 sge
->freelQ
[!sge
->jumbo_fl
].recycleq_idx
= 0;
602 sge
->freelQ
[sge
->jumbo_fl
].recycleq_idx
= 1;
604 sge
->respQ
.genbit
= 1;
605 sge
->respQ
.size
= SGE_RESPQ_E_N
;
606 sge
->respQ
.credits
= 0;
607 size
= sizeof(struct respQ_e
) * sge
->respQ
.size
;
609 pci_alloc_consistent(pdev
, size
, &sge
->respQ
.dma_addr
);
610 if (!sge
->respQ
.entries
)
615 free_rx_resources(sge
);
620 * Reclaims n TX descriptors and frees the buffers associated with them.
622 static void free_cmdQ_buffers(struct sge
*sge
, struct cmdQ
*q
, unsigned int n
)
625 struct pci_dev
*pdev
= sge
->adapter
->pdev
;
626 unsigned int cidx
= q
->cidx
;
629 ce
= &q
->centries
[cidx
];
631 if (likely(pci_unmap_len(ce
, dma_len
))) {
632 pci_unmap_single(pdev
, pci_unmap_addr(ce
, dma_addr
),
633 pci_unmap_len(ce
, dma_len
),
639 dev_kfree_skb_any(ce
->skb
);
643 if (++cidx
== q
->size
) {
654 * Assumes that SGE is stopped and all interrupts are disabled.
656 static void free_tx_resources(struct sge
*sge
)
658 struct pci_dev
*pdev
= sge
->adapter
->pdev
;
659 unsigned int size
, i
;
661 for (i
= 0; i
< SGE_CMDQ_N
; i
++) {
662 struct cmdQ
*q
= &sge
->cmdQ
[i
];
666 free_cmdQ_buffers(sge
, q
, q
->in_use
);
670 size
= sizeof(struct cmdQ_e
) * q
->size
;
671 pci_free_consistent(pdev
, size
, q
->entries
,
678 * Allocates basic TX resources, consisting of memory mapped command Qs.
680 static int alloc_tx_resources(struct sge
*sge
, struct sge_params
*p
)
682 struct pci_dev
*pdev
= sge
->adapter
->pdev
;
683 unsigned int size
, i
;
685 for (i
= 0; i
< SGE_CMDQ_N
; i
++) {
686 struct cmdQ
*q
= &sge
->cmdQ
[i
];
690 q
->size
= p
->cmdQ_size
[i
];
693 q
->processed
= q
->cleaned
= 0;
695 spin_lock_init(&q
->lock
);
696 size
= sizeof(struct cmdQ_e
) * q
->size
;
697 q
->entries
= pci_alloc_consistent(pdev
, size
, &q
->dma_addr
);
701 size
= sizeof(struct cmdQ_ce
) * q
->size
;
702 q
->centries
= kzalloc(size
, GFP_KERNEL
);
708 * CommandQ 0 handles Ethernet and TOE packets, while queue 1 is TOE
709 * only. For queue 0 set the stop threshold so we can handle one more
710 * packet from each port, plus reserve an additional 24 entries for
711 * Ethernet packets only. Queue 1 never suspends nor do we reserve
712 * space for Ethernet packets.
714 sge
->cmdQ
[0].stop_thres
= sge
->adapter
->params
.nports
*
719 free_tx_resources(sge
);
723 static inline void setup_ring_params(struct adapter
*adapter
, u64 addr
,
724 u32 size
, int base_reg_lo
,
725 int base_reg_hi
, int size_reg
)
727 writel((u32
)addr
, adapter
->regs
+ base_reg_lo
);
728 writel(addr
>> 32, adapter
->regs
+ base_reg_hi
);
729 writel(size
, adapter
->regs
+ size_reg
);
733 * Enable/disable VLAN acceleration.
735 void t1_set_vlan_accel(struct adapter
*adapter
, int on_off
)
737 struct sge
*sge
= adapter
->sge
;
739 sge
->sge_control
&= ~F_VLAN_XTRACT
;
741 sge
->sge_control
|= F_VLAN_XTRACT
;
742 if (adapter
->open_device_map
) {
743 writel(sge
->sge_control
, adapter
->regs
+ A_SG_CONTROL
);
744 readl(adapter
->regs
+ A_SG_CONTROL
); /* flush */
749 * Programs the various SGE registers. However, the engine is not yet enabled,
750 * but sge->sge_control is setup and ready to go.
752 static void configure_sge(struct sge
*sge
, struct sge_params
*p
)
754 struct adapter
*ap
= sge
->adapter
;
756 writel(0, ap
->regs
+ A_SG_CONTROL
);
757 setup_ring_params(ap
, sge
->cmdQ
[0].dma_addr
, sge
->cmdQ
[0].size
,
758 A_SG_CMD0BASELWR
, A_SG_CMD0BASEUPR
, A_SG_CMD0SIZE
);
759 setup_ring_params(ap
, sge
->cmdQ
[1].dma_addr
, sge
->cmdQ
[1].size
,
760 A_SG_CMD1BASELWR
, A_SG_CMD1BASEUPR
, A_SG_CMD1SIZE
);
761 setup_ring_params(ap
, sge
->freelQ
[0].dma_addr
,
762 sge
->freelQ
[0].size
, A_SG_FL0BASELWR
,
763 A_SG_FL0BASEUPR
, A_SG_FL0SIZE
);
764 setup_ring_params(ap
, sge
->freelQ
[1].dma_addr
,
765 sge
->freelQ
[1].size
, A_SG_FL1BASELWR
,
766 A_SG_FL1BASEUPR
, A_SG_FL1SIZE
);
768 /* The threshold comparison uses <. */
769 writel(SGE_RX_SM_BUF_SIZE
+ 1, ap
->regs
+ A_SG_FLTHRESHOLD
);
771 setup_ring_params(ap
, sge
->respQ
.dma_addr
, sge
->respQ
.size
,
772 A_SG_RSPBASELWR
, A_SG_RSPBASEUPR
, A_SG_RSPSIZE
);
773 writel((u32
)sge
->respQ
.size
- 1, ap
->regs
+ A_SG_RSPQUEUECREDIT
);
775 sge
->sge_control
= F_CMDQ0_ENABLE
| F_CMDQ1_ENABLE
| F_FL0_ENABLE
|
776 F_FL1_ENABLE
| F_CPL_ENABLE
| F_RESPONSE_QUEUE_ENABLE
|
777 V_CMDQ_PRIORITY(2) | F_DISABLE_CMDQ1_GTS
| F_ISCSI_COALESCE
|
778 V_RX_PKT_OFFSET(sge
->rx_pkt_pad
);
780 #if defined(__BIG_ENDIAN_BITFIELD)
781 sge
->sge_control
|= F_ENABLE_BIG_ENDIAN
;
784 /* Initialize no-resource timer */
785 sge
->intrtimer_nres
= SGE_INTRTIMER_NRES
* core_ticks_per_usec(ap
);
787 t1_sge_set_coalesce_params(sge
, p
);
791 * Return the payload capacity of the jumbo free-list buffers.
793 static inline unsigned int jumbo_payload_capacity(const struct sge
*sge
)
795 return sge
->freelQ
[sge
->jumbo_fl
].rx_buffer_size
-
796 sge
->freelQ
[sge
->jumbo_fl
].dma_offset
-
797 sizeof(struct cpl_rx_data
);
801 * Frees all SGE related resources and the sge structure itself
803 void t1_sge_destroy(struct sge
*sge
)
807 for_each_port(sge
->adapter
, i
)
808 free_percpu(sge
->port_stats
[i
]);
810 kfree(sge
->tx_sched
);
811 free_tx_resources(sge
);
812 free_rx_resources(sge
);
817 * Allocates new RX buffers on the freelist Q (and tracks them on the freelist
818 * context Q) until the Q is full or alloc_skb fails.
820 * It is possible that the generation bits already match, indicating that the
821 * buffer is already valid and nothing needs to be done. This happens when we
822 * copied a received buffer into a new sk_buff during the interrupt processing.
824 * If the SGE doesn't automatically align packets properly (!sge->rx_pkt_pad),
825 * we specify a RX_OFFSET in order to make sure that the IP header is 4B
828 static void refill_free_list(struct sge
*sge
, struct freelQ
*q
)
830 struct pci_dev
*pdev
= sge
->adapter
->pdev
;
831 struct freelQ_ce
*ce
= &q
->centries
[q
->pidx
];
832 struct freelQ_e
*e
= &q
->entries
[q
->pidx
];
833 unsigned int dma_len
= q
->rx_buffer_size
- q
->dma_offset
;
835 while (q
->credits
< q
->size
) {
839 skb
= alloc_skb(q
->rx_buffer_size
, GFP_ATOMIC
);
843 skb_reserve(skb
, q
->dma_offset
);
844 mapping
= pci_map_single(pdev
, skb
->data
, dma_len
,
846 skb_reserve(skb
, sge
->rx_pkt_pad
);
849 pci_unmap_addr_set(ce
, dma_addr
, mapping
);
850 pci_unmap_len_set(ce
, dma_len
, dma_len
);
851 e
->addr_lo
= (u32
)mapping
;
852 e
->addr_hi
= (u64
)mapping
>> 32;
853 e
->len_gen
= V_CMD_LEN(dma_len
) | V_CMD_GEN1(q
->genbit
);
855 e
->gen2
= V_CMD_GEN2(q
->genbit
);
859 if (++q
->pidx
== q
->size
) {
870 * Calls refill_free_list for both free lists. If we cannot fill at least 1/4
871 * of both rings, we go into 'few interrupt mode' in order to give the system
872 * time to free up resources.
874 static void freelQs_empty(struct sge
*sge
)
876 struct adapter
*adapter
= sge
->adapter
;
877 u32 irq_reg
= readl(adapter
->regs
+ A_SG_INT_ENABLE
);
880 refill_free_list(sge
, &sge
->freelQ
[0]);
881 refill_free_list(sge
, &sge
->freelQ
[1]);
883 if (sge
->freelQ
[0].credits
> (sge
->freelQ
[0].size
>> 2) &&
884 sge
->freelQ
[1].credits
> (sge
->freelQ
[1].size
>> 2)) {
885 irq_reg
|= F_FL_EXHAUSTED
;
886 irqholdoff_reg
= sge
->fixed_intrtimer
;
888 /* Clear the F_FL_EXHAUSTED interrupts for now */
889 irq_reg
&= ~F_FL_EXHAUSTED
;
890 irqholdoff_reg
= sge
->intrtimer_nres
;
892 writel(irqholdoff_reg
, adapter
->regs
+ A_SG_INTRTIMER
);
893 writel(irq_reg
, adapter
->regs
+ A_SG_INT_ENABLE
);
895 /* We reenable the Qs to force a freelist GTS interrupt later */
896 doorbell_pio(adapter
, F_FL0_ENABLE
| F_FL1_ENABLE
);
899 #define SGE_PL_INTR_MASK (F_PL_INTR_SGE_ERR | F_PL_INTR_SGE_DATA)
900 #define SGE_INT_FATAL (F_RESPQ_OVERFLOW | F_PACKET_TOO_BIG | F_PACKET_MISMATCH)
901 #define SGE_INT_ENABLE (F_RESPQ_EXHAUSTED | F_RESPQ_OVERFLOW | \
902 F_FL_EXHAUSTED | F_PACKET_TOO_BIG | F_PACKET_MISMATCH)
905 * Disable SGE Interrupts
907 void t1_sge_intr_disable(struct sge
*sge
)
909 u32 val
= readl(sge
->adapter
->regs
+ A_PL_ENABLE
);
911 writel(val
& ~SGE_PL_INTR_MASK
, sge
->adapter
->regs
+ A_PL_ENABLE
);
912 writel(0, sge
->adapter
->regs
+ A_SG_INT_ENABLE
);
916 * Enable SGE interrupts.
918 void t1_sge_intr_enable(struct sge
*sge
)
920 u32 en
= SGE_INT_ENABLE
;
921 u32 val
= readl(sge
->adapter
->regs
+ A_PL_ENABLE
);
923 if (sge
->adapter
->flags
& TSO_CAPABLE
)
924 en
&= ~F_PACKET_TOO_BIG
;
925 writel(en
, sge
->adapter
->regs
+ A_SG_INT_ENABLE
);
926 writel(val
| SGE_PL_INTR_MASK
, sge
->adapter
->regs
+ A_PL_ENABLE
);
930 * Clear SGE interrupts.
932 void t1_sge_intr_clear(struct sge
*sge
)
934 writel(SGE_PL_INTR_MASK
, sge
->adapter
->regs
+ A_PL_CAUSE
);
935 writel(0xffffffff, sge
->adapter
->regs
+ A_SG_INT_CAUSE
);
939 * SGE 'Error' interrupt handler
941 int t1_sge_intr_error_handler(struct sge
*sge
)
943 struct adapter
*adapter
= sge
->adapter
;
944 u32 cause
= readl(adapter
->regs
+ A_SG_INT_CAUSE
);
946 if (adapter
->flags
& TSO_CAPABLE
)
947 cause
&= ~F_PACKET_TOO_BIG
;
948 if (cause
& F_RESPQ_EXHAUSTED
)
949 sge
->stats
.respQ_empty
++;
950 if (cause
& F_RESPQ_OVERFLOW
) {
951 sge
->stats
.respQ_overflow
++;
952 CH_ALERT("%s: SGE response queue overflow\n",
955 if (cause
& F_FL_EXHAUSTED
) {
956 sge
->stats
.freelistQ_empty
++;
959 if (cause
& F_PACKET_TOO_BIG
) {
960 sge
->stats
.pkt_too_big
++;
961 CH_ALERT("%s: SGE max packet size exceeded\n",
964 if (cause
& F_PACKET_MISMATCH
) {
965 sge
->stats
.pkt_mismatch
++;
966 CH_ALERT("%s: SGE packet mismatch\n", adapter
->name
);
968 if (cause
& SGE_INT_FATAL
)
969 t1_fatal_err(adapter
);
971 writel(cause
, adapter
->regs
+ A_SG_INT_CAUSE
);
975 const struct sge_intr_counts
*t1_sge_get_intr_counts(const struct sge
*sge
)
980 void t1_sge_get_port_stats(const struct sge
*sge
, int port
,
981 struct sge_port_stats
*ss
)
985 memset(ss
, 0, sizeof(*ss
));
986 for_each_possible_cpu(cpu
) {
987 struct sge_port_stats
*st
= per_cpu_ptr(sge
->port_stats
[port
], cpu
);
989 ss
->rx_cso_good
+= st
->rx_cso_good
;
990 ss
->tx_cso
+= st
->tx_cso
;
991 ss
->tx_tso
+= st
->tx_tso
;
992 ss
->tx_need_hdrroom
+= st
->tx_need_hdrroom
;
993 ss
->vlan_xtract
+= st
->vlan_xtract
;
994 ss
->vlan_insert
+= st
->vlan_insert
;
999 * recycle_fl_buf - recycle a free list buffer
1000 * @fl: the free list
1001 * @idx: index of buffer to recycle
1003 * Recycles the specified buffer on the given free list by adding it at
1004 * the next available slot on the list.
1006 static void recycle_fl_buf(struct freelQ
*fl
, int idx
)
1008 struct freelQ_e
*from
= &fl
->entries
[idx
];
1009 struct freelQ_e
*to
= &fl
->entries
[fl
->pidx
];
1011 fl
->centries
[fl
->pidx
] = fl
->centries
[idx
];
1012 to
->addr_lo
= from
->addr_lo
;
1013 to
->addr_hi
= from
->addr_hi
;
1014 to
->len_gen
= G_CMD_LEN(from
->len_gen
) | V_CMD_GEN1(fl
->genbit
);
1016 to
->gen2
= V_CMD_GEN2(fl
->genbit
);
1019 if (++fl
->pidx
== fl
->size
) {
1025 static int copybreak __read_mostly
= 256;
1026 module_param(copybreak
, int, 0);
1027 MODULE_PARM_DESC(copybreak
, "Receive copy threshold");
1030 * get_packet - return the next ingress packet buffer
1031 * @pdev: the PCI device that received the packet
1032 * @fl: the SGE free list holding the packet
1033 * @len: the actual packet length, excluding any SGE padding
1034 * @dma_pad: padding at beginning of buffer left by SGE DMA
1035 * @skb_pad: padding to be used if the packet is copied
1036 * @copy_thres: length threshold under which a packet should be copied
1037 * @drop_thres: # of remaining buffers before we start dropping packets
1039 * Get the next packet from a free list and complete setup of the
1040 * sk_buff. If the packet is small we make a copy and recycle the
1041 * original buffer, otherwise we use the original buffer itself. If a
1042 * positive drop threshold is supplied packets are dropped and their
1043 * buffers recycled if (a) the number of remaining buffers is under the
1044 * threshold and the packet is too big to copy, or (b) the packet should
1045 * be copied but there is no memory for the copy.
1047 static inline struct sk_buff
*get_packet(struct pci_dev
*pdev
,
1048 struct freelQ
*fl
, unsigned int len
)
1050 struct sk_buff
*skb
;
1051 const struct freelQ_ce
*ce
= &fl
->centries
[fl
->cidx
];
1053 if (len
< copybreak
) {
1054 skb
= alloc_skb(len
+ 2, GFP_ATOMIC
);
1058 skb_reserve(skb
, 2); /* align IP header */
1060 pci_dma_sync_single_for_cpu(pdev
,
1061 pci_unmap_addr(ce
, dma_addr
),
1062 pci_unmap_len(ce
, dma_len
),
1063 PCI_DMA_FROMDEVICE
);
1064 skb_copy_from_linear_data(ce
->skb
, skb
->data
, len
);
1065 pci_dma_sync_single_for_device(pdev
,
1066 pci_unmap_addr(ce
, dma_addr
),
1067 pci_unmap_len(ce
, dma_len
),
1068 PCI_DMA_FROMDEVICE
);
1069 recycle_fl_buf(fl
, fl
->cidx
);
1074 if (fl
->credits
< 2) {
1075 recycle_fl_buf(fl
, fl
->cidx
);
1079 pci_unmap_single(pdev
, pci_unmap_addr(ce
, dma_addr
),
1080 pci_unmap_len(ce
, dma_len
), PCI_DMA_FROMDEVICE
);
1082 prefetch(skb
->data
);
1089 * unexpected_offload - handle an unexpected offload packet
1090 * @adapter: the adapter
1091 * @fl: the free list that received the packet
1093 * Called when we receive an unexpected offload packet (e.g., the TOE
1094 * function is disabled or the card is a NIC). Prints a message and
1095 * recycles the buffer.
1097 static void unexpected_offload(struct adapter
*adapter
, struct freelQ
*fl
)
1099 struct freelQ_ce
*ce
= &fl
->centries
[fl
->cidx
];
1100 struct sk_buff
*skb
= ce
->skb
;
1102 pci_dma_sync_single_for_cpu(adapter
->pdev
, pci_unmap_addr(ce
, dma_addr
),
1103 pci_unmap_len(ce
, dma_len
), PCI_DMA_FROMDEVICE
);
1104 CH_ERR("%s: unexpected offload packet, cmd %u\n",
1105 adapter
->name
, *skb
->data
);
1106 recycle_fl_buf(fl
, fl
->cidx
);
1110 * T1/T2 SGE limits the maximum DMA size per TX descriptor to
1111 * SGE_TX_DESC_MAX_PLEN (16KB). If the PAGE_SIZE is larger than 16KB, the
1112 * stack might send more than SGE_TX_DESC_MAX_PLEN in a contiguous manner.
1113 * Note that the *_large_page_tx_descs stuff will be optimized out when
1114 * PAGE_SIZE <= SGE_TX_DESC_MAX_PLEN.
1116 * compute_large_page_descs() computes how many additional descriptors are
1117 * required to break down the stack's request.
1119 static inline unsigned int compute_large_page_tx_descs(struct sk_buff
*skb
)
1121 unsigned int count
= 0;
1123 if (PAGE_SIZE
> SGE_TX_DESC_MAX_PLEN
) {
1124 unsigned int nfrags
= skb_shinfo(skb
)->nr_frags
;
1125 unsigned int i
, len
= skb
->len
- skb
->data_len
;
1126 while (len
> SGE_TX_DESC_MAX_PLEN
) {
1128 len
-= SGE_TX_DESC_MAX_PLEN
;
1130 for (i
= 0; nfrags
--; i
++) {
1131 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
1133 while (len
> SGE_TX_DESC_MAX_PLEN
) {
1135 len
-= SGE_TX_DESC_MAX_PLEN
;
1143 * Write a cmdQ entry.
1145 * Since this function writes the 'flags' field, it must not be used to
1146 * write the first cmdQ entry.
1148 static inline void write_tx_desc(struct cmdQ_e
*e
, dma_addr_t mapping
,
1149 unsigned int len
, unsigned int gen
,
1152 if (unlikely(len
> SGE_TX_DESC_MAX_PLEN
))
1154 e
->addr_lo
= (u32
)mapping
;
1155 e
->addr_hi
= (u64
)mapping
>> 32;
1156 e
->len_gen
= V_CMD_LEN(len
) | V_CMD_GEN1(gen
);
1157 e
->flags
= F_CMD_DATAVALID
| V_CMD_EOP(eop
) | V_CMD_GEN2(gen
);
1161 * See comment for previous function.
1163 * write_tx_descs_large_page() writes additional SGE tx descriptors if
1164 * *desc_len exceeds HW's capability.
1166 static inline unsigned int write_large_page_tx_descs(unsigned int pidx
,
1168 struct cmdQ_ce
**ce
,
1170 dma_addr_t
*desc_mapping
,
1171 unsigned int *desc_len
,
1172 unsigned int nfrags
,
1175 if (PAGE_SIZE
> SGE_TX_DESC_MAX_PLEN
) {
1176 struct cmdQ_e
*e1
= *e
;
1177 struct cmdQ_ce
*ce1
= *ce
;
1179 while (*desc_len
> SGE_TX_DESC_MAX_PLEN
) {
1180 *desc_len
-= SGE_TX_DESC_MAX_PLEN
;
1181 write_tx_desc(e1
, *desc_mapping
, SGE_TX_DESC_MAX_PLEN
,
1182 *gen
, nfrags
== 0 && *desc_len
== 0);
1184 pci_unmap_len_set(ce1
, dma_len
, 0);
1185 *desc_mapping
+= SGE_TX_DESC_MAX_PLEN
;
1189 if (++pidx
== q
->size
) {
1204 * Write the command descriptors to transmit the given skb starting at
1205 * descriptor pidx with the given generation.
1207 static inline void write_tx_descs(struct adapter
*adapter
, struct sk_buff
*skb
,
1208 unsigned int pidx
, unsigned int gen
,
1211 dma_addr_t mapping
, desc_mapping
;
1212 struct cmdQ_e
*e
, *e1
;
1214 unsigned int i
, flags
, first_desc_len
, desc_len
,
1215 nfrags
= skb_shinfo(skb
)->nr_frags
;
1217 e
= e1
= &q
->entries
[pidx
];
1218 ce
= &q
->centries
[pidx
];
1220 mapping
= pci_map_single(adapter
->pdev
, skb
->data
,
1221 skb
->len
- skb
->data_len
, PCI_DMA_TODEVICE
);
1223 desc_mapping
= mapping
;
1224 desc_len
= skb
->len
- skb
->data_len
;
1226 flags
= F_CMD_DATAVALID
| F_CMD_SOP
|
1227 V_CMD_EOP(nfrags
== 0 && desc_len
<= SGE_TX_DESC_MAX_PLEN
) |
1229 first_desc_len
= (desc_len
<= SGE_TX_DESC_MAX_PLEN
) ?
1230 desc_len
: SGE_TX_DESC_MAX_PLEN
;
1231 e
->addr_lo
= (u32
)desc_mapping
;
1232 e
->addr_hi
= (u64
)desc_mapping
>> 32;
1233 e
->len_gen
= V_CMD_LEN(first_desc_len
) | V_CMD_GEN1(gen
);
1235 pci_unmap_len_set(ce
, dma_len
, 0);
1237 if (PAGE_SIZE
> SGE_TX_DESC_MAX_PLEN
&&
1238 desc_len
> SGE_TX_DESC_MAX_PLEN
) {
1239 desc_mapping
+= first_desc_len
;
1240 desc_len
-= first_desc_len
;
1243 if (++pidx
== q
->size
) {
1249 pidx
= write_large_page_tx_descs(pidx
, &e1
, &ce
, &gen
,
1250 &desc_mapping
, &desc_len
,
1253 if (likely(desc_len
))
1254 write_tx_desc(e1
, desc_mapping
, desc_len
, gen
,
1259 pci_unmap_addr_set(ce
, dma_addr
, mapping
);
1260 pci_unmap_len_set(ce
, dma_len
, skb
->len
- skb
->data_len
);
1262 for (i
= 0; nfrags
--; i
++) {
1263 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
1266 if (++pidx
== q
->size
) {
1273 mapping
= pci_map_page(adapter
->pdev
, frag
->page
,
1274 frag
->page_offset
, frag
->size
,
1276 desc_mapping
= mapping
;
1277 desc_len
= frag
->size
;
1279 pidx
= write_large_page_tx_descs(pidx
, &e1
, &ce
, &gen
,
1280 &desc_mapping
, &desc_len
,
1282 if (likely(desc_len
))
1283 write_tx_desc(e1
, desc_mapping
, desc_len
, gen
,
1286 pci_unmap_addr_set(ce
, dma_addr
, mapping
);
1287 pci_unmap_len_set(ce
, dma_len
, frag
->size
);
1295 * Clean up completed Tx buffers.
1297 static inline void reclaim_completed_tx(struct sge
*sge
, struct cmdQ
*q
)
1299 unsigned int reclaim
= q
->processed
- q
->cleaned
;
1302 pr_debug("reclaim_completed_tx processed:%d cleaned:%d\n",
1303 q
->processed
, q
->cleaned
);
1304 free_cmdQ_buffers(sge
, q
, reclaim
);
1305 q
->cleaned
+= reclaim
;
1310 * Called from tasklet. Checks the scheduler for any
1311 * pending skbs that can be sent.
1313 static void restart_sched(unsigned long arg
)
1315 struct sge
*sge
= (struct sge
*) arg
;
1316 struct adapter
*adapter
= sge
->adapter
;
1317 struct cmdQ
*q
= &sge
->cmdQ
[0];
1318 struct sk_buff
*skb
;
1319 unsigned int credits
, queued_skb
= 0;
1321 spin_lock(&q
->lock
);
1322 reclaim_completed_tx(sge
, q
);
1324 credits
= q
->size
- q
->in_use
;
1325 pr_debug("restart_sched credits=%d\n", credits
);
1326 while ((skb
= sched_skb(sge
, NULL
, credits
)) != NULL
) {
1327 unsigned int genbit
, pidx
, count
;
1328 count
= 1 + skb_shinfo(skb
)->nr_frags
;
1329 count
+= compute_large_page_tx_descs(skb
);
1334 if (q
->pidx
>= q
->size
) {
1338 write_tx_descs(adapter
, skb
, pidx
, genbit
, q
);
1339 credits
= q
->size
- q
->in_use
;
1344 clear_bit(CMDQ_STAT_LAST_PKT_DB
, &q
->status
);
1345 if (test_and_set_bit(CMDQ_STAT_RUNNING
, &q
->status
) == 0) {
1346 set_bit(CMDQ_STAT_LAST_PKT_DB
, &q
->status
);
1347 writel(F_CMDQ0_ENABLE
, adapter
->regs
+ A_SG_DOORBELL
);
1350 spin_unlock(&q
->lock
);
1354 * sge_rx - process an ingress ethernet packet
1355 * @sge: the sge structure
1356 * @fl: the free list that contains the packet buffer
1357 * @len: the packet length
1359 * Process an ingress ethernet pakcet and deliver it to the stack.
1361 static void sge_rx(struct sge
*sge
, struct freelQ
*fl
, unsigned int len
)
1363 struct sk_buff
*skb
;
1364 const struct cpl_rx_pkt
*p
;
1365 struct adapter
*adapter
= sge
->adapter
;
1366 struct sge_port_stats
*st
;
1368 skb
= get_packet(adapter
->pdev
, fl
, len
- sge
->rx_pkt_pad
);
1369 if (unlikely(!skb
)) {
1370 sge
->stats
.rx_drops
++;
1374 p
= (const struct cpl_rx_pkt
*) skb
->data
;
1375 if (p
->iff
>= adapter
->params
.nports
) {
1379 __skb_pull(skb
, sizeof(*p
));
1381 st
= per_cpu_ptr(sge
->port_stats
[p
->iff
], smp_processor_id());
1383 skb
->protocol
= eth_type_trans(skb
, adapter
->port
[p
->iff
].dev
);
1384 skb
->dev
->last_rx
= jiffies
;
1385 if ((adapter
->flags
& RX_CSUM_ENABLED
) && p
->csum
== 0xffff &&
1386 skb
->protocol
== htons(ETH_P_IP
) &&
1387 (skb
->data
[9] == IPPROTO_TCP
|| skb
->data
[9] == IPPROTO_UDP
)) {
1389 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1391 skb
->ip_summed
= CHECKSUM_NONE
;
1393 if (unlikely(adapter
->vlan_grp
&& p
->vlan_valid
)) {
1395 #ifdef CONFIG_CHELSIO_T1_NAPI
1396 vlan_hwaccel_receive_skb(skb
, adapter
->vlan_grp
,
1399 vlan_hwaccel_rx(skb
, adapter
->vlan_grp
,
1403 #ifdef CONFIG_CHELSIO_T1_NAPI
1404 netif_receive_skb(skb
);
1412 * Returns true if a command queue has enough available descriptors that
1413 * we can resume Tx operation after temporarily disabling its packet queue.
1415 static inline int enough_free_Tx_descs(const struct cmdQ
*q
)
1417 unsigned int r
= q
->processed
- q
->cleaned
;
1419 return q
->in_use
- r
< (q
->size
>> 1);
1423 * Called when sufficient space has become available in the SGE command queues
1424 * after the Tx packet schedulers have been suspended to restart the Tx path.
1426 static void restart_tx_queues(struct sge
*sge
)
1428 struct adapter
*adap
= sge
->adapter
;
1431 if (!enough_free_Tx_descs(&sge
->cmdQ
[0]))
1434 for_each_port(adap
, i
) {
1435 struct net_device
*nd
= adap
->port
[i
].dev
;
1437 if (test_and_clear_bit(nd
->if_port
, &sge
->stopped_tx_queues
) &&
1438 netif_running(nd
)) {
1439 sge
->stats
.cmdQ_restarted
[2]++;
1440 netif_wake_queue(nd
);
1446 * update_tx_info is called from the interrupt handler/NAPI to return cmdQ0
1449 static unsigned int update_tx_info(struct adapter
*adapter
,
1453 struct sge
*sge
= adapter
->sge
;
1454 struct cmdQ
*cmdq
= &sge
->cmdQ
[0];
1456 cmdq
->processed
+= pr0
;
1457 if (flags
& (F_FL0_ENABLE
| F_FL1_ENABLE
)) {
1459 flags
&= ~(F_FL0_ENABLE
| F_FL1_ENABLE
);
1461 if (flags
& F_CMDQ0_ENABLE
) {
1462 clear_bit(CMDQ_STAT_RUNNING
, &cmdq
->status
);
1464 if (cmdq
->cleaned
+ cmdq
->in_use
!= cmdq
->processed
&&
1465 !test_and_set_bit(CMDQ_STAT_LAST_PKT_DB
, &cmdq
->status
)) {
1466 set_bit(CMDQ_STAT_RUNNING
, &cmdq
->status
);
1467 writel(F_CMDQ0_ENABLE
, adapter
->regs
+ A_SG_DOORBELL
);
1470 tasklet_hi_schedule(&sge
->tx_sched
->sched_tsk
);
1472 flags
&= ~F_CMDQ0_ENABLE
;
1475 if (unlikely(sge
->stopped_tx_queues
!= 0))
1476 restart_tx_queues(sge
);
1482 * Process SGE responses, up to the supplied budget. Returns the number of
1483 * responses processed. A negative budget is effectively unlimited.
1485 static int process_responses(struct adapter
*adapter
, int budget
)
1487 struct sge
*sge
= adapter
->sge
;
1488 struct respQ
*q
= &sge
->respQ
;
1489 struct respQ_e
*e
= &q
->entries
[q
->cidx
];
1491 unsigned int flags
= 0;
1492 unsigned int cmdq_processed
[SGE_CMDQ_N
] = {0, 0};
1494 while (done
< budget
&& e
->GenerationBit
== q
->genbit
) {
1495 flags
|= e
->Qsleeping
;
1497 cmdq_processed
[0] += e
->Cmdq0CreditReturn
;
1498 cmdq_processed
[1] += e
->Cmdq1CreditReturn
;
1500 /* We batch updates to the TX side to avoid cacheline
1501 * ping-pong of TX state information on MP where the sender
1502 * might run on a different CPU than this function...
1504 if (unlikely((flags
& F_CMDQ0_ENABLE
) || cmdq_processed
[0] > 64)) {
1505 flags
= update_tx_info(adapter
, flags
, cmdq_processed
[0]);
1506 cmdq_processed
[0] = 0;
1509 if (unlikely(cmdq_processed
[1] > 16)) {
1510 sge
->cmdQ
[1].processed
+= cmdq_processed
[1];
1511 cmdq_processed
[1] = 0;
1514 if (likely(e
->DataValid
)) {
1515 struct freelQ
*fl
= &sge
->freelQ
[e
->FreelistQid
];
1517 BUG_ON(!e
->Sop
|| !e
->Eop
);
1518 if (unlikely(e
->Offload
))
1519 unexpected_offload(adapter
, fl
);
1521 sge_rx(sge
, fl
, e
->BufferLength
);
1526 * Note: this depends on each packet consuming a
1527 * single free-list buffer; cf. the BUG above.
1529 if (++fl
->cidx
== fl
->size
)
1531 prefetch(fl
->centries
[fl
->cidx
].skb
);
1533 if (unlikely(--fl
->credits
<
1534 fl
->size
- SGE_FREEL_REFILL_THRESH
))
1535 refill_free_list(sge
, fl
);
1537 sge
->stats
.pure_rsps
++;
1540 if (unlikely(++q
->cidx
== q
->size
)) {
1547 if (++q
->credits
> SGE_RESPQ_REPLENISH_THRES
) {
1548 writel(q
->credits
, adapter
->regs
+ A_SG_RSPQUEUECREDIT
);
1553 flags
= update_tx_info(adapter
, flags
, cmdq_processed
[0]);
1554 sge
->cmdQ
[1].processed
+= cmdq_processed
[1];
1559 static inline int responses_pending(const struct adapter
*adapter
)
1561 const struct respQ
*Q
= &adapter
->sge
->respQ
;
1562 const struct respQ_e
*e
= &Q
->entries
[Q
->cidx
];
1564 return (e
->GenerationBit
== Q
->genbit
);
1567 #ifdef CONFIG_CHELSIO_T1_NAPI
1569 * A simpler version of process_responses() that handles only pure (i.e.,
1570 * non data-carrying) responses. Such respones are too light-weight to justify
1571 * calling a softirq when using NAPI, so we handle them specially in hard
1572 * interrupt context. The function is called with a pointer to a response,
1573 * which the caller must ensure is a valid pure response. Returns 1 if it
1574 * encounters a valid data-carrying response, 0 otherwise.
1576 static int process_pure_responses(struct adapter
*adapter
)
1578 struct sge
*sge
= adapter
->sge
;
1579 struct respQ
*q
= &sge
->respQ
;
1580 struct respQ_e
*e
= &q
->entries
[q
->cidx
];
1581 const struct freelQ
*fl
= &sge
->freelQ
[e
->FreelistQid
];
1582 unsigned int flags
= 0;
1583 unsigned int cmdq_processed
[SGE_CMDQ_N
] = {0, 0};
1585 prefetch(fl
->centries
[fl
->cidx
].skb
);
1590 flags
|= e
->Qsleeping
;
1592 cmdq_processed
[0] += e
->Cmdq0CreditReturn
;
1593 cmdq_processed
[1] += e
->Cmdq1CreditReturn
;
1596 if (unlikely(++q
->cidx
== q
->size
)) {
1603 if (++q
->credits
> SGE_RESPQ_REPLENISH_THRES
) {
1604 writel(q
->credits
, adapter
->regs
+ A_SG_RSPQUEUECREDIT
);
1607 sge
->stats
.pure_rsps
++;
1608 } while (e
->GenerationBit
== q
->genbit
&& !e
->DataValid
);
1610 flags
= update_tx_info(adapter
, flags
, cmdq_processed
[0]);
1611 sge
->cmdQ
[1].processed
+= cmdq_processed
[1];
1613 return e
->GenerationBit
== q
->genbit
;
1617 * Handler for new data events when using NAPI. This does not need any locking
1618 * or protection from interrupts as data interrupts are off at this point and
1619 * other adapter interrupts do not interfere.
1621 int t1_poll(struct napi_struct
*napi
, int budget
)
1623 struct adapter
*adapter
= container_of(napi
, struct adapter
, napi
);
1624 struct net_device
*dev
= adapter
->port
[0].dev
;
1625 int work_done
= process_responses(adapter
, budget
);
1627 if (likely(work_done
< budget
)) {
1628 netif_rx_complete(dev
, napi
);
1629 writel(adapter
->sge
->respQ
.cidx
,
1630 adapter
->regs
+ A_SG_SLEEPING
);
1636 * NAPI version of the main interrupt handler.
1638 irqreturn_t
t1_interrupt(int irq
, void *data
)
1640 struct adapter
*adapter
= data
;
1641 struct sge
*sge
= adapter
->sge
;
1644 if (likely(responses_pending(adapter
))) {
1645 struct net_device
*dev
= sge
->netdev
;
1647 writel(F_PL_INTR_SGE_DATA
, adapter
->regs
+ A_PL_CAUSE
);
1649 if (napi_schedule_prep(&adapter
->napi
)) {
1650 if (process_pure_responses(adapter
))
1651 __netif_rx_schedule(dev
, &adapter
->napi
);
1653 /* no data, no NAPI needed */
1654 writel(sge
->respQ
.cidx
, adapter
->regs
+ A_SG_SLEEPING
);
1655 napi_enable(&adapter
->napi
); /* undo schedule_prep */
1661 spin_lock(&adapter
->async_lock
);
1662 handled
= t1_slow_intr_handler(adapter
);
1663 spin_unlock(&adapter
->async_lock
);
1666 sge
->stats
.unhandled_irqs
++;
1668 return IRQ_RETVAL(handled
!= 0);
1673 * Main interrupt handler, optimized assuming that we took a 'DATA'
1676 * 1. Clear the interrupt
1677 * 2. Loop while we find valid descriptors and process them; accumulate
1678 * information that can be processed after the loop
1679 * 3. Tell the SGE at which index we stopped processing descriptors
1680 * 4. Bookkeeping; free TX buffers, ring doorbell if there are any
1681 * outstanding TX buffers waiting, replenish RX buffers, potentially
1682 * reenable upper layers if they were turned off due to lack of TX
1683 * resources which are available again.
1684 * 5. If we took an interrupt, but no valid respQ descriptors was found we
1685 * let the slow_intr_handler run and do error handling.
1687 irqreturn_t
t1_interrupt(int irq
, void *cookie
)
1690 struct adapter
*adapter
= cookie
;
1691 struct respQ
*Q
= &adapter
->sge
->respQ
;
1693 spin_lock(&adapter
->async_lock
);
1695 writel(F_PL_INTR_SGE_DATA
, adapter
->regs
+ A_PL_CAUSE
);
1697 if (likely(responses_pending(adapter
)))
1698 work_done
= process_responses(adapter
, -1);
1700 work_done
= t1_slow_intr_handler(adapter
);
1703 * The unconditional clearing of the PL_CAUSE above may have raced
1704 * with DMA completion and the corresponding generation of a response
1705 * to cause us to miss the resulting data interrupt. The next write
1706 * is also unconditional to recover the missed interrupt and render
1707 * this race harmless.
1709 writel(Q
->cidx
, adapter
->regs
+ A_SG_SLEEPING
);
1712 adapter
->sge
->stats
.unhandled_irqs
++;
1713 spin_unlock(&adapter
->async_lock
);
1714 return IRQ_RETVAL(work_done
!= 0);
1719 * Enqueues the sk_buff onto the cmdQ[qid] and has hardware fetch it.
1721 * The code figures out how many entries the sk_buff will require in the
1722 * cmdQ and updates the cmdQ data structure with the state once the enqueue
1723 * has complete. Then, it doesn't access the global structure anymore, but
1724 * uses the corresponding fields on the stack. In conjuction with a spinlock
1725 * around that code, we can make the function reentrant without holding the
1726 * lock when we actually enqueue (which might be expensive, especially on
1727 * architectures with IO MMUs).
1729 * This runs with softirqs disabled.
1731 static int t1_sge_tx(struct sk_buff
*skb
, struct adapter
*adapter
,
1732 unsigned int qid
, struct net_device
*dev
)
1734 struct sge
*sge
= adapter
->sge
;
1735 struct cmdQ
*q
= &sge
->cmdQ
[qid
];
1736 unsigned int credits
, pidx
, genbit
, count
, use_sched_skb
= 0;
1738 if (!spin_trylock(&q
->lock
))
1739 return NETDEV_TX_LOCKED
;
1741 reclaim_completed_tx(sge
, q
);
1744 credits
= q
->size
- q
->in_use
;
1745 count
= 1 + skb_shinfo(skb
)->nr_frags
;
1746 count
+= compute_large_page_tx_descs(skb
);
1748 /* Ethernet packet */
1749 if (unlikely(credits
< count
)) {
1750 if (!netif_queue_stopped(dev
)) {
1751 netif_stop_queue(dev
);
1752 set_bit(dev
->if_port
, &sge
->stopped_tx_queues
);
1753 sge
->stats
.cmdQ_full
[2]++;
1754 CH_ERR("%s: Tx ring full while queue awake!\n",
1757 spin_unlock(&q
->lock
);
1758 return NETDEV_TX_BUSY
;
1761 if (unlikely(credits
- count
< q
->stop_thres
)) {
1762 netif_stop_queue(dev
);
1763 set_bit(dev
->if_port
, &sge
->stopped_tx_queues
);
1764 sge
->stats
.cmdQ_full
[2]++;
1767 /* T204 cmdQ0 skbs that are destined for a certain port have to go
1768 * through the scheduler.
1770 if (sge
->tx_sched
&& !qid
&& skb
->dev
) {
1773 /* Note that the scheduler might return a different skb than
1774 * the one passed in.
1776 skb
= sched_skb(sge
, skb
, credits
);
1778 spin_unlock(&q
->lock
);
1779 return NETDEV_TX_OK
;
1782 count
= 1 + skb_shinfo(skb
)->nr_frags
;
1783 count
+= compute_large_page_tx_descs(skb
);
1790 if (q
->pidx
>= q
->size
) {
1794 spin_unlock(&q
->lock
);
1796 write_tx_descs(adapter
, skb
, pidx
, genbit
, q
);
1799 * We always ring the doorbell for cmdQ1. For cmdQ0, we only ring
1800 * the doorbell if the Q is asleep. There is a natural race, where
1801 * the hardware is going to sleep just after we checked, however,
1802 * then the interrupt handler will detect the outstanding TX packet
1803 * and ring the doorbell for us.
1806 doorbell_pio(adapter
, F_CMDQ1_ENABLE
);
1808 clear_bit(CMDQ_STAT_LAST_PKT_DB
, &q
->status
);
1809 if (test_and_set_bit(CMDQ_STAT_RUNNING
, &q
->status
) == 0) {
1810 set_bit(CMDQ_STAT_LAST_PKT_DB
, &q
->status
);
1811 writel(F_CMDQ0_ENABLE
, adapter
->regs
+ A_SG_DOORBELL
);
1815 if (use_sched_skb
) {
1816 if (spin_trylock(&q
->lock
)) {
1817 credits
= q
->size
- q
->in_use
;
1822 return NETDEV_TX_OK
;
1825 #define MK_ETH_TYPE_MSS(type, mss) (((mss) & 0x3FFF) | ((type) << 14))
1828 * eth_hdr_len - return the length of an Ethernet header
1829 * @data: pointer to the start of the Ethernet header
1831 * Returns the length of an Ethernet header, including optional VLAN tag.
1833 static inline int eth_hdr_len(const void *data
)
1835 const struct ethhdr
*e
= data
;
1837 return e
->h_proto
== htons(ETH_P_8021Q
) ? VLAN_ETH_HLEN
: ETH_HLEN
;
1841 * Adds the CPL header to the sk_buff and passes it to t1_sge_tx.
1843 int t1_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1845 struct adapter
*adapter
= dev
->priv
;
1846 struct sge
*sge
= adapter
->sge
;
1847 struct sge_port_stats
*st
= per_cpu_ptr(sge
->port_stats
[dev
->if_port
],
1848 smp_processor_id());
1849 struct cpl_tx_pkt
*cpl
;
1850 struct sk_buff
*orig_skb
= skb
;
1853 if (skb
->protocol
== htons(ETH_P_CPL5
))
1857 * We are using a non-standard hard_header_len.
1858 * Allocate more header room in the rare cases it is not big enough.
1860 if (unlikely(skb_headroom(skb
) < dev
->hard_header_len
- ETH_HLEN
)) {
1861 skb
= skb_realloc_headroom(skb
, sizeof(struct cpl_tx_pkt_lso
));
1862 ++st
->tx_need_hdrroom
;
1863 dev_kfree_skb_any(orig_skb
);
1865 return NETDEV_TX_OK
;
1868 if (skb_shinfo(skb
)->gso_size
) {
1870 struct cpl_tx_pkt_lso
*hdr
;
1874 eth_type
= skb_network_offset(skb
) == ETH_HLEN
?
1875 CPL_ETH_II
: CPL_ETH_II_VLAN
;
1877 hdr
= (struct cpl_tx_pkt_lso
*)skb_push(skb
, sizeof(*hdr
));
1878 hdr
->opcode
= CPL_TX_PKT_LSO
;
1879 hdr
->ip_csum_dis
= hdr
->l4_csum_dis
= 0;
1880 hdr
->ip_hdr_words
= ip_hdr(skb
)->ihl
;
1881 hdr
->tcp_hdr_words
= tcp_hdr(skb
)->doff
;
1882 hdr
->eth_type_mss
= htons(MK_ETH_TYPE_MSS(eth_type
,
1883 skb_shinfo(skb
)->gso_size
));
1884 hdr
->len
= htonl(skb
->len
- sizeof(*hdr
));
1885 cpl
= (struct cpl_tx_pkt
*)hdr
;
1888 * Packets shorter than ETH_HLEN can break the MAC, drop them
1889 * early. Also, we may get oversized packets because some
1890 * parts of the kernel don't handle our unusual hard_header_len
1891 * right, drop those too.
1893 if (unlikely(skb
->len
< ETH_HLEN
||
1894 skb
->len
> dev
->mtu
+ eth_hdr_len(skb
->data
))) {
1895 pr_debug("%s: packet size %d hdr %d mtu%d\n", dev
->name
,
1896 skb
->len
, eth_hdr_len(skb
->data
), dev
->mtu
);
1897 dev_kfree_skb_any(skb
);
1898 return NETDEV_TX_OK
;
1901 if (!(adapter
->flags
& UDP_CSUM_CAPABLE
) &&
1902 skb
->ip_summed
== CHECKSUM_PARTIAL
&&
1903 ip_hdr(skb
)->protocol
== IPPROTO_UDP
) {
1904 if (unlikely(skb_checksum_help(skb
))) {
1905 pr_debug("%s: unable to do udp checksum\n", dev
->name
);
1906 dev_kfree_skb_any(skb
);
1907 return NETDEV_TX_OK
;
1911 /* Hmmm, assuming to catch the gratious arp... and we'll use
1912 * it to flush out stuck espi packets...
1914 if ((unlikely(!adapter
->sge
->espibug_skb
[dev
->if_port
]))) {
1915 if (skb
->protocol
== htons(ETH_P_ARP
) &&
1916 arp_hdr(skb
)->ar_op
== htons(ARPOP_REQUEST
)) {
1917 adapter
->sge
->espibug_skb
[dev
->if_port
] = skb
;
1918 /* We want to re-use this skb later. We
1919 * simply bump the reference count and it
1920 * will not be freed...
1926 cpl
= (struct cpl_tx_pkt
*)__skb_push(skb
, sizeof(*cpl
));
1927 cpl
->opcode
= CPL_TX_PKT
;
1928 cpl
->ip_csum_dis
= 1; /* SW calculates IP csum */
1929 cpl
->l4_csum_dis
= skb
->ip_summed
== CHECKSUM_PARTIAL
? 0 : 1;
1930 /* the length field isn't used so don't bother setting it */
1932 st
->tx_cso
+= (skb
->ip_summed
== CHECKSUM_PARTIAL
);
1934 cpl
->iff
= dev
->if_port
;
1936 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1937 if (adapter
->vlan_grp
&& vlan_tx_tag_present(skb
)) {
1938 cpl
->vlan_valid
= 1;
1939 cpl
->vlan
= htons(vlan_tx_tag_get(skb
));
1943 cpl
->vlan_valid
= 0;
1946 dev
->trans_start
= jiffies
;
1947 ret
= t1_sge_tx(skb
, adapter
, 0, dev
);
1949 /* If transmit busy, and we reallocated skb's due to headroom limit,
1950 * then silently discard to avoid leak.
1952 if (unlikely(ret
!= NETDEV_TX_OK
&& skb
!= orig_skb
)) {
1953 dev_kfree_skb_any(skb
);
1960 * Callback for the Tx buffer reclaim timer. Runs with softirqs disabled.
1962 static void sge_tx_reclaim_cb(unsigned long data
)
1965 struct sge
*sge
= (struct sge
*)data
;
1967 for (i
= 0; i
< SGE_CMDQ_N
; ++i
) {
1968 struct cmdQ
*q
= &sge
->cmdQ
[i
];
1970 if (!spin_trylock(&q
->lock
))
1973 reclaim_completed_tx(sge
, q
);
1974 if (i
== 0 && q
->in_use
) { /* flush pending credits */
1975 writel(F_CMDQ0_ENABLE
, sge
->adapter
->regs
+ A_SG_DOORBELL
);
1977 spin_unlock(&q
->lock
);
1979 mod_timer(&sge
->tx_reclaim_timer
, jiffies
+ TX_RECLAIM_PERIOD
);
1983 * Propagate changes of the SGE coalescing parameters to the HW.
1985 int t1_sge_set_coalesce_params(struct sge
*sge
, struct sge_params
*p
)
1987 sge
->fixed_intrtimer
= p
->rx_coalesce_usecs
*
1988 core_ticks_per_usec(sge
->adapter
);
1989 writel(sge
->fixed_intrtimer
, sge
->adapter
->regs
+ A_SG_INTRTIMER
);
1994 * Allocates both RX and TX resources and configures the SGE. However,
1995 * the hardware is not enabled yet.
1997 int t1_sge_configure(struct sge
*sge
, struct sge_params
*p
)
1999 if (alloc_rx_resources(sge
, p
))
2001 if (alloc_tx_resources(sge
, p
)) {
2002 free_rx_resources(sge
);
2005 configure_sge(sge
, p
);
2008 * Now that we have sized the free lists calculate the payload
2009 * capacity of the large buffers. Other parts of the driver use
2010 * this to set the max offload coalescing size so that RX packets
2011 * do not overflow our large buffers.
2013 p
->large_buf_capacity
= jumbo_payload_capacity(sge
);
2018 * Disables the DMA engine.
2020 void t1_sge_stop(struct sge
*sge
)
2023 writel(0, sge
->adapter
->regs
+ A_SG_CONTROL
);
2024 readl(sge
->adapter
->regs
+ A_SG_CONTROL
); /* flush */
2026 if (is_T2(sge
->adapter
))
2027 del_timer_sync(&sge
->espibug_timer
);
2029 del_timer_sync(&sge
->tx_reclaim_timer
);
2033 for (i
= 0; i
< MAX_NPORTS
; i
++)
2034 if (sge
->espibug_skb
[i
])
2035 kfree_skb(sge
->espibug_skb
[i
]);
2039 * Enables the DMA engine.
2041 void t1_sge_start(struct sge
*sge
)
2043 refill_free_list(sge
, &sge
->freelQ
[0]);
2044 refill_free_list(sge
, &sge
->freelQ
[1]);
2046 writel(sge
->sge_control
, sge
->adapter
->regs
+ A_SG_CONTROL
);
2047 doorbell_pio(sge
->adapter
, F_FL0_ENABLE
| F_FL1_ENABLE
);
2048 readl(sge
->adapter
->regs
+ A_SG_CONTROL
); /* flush */
2050 mod_timer(&sge
->tx_reclaim_timer
, jiffies
+ TX_RECLAIM_PERIOD
);
2052 if (is_T2(sge
->adapter
))
2053 mod_timer(&sge
->espibug_timer
, jiffies
+ sge
->espibug_timeout
);
2057 * Callback for the T2 ESPI 'stuck packet feature' workaorund
2059 static void espibug_workaround_t204(unsigned long data
)
2061 struct adapter
*adapter
= (struct adapter
*)data
;
2062 struct sge
*sge
= adapter
->sge
;
2063 unsigned int nports
= adapter
->params
.nports
;
2064 u32 seop
[MAX_NPORTS
];
2066 if (adapter
->open_device_map
& PORT_MASK
) {
2069 if (t1_espi_get_mon_t204(adapter
, &(seop
[0]), 0) < 0)
2072 for (i
= 0; i
< nports
; i
++) {
2073 struct sk_buff
*skb
= sge
->espibug_skb
[i
];
2075 if (!netif_running(adapter
->port
[i
].dev
) ||
2076 netif_queue_stopped(adapter
->port
[i
].dev
) ||
2077 !seop
[i
] || ((seop
[i
] & 0xfff) != 0) || !skb
)
2081 u8 ch_mac_addr
[ETH_ALEN
] = {
2082 0x0, 0x7, 0x43, 0x0, 0x0, 0x0
2085 skb_copy_to_linear_data_offset(skb
,
2086 sizeof(struct cpl_tx_pkt
),
2089 skb_copy_to_linear_data_offset(skb
,
2096 /* bump the reference count to avoid freeing of
2097 * the skb once the DMA has completed.
2100 t1_sge_tx(skb
, adapter
, 0, adapter
->port
[i
].dev
);
2103 mod_timer(&sge
->espibug_timer
, jiffies
+ sge
->espibug_timeout
);
2106 static void espibug_workaround(unsigned long data
)
2108 struct adapter
*adapter
= (struct adapter
*)data
;
2109 struct sge
*sge
= adapter
->sge
;
2111 if (netif_running(adapter
->port
[0].dev
)) {
2112 struct sk_buff
*skb
= sge
->espibug_skb
[0];
2113 u32 seop
= t1_espi_get_mon(adapter
, 0x930, 0);
2115 if ((seop
& 0xfff0fff) == 0xfff && skb
) {
2117 u8 ch_mac_addr
[ETH_ALEN
] =
2118 {0x0, 0x7, 0x43, 0x0, 0x0, 0x0};
2119 skb_copy_to_linear_data_offset(skb
,
2120 sizeof(struct cpl_tx_pkt
),
2123 skb_copy_to_linear_data_offset(skb
,
2130 /* bump the reference count to avoid freeing of the
2131 * skb once the DMA has completed.
2134 t1_sge_tx(skb
, adapter
, 0, adapter
->port
[0].dev
);
2137 mod_timer(&sge
->espibug_timer
, jiffies
+ sge
->espibug_timeout
);
2141 * Creates a t1_sge structure and returns suggested resource parameters.
2143 struct sge
* __devinit
t1_sge_create(struct adapter
*adapter
,
2144 struct sge_params
*p
)
2146 struct sge
*sge
= kzalloc(sizeof(*sge
), GFP_KERNEL
);
2152 sge
->adapter
= adapter
;
2153 sge
->netdev
= adapter
->port
[0].dev
;
2154 sge
->rx_pkt_pad
= t1_is_T1B(adapter
) ? 0 : 2;
2155 sge
->jumbo_fl
= t1_is_T1B(adapter
) ? 1 : 0;
2157 for_each_port(adapter
, i
) {
2158 sge
->port_stats
[i
] = alloc_percpu(struct sge_port_stats
);
2159 if (!sge
->port_stats
[i
])
2163 init_timer(&sge
->tx_reclaim_timer
);
2164 sge
->tx_reclaim_timer
.data
= (unsigned long)sge
;
2165 sge
->tx_reclaim_timer
.function
= sge_tx_reclaim_cb
;
2167 if (is_T2(sge
->adapter
)) {
2168 init_timer(&sge
->espibug_timer
);
2170 if (adapter
->params
.nports
> 1) {
2172 sge
->espibug_timer
.function
= espibug_workaround_t204
;
2174 sge
->espibug_timer
.function
= espibug_workaround
;
2175 sge
->espibug_timer
.data
= (unsigned long)sge
->adapter
;
2177 sge
->espibug_timeout
= 1;
2178 /* for T204, every 10ms */
2179 if (adapter
->params
.nports
> 1)
2180 sge
->espibug_timeout
= HZ
/100;
2184 p
->cmdQ_size
[0] = SGE_CMDQ0_E_N
;
2185 p
->cmdQ_size
[1] = SGE_CMDQ1_E_N
;
2186 p
->freelQ_size
[!sge
->jumbo_fl
] = SGE_FREEL_SIZE
;
2187 p
->freelQ_size
[sge
->jumbo_fl
] = SGE_JUMBO_FREEL_SIZE
;
2188 if (sge
->tx_sched
) {
2189 if (board_info(sge
->adapter
)->board
== CHBT_BOARD_CHT204
)
2190 p
->rx_coalesce_usecs
= 15;
2192 p
->rx_coalesce_usecs
= 50;
2194 p
->rx_coalesce_usecs
= 50;
2196 p
->coalesce_enable
= 0;
2197 p
->sample_interval_usecs
= 0;
2202 free_percpu(sge
->port_stats
[i
]);