iwlwifi: split the drivers for agn and legacy devices 3945/4965
[linux-2.6.git] / drivers / net / wireless / iwlegacy / iwl-tx.c
blob7db8340d1c07d38d9dea34677c8db0be06f212a0
1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/etherdevice.h>
31 #include <linux/sched.h>
32 #include <linux/slab.h>
33 #include <net/mac80211.h>
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h"
36 #include "iwl-core.h"
37 #include "iwl-sta.h"
38 #include "iwl-io.h"
39 #include "iwl-helpers.h"
41 /**
42 * iwl_legacy_txq_update_write_ptr - Send new write index to hardware
44 void
45 iwl_legacy_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
47 u32 reg = 0;
48 int txq_id = txq->q.id;
50 if (txq->need_update == 0)
51 return;
53 /* if we're trying to save power */
54 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
55 /* wake up nic if it's powered down ...
56 * uCode will wake up, and interrupt us again, so next
57 * time we'll skip this part. */
58 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
60 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
61 IWL_DEBUG_INFO(priv,
62 "Tx queue %d requesting wakeup,"
63 " GP1 = 0x%x\n", txq_id, reg);
64 iwl_legacy_set_bit(priv, CSR_GP_CNTRL,
65 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
66 return;
69 iwl_legacy_write_direct32(priv, HBUS_TARG_WRPTR,
70 txq->q.write_ptr | (txq_id << 8));
73 * else not in power-save mode,
74 * uCode will never sleep when we're
75 * trying to tx (during RFKILL, we're not trying to tx).
77 } else
78 iwl_write32(priv, HBUS_TARG_WRPTR,
79 txq->q.write_ptr | (txq_id << 8));
80 txq->need_update = 0;
82 EXPORT_SYMBOL(iwl_legacy_txq_update_write_ptr);
84 /**
85 * iwl_legacy_tx_queue_free - Deallocate DMA queue.
86 * @txq: Transmit queue to deallocate.
88 * Empty queue by removing and destroying all BD's.
89 * Free all buffers.
90 * 0-fill, but do not free "txq" descriptor structure.
92 void iwl_legacy_tx_queue_free(struct iwl_priv *priv, int txq_id)
94 struct iwl_tx_queue *txq = &priv->txq[txq_id];
95 struct iwl_queue *q = &txq->q;
96 struct device *dev = &priv->pci_dev->dev;
97 int i;
99 if (q->n_bd == 0)
100 return;
102 /* first, empty all BD's */
103 for (; q->write_ptr != q->read_ptr;
104 q->read_ptr = iwl_legacy_queue_inc_wrap(q->read_ptr, q->n_bd))
105 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
107 /* De-alloc array of command/tx buffers */
108 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
109 kfree(txq->cmd[i]);
111 /* De-alloc circular buffer of TFDs */
112 if (txq->q.n_bd)
113 dma_free_coherent(dev, priv->hw_params.tfd_size *
114 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
116 /* De-alloc array of per-TFD driver data */
117 kfree(txq->txb);
118 txq->txb = NULL;
120 /* deallocate arrays */
121 kfree(txq->cmd);
122 kfree(txq->meta);
123 txq->cmd = NULL;
124 txq->meta = NULL;
126 /* 0-fill queue descriptor structure */
127 memset(txq, 0, sizeof(*txq));
129 EXPORT_SYMBOL(iwl_legacy_tx_queue_free);
132 * iwl_legacy_cmd_queue_free - Deallocate DMA queue.
133 * @txq: Transmit queue to deallocate.
135 * Empty queue by removing and destroying all BD's.
136 * Free all buffers.
137 * 0-fill, but do not free "txq" descriptor structure.
139 void iwl_legacy_cmd_queue_free(struct iwl_priv *priv)
141 struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue];
142 struct iwl_queue *q = &txq->q;
143 struct device *dev = &priv->pci_dev->dev;
144 int i;
145 bool huge = false;
147 if (q->n_bd == 0)
148 return;
150 for (; q->read_ptr != q->write_ptr;
151 q->read_ptr = iwl_legacy_queue_inc_wrap(q->read_ptr, q->n_bd)) {
152 /* we have no way to tell if it is a huge cmd ATM */
153 i = iwl_legacy_get_cmd_index(q, q->read_ptr, 0);
155 if (txq->meta[i].flags & CMD_SIZE_HUGE) {
156 huge = true;
157 continue;
160 pci_unmap_single(priv->pci_dev,
161 dma_unmap_addr(&txq->meta[i], mapping),
162 dma_unmap_len(&txq->meta[i], len),
163 PCI_DMA_BIDIRECTIONAL);
165 if (huge) {
166 i = q->n_window;
167 pci_unmap_single(priv->pci_dev,
168 dma_unmap_addr(&txq->meta[i], mapping),
169 dma_unmap_len(&txq->meta[i], len),
170 PCI_DMA_BIDIRECTIONAL);
173 /* De-alloc array of command/tx buffers */
174 for (i = 0; i <= TFD_CMD_SLOTS; i++)
175 kfree(txq->cmd[i]);
177 /* De-alloc circular buffer of TFDs */
178 if (txq->q.n_bd)
179 dma_free_coherent(dev, priv->hw_params.tfd_size * txq->q.n_bd,
180 txq->tfds, txq->q.dma_addr);
182 /* deallocate arrays */
183 kfree(txq->cmd);
184 kfree(txq->meta);
185 txq->cmd = NULL;
186 txq->meta = NULL;
188 /* 0-fill queue descriptor structure */
189 memset(txq, 0, sizeof(*txq));
191 EXPORT_SYMBOL(iwl_legacy_cmd_queue_free);
193 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
194 * DMA services
196 * Theory of operation
198 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
199 * of buffer descriptors, each of which points to one or more data buffers for
200 * the device to read from or fill. Driver and device exchange status of each
201 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
202 * entries in each circular buffer, to protect against confusing empty and full
203 * queue states.
205 * The device reads or writes the data in the queues via the device's several
206 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
208 * For Tx queue, there are low mark and high mark limits. If, after queuing
209 * the packet for Tx, free space become < low mark, Tx queue stopped. When
210 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
211 * Tx queue resumed.
213 * See more detailed info in iwl-4965-hw.h.
214 ***************************************************/
216 int iwl_legacy_queue_space(const struct iwl_queue *q)
218 int s = q->read_ptr - q->write_ptr;
220 if (q->read_ptr > q->write_ptr)
221 s -= q->n_bd;
223 if (s <= 0)
224 s += q->n_window;
225 /* keep some reserve to not confuse empty and full situations */
226 s -= 2;
227 if (s < 0)
228 s = 0;
229 return s;
231 EXPORT_SYMBOL(iwl_legacy_queue_space);
235 * iwl_legacy_queue_init - Initialize queue's high/low-water and read/write indexes
237 static int iwl_legacy_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
238 int count, int slots_num, u32 id)
240 q->n_bd = count;
241 q->n_window = slots_num;
242 q->id = id;
244 /* count must be power-of-two size, otherwise iwl_legacy_queue_inc_wrap
245 * and iwl_legacy_queue_dec_wrap are broken. */
246 BUG_ON(!is_power_of_2(count));
248 /* slots_num must be power-of-two size, otherwise
249 * iwl_legacy_get_cmd_index is broken. */
250 BUG_ON(!is_power_of_2(slots_num));
252 q->low_mark = q->n_window / 4;
253 if (q->low_mark < 4)
254 q->low_mark = 4;
256 q->high_mark = q->n_window / 8;
257 if (q->high_mark < 2)
258 q->high_mark = 2;
260 q->write_ptr = q->read_ptr = 0;
262 return 0;
266 * iwl_legacy_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
268 static int iwl_legacy_tx_queue_alloc(struct iwl_priv *priv,
269 struct iwl_tx_queue *txq, u32 id)
271 struct device *dev = &priv->pci_dev->dev;
272 size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
274 /* Driver private data, only for Tx (not command) queues,
275 * not shared with device. */
276 if (id != priv->cmd_queue) {
277 txq->txb = kzalloc(sizeof(txq->txb[0]) *
278 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
279 if (!txq->txb) {
280 IWL_ERR(priv, "kmalloc for auxiliary BD "
281 "structures failed\n");
282 goto error;
284 } else {
285 txq->txb = NULL;
288 /* Circular buffer of transmit frame descriptors (TFDs),
289 * shared with device */
290 txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
291 GFP_KERNEL);
292 if (!txq->tfds) {
293 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz);
294 goto error;
296 txq->q.id = id;
298 return 0;
300 error:
301 kfree(txq->txb);
302 txq->txb = NULL;
304 return -ENOMEM;
308 * iwl_legacy_tx_queue_init - Allocate and initialize one tx/cmd queue
310 int iwl_legacy_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
311 int slots_num, u32 txq_id)
313 int i, len;
314 int ret;
315 int actual_slots = slots_num;
318 * Alloc buffer array for commands (Tx or other types of commands).
319 * For the command queue (#4/#9), allocate command space + one big
320 * command for scan, since scan command is very huge; the system will
321 * not have two scans at the same time, so only one is needed.
322 * For normal Tx queues (all other queues), no super-size command
323 * space is needed.
325 if (txq_id == priv->cmd_queue)
326 actual_slots++;
328 txq->meta = kzalloc(sizeof(struct iwl_cmd_meta) * actual_slots,
329 GFP_KERNEL);
330 txq->cmd = kzalloc(sizeof(struct iwl_device_cmd *) * actual_slots,
331 GFP_KERNEL);
333 if (!txq->meta || !txq->cmd)
334 goto out_free_arrays;
336 len = sizeof(struct iwl_device_cmd);
337 for (i = 0; i < actual_slots; i++) {
338 /* only happens for cmd queue */
339 if (i == slots_num)
340 len = IWL_MAX_CMD_SIZE;
342 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
343 if (!txq->cmd[i])
344 goto err;
347 /* Alloc driver data array and TFD circular buffer */
348 ret = iwl_legacy_tx_queue_alloc(priv, txq, txq_id);
349 if (ret)
350 goto err;
352 txq->need_update = 0;
355 * For the default queues 0-3, set up the swq_id
356 * already -- all others need to get one later
357 * (if they need one at all).
359 if (txq_id < 4)
360 iwl_legacy_set_swq_id(txq, txq_id, txq_id);
362 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
363 * iwl_legacy_queue_inc_wrap and iwl_legacy_queue_dec_wrap are broken. */
364 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
366 /* Initialize queue's high/low-water marks, and head/tail indexes */
367 iwl_legacy_queue_init(priv, &txq->q,
368 TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
370 /* Tell device where to find queue */
371 priv->cfg->ops->lib->txq_init(priv, txq);
373 return 0;
374 err:
375 for (i = 0; i < actual_slots; i++)
376 kfree(txq->cmd[i]);
377 out_free_arrays:
378 kfree(txq->meta);
379 kfree(txq->cmd);
381 return -ENOMEM;
383 EXPORT_SYMBOL(iwl_legacy_tx_queue_init);
385 void iwl_legacy_tx_queue_reset(struct iwl_priv *priv, struct iwl_tx_queue *txq,
386 int slots_num, u32 txq_id)
388 int actual_slots = slots_num;
390 if (txq_id == priv->cmd_queue)
391 actual_slots++;
393 memset(txq->meta, 0, sizeof(struct iwl_cmd_meta) * actual_slots);
395 txq->need_update = 0;
397 /* Initialize queue's high/low-water marks, and head/tail indexes */
398 iwl_legacy_queue_init(priv, &txq->q,
399 TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
401 /* Tell device where to find queue */
402 priv->cfg->ops->lib->txq_init(priv, txq);
404 EXPORT_SYMBOL(iwl_legacy_tx_queue_reset);
406 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
409 * iwl_legacy_enqueue_hcmd - enqueue a uCode command
410 * @priv: device private data point
411 * @cmd: a point to the ucode command structure
413 * The function returns < 0 values to indicate the operation is
414 * failed. On success, it turns the index (> 0) of command in the
415 * command queue.
417 int iwl_legacy_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
419 struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue];
420 struct iwl_queue *q = &txq->q;
421 struct iwl_device_cmd *out_cmd;
422 struct iwl_cmd_meta *out_meta;
423 dma_addr_t phys_addr;
424 unsigned long flags;
425 int len;
426 u32 idx;
427 u16 fix_size;
429 cmd->len = priv->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
430 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
432 /* If any of the command structures end up being larger than
433 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
434 * we will need to increase the size of the TFD entries
435 * Also, check to see if command buffer should not exceed the size
436 * of device_cmd and max_cmd_size. */
437 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
438 !(cmd->flags & CMD_SIZE_HUGE));
439 BUG_ON(fix_size > IWL_MAX_CMD_SIZE);
441 if (iwl_legacy_is_rfkill(priv) || iwl_legacy_is_ctkill(priv)) {
442 IWL_WARN(priv, "Not sending command - %s KILL\n",
443 iwl_legacy_is_rfkill(priv) ? "RF" : "CT");
444 return -EIO;
447 if (iwl_legacy_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
448 IWL_ERR(priv, "No space in command queue\n");
449 IWL_ERR(priv, "Restarting adapter due to queue full\n");
450 queue_work(priv->workqueue, &priv->restart);
451 return -ENOSPC;
454 spin_lock_irqsave(&priv->hcmd_lock, flags);
456 /* If this is a huge cmd, mark the huge flag also on the meta.flags
457 * of the _original_ cmd. This is used for DMA mapping clean up.
459 if (cmd->flags & CMD_SIZE_HUGE) {
460 idx = iwl_legacy_get_cmd_index(q, q->write_ptr, 0);
461 txq->meta[idx].flags = CMD_SIZE_HUGE;
464 idx = iwl_legacy_get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
465 out_cmd = txq->cmd[idx];
466 out_meta = &txq->meta[idx];
468 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
469 out_meta->flags = cmd->flags;
470 if (cmd->flags & CMD_WANT_SKB)
471 out_meta->source = cmd;
472 if (cmd->flags & CMD_ASYNC)
473 out_meta->callback = cmd->callback;
475 out_cmd->hdr.cmd = cmd->id;
476 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
478 /* At this point, the out_cmd now has all of the incoming cmd
479 * information */
481 out_cmd->hdr.flags = 0;
482 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(priv->cmd_queue) |
483 INDEX_TO_SEQ(q->write_ptr));
484 if (cmd->flags & CMD_SIZE_HUGE)
485 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
486 len = sizeof(struct iwl_device_cmd);
487 if (idx == TFD_CMD_SLOTS)
488 len = IWL_MAX_CMD_SIZE;
490 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
491 switch (out_cmd->hdr.cmd) {
492 case REPLY_TX_LINK_QUALITY_CMD:
493 case SENSITIVITY_CMD:
494 IWL_DEBUG_HC_DUMP(priv,
495 "Sending command %s (#%x), seq: 0x%04X, "
496 "%d bytes at %d[%d]:%d\n",
497 iwl_legacy_get_cmd_string(out_cmd->hdr.cmd),
498 out_cmd->hdr.cmd,
499 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
500 q->write_ptr, idx, priv->cmd_queue);
501 break;
502 default:
503 IWL_DEBUG_HC(priv, "Sending command %s (#%x), seq: 0x%04X, "
504 "%d bytes at %d[%d]:%d\n",
505 iwl_legacy_get_cmd_string(out_cmd->hdr.cmd),
506 out_cmd->hdr.cmd,
507 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
508 q->write_ptr, idx, priv->cmd_queue);
510 #endif
511 txq->need_update = 1;
513 if (priv->cfg->ops->lib->txq_update_byte_cnt_tbl)
514 /* Set up entry in queue's byte count circular buffer */
515 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
517 phys_addr = pci_map_single(priv->pci_dev, &out_cmd->hdr,
518 fix_size, PCI_DMA_BIDIRECTIONAL);
519 dma_unmap_addr_set(out_meta, mapping, phys_addr);
520 dma_unmap_len_set(out_meta, len, fix_size);
522 trace_iwlwifi_legacy_dev_hcmd(priv, &out_cmd->hdr,
523 fix_size, cmd->flags);
525 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
526 phys_addr, fix_size, 1,
527 U32_PAD(cmd->len));
529 /* Increment and update queue's write index */
530 q->write_ptr = iwl_legacy_queue_inc_wrap(q->write_ptr, q->n_bd);
531 iwl_legacy_txq_update_write_ptr(priv, txq);
533 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
534 return idx;
538 * iwl_legacy_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
540 * When FW advances 'R' index, all entries between old and new 'R' index
541 * need to be reclaimed. As result, some free space forms. If there is
542 * enough free space (> low mark), wake the stack that feeds us.
544 static void iwl_legacy_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
545 int idx, int cmd_idx)
547 struct iwl_tx_queue *txq = &priv->txq[txq_id];
548 struct iwl_queue *q = &txq->q;
549 int nfreed = 0;
551 if ((idx >= q->n_bd) || (iwl_legacy_queue_used(q, idx) == 0)) {
552 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
553 "is out of range [0-%d] %d %d.\n", txq_id,
554 idx, q->n_bd, q->write_ptr, q->read_ptr);
555 return;
558 for (idx = iwl_legacy_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
559 q->read_ptr = iwl_legacy_queue_inc_wrap(q->read_ptr, q->n_bd)) {
561 if (nfreed++ > 0) {
562 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", idx,
563 q->write_ptr, q->read_ptr);
564 queue_work(priv->workqueue, &priv->restart);
571 * iwl_legacy_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
572 * @rxb: Rx buffer to reclaim
574 * If an Rx buffer has an async callback associated with it the callback
575 * will be executed. The attached skb (if present) will only be freed
576 * if the callback returns 1
578 void
579 iwl_legacy_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
581 struct iwl_rx_packet *pkt = rxb_addr(rxb);
582 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
583 int txq_id = SEQ_TO_QUEUE(sequence);
584 int index = SEQ_TO_INDEX(sequence);
585 int cmd_index;
586 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
587 struct iwl_device_cmd *cmd;
588 struct iwl_cmd_meta *meta;
589 struct iwl_tx_queue *txq = &priv->txq[priv->cmd_queue];
591 /* If a Tx command is being handled and it isn't in the actual
592 * command queue then there a command routing bug has been introduced
593 * in the queue management code. */
594 if (WARN(txq_id != priv->cmd_queue,
595 "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
596 txq_id, priv->cmd_queue, sequence,
597 priv->txq[priv->cmd_queue].q.read_ptr,
598 priv->txq[priv->cmd_queue].q.write_ptr)) {
599 iwl_print_hex_error(priv, pkt, 32);
600 return;
603 /* If this is a huge cmd, clear the huge flag on the meta.flags
604 * of the _original_ cmd. So that iwl_legacy_cmd_queue_free won't unmap
605 * the DMA buffer for the scan (huge) command.
607 if (huge) {
608 cmd_index = iwl_legacy_get_cmd_index(&txq->q, index, 0);
609 txq->meta[cmd_index].flags = 0;
611 cmd_index = iwl_legacy_get_cmd_index(&txq->q, index, huge);
612 cmd = txq->cmd[cmd_index];
613 meta = &txq->meta[cmd_index];
615 pci_unmap_single(priv->pci_dev,
616 dma_unmap_addr(meta, mapping),
617 dma_unmap_len(meta, len),
618 PCI_DMA_BIDIRECTIONAL);
620 /* Input error checking is done when commands are added to queue. */
621 if (meta->flags & CMD_WANT_SKB) {
622 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
623 rxb->page = NULL;
624 } else if (meta->callback)
625 meta->callback(priv, cmd, pkt);
627 iwl_legacy_hcmd_queue_reclaim(priv, txq_id, index, cmd_index);
629 if (!(meta->flags & CMD_ASYNC)) {
630 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
631 IWL_DEBUG_INFO(priv, "Clearing HCMD_ACTIVE for command %s\n",
632 iwl_legacy_get_cmd_string(cmd->hdr.cmd));
633 wake_up_interruptible(&priv->wait_command_queue);
635 meta->flags = 0;
637 EXPORT_SYMBOL(iwl_legacy_tx_cmd_complete);