2 * arch/ppc/kernel/irq.c
4 * Derived from arch/i386/kernel/irq.c
5 * Copyright (C) 1992 Linus Torvalds
6 * Adapted from arch/i386 by Gary Thomas
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
9 * Copyright (C) 1996-2001 Cort Dougan
10 * Adapted for Power Macintosh by Paul Mackerras
11 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
12 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
14 * This file contains the code used by various IRQ handling routines:
15 * asking for different IRQ's should be done through these routines
16 * instead of just grabbing them. Thus setups with different IRQ numbers
17 * shouldn't result in any weird surprises, and installing new handlers
20 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
21 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
22 * mask register (of which only 16 are defined), hence the weird shifting
23 * and complement of the cached_irq_mask. I want to be able to stuff
24 * this right into the SIU SMASK register.
25 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
26 * to reduce code space and undefined function references.
29 #include <linux/errno.h>
30 #include <linux/module.h>
31 #include <linux/threads.h>
32 #include <linux/kernel_stat.h>
33 #include <linux/signal.h>
34 #include <linux/sched.h>
35 #include <linux/ptrace.h>
36 #include <linux/ioport.h>
37 #include <linux/interrupt.h>
38 #include <linux/timex.h>
39 #include <linux/config.h>
40 #include <linux/init.h>
41 #include <linux/slab.h>
42 #include <linux/pci.h>
43 #include <linux/delay.h>
44 #include <linux/irq.h>
45 #include <linux/proc_fs.h>
46 #include <linux/random.h>
47 #include <linux/seq_file.h>
48 #include <linux/cpumask.h>
49 #include <linux/profile.h>
51 #include <asm/uaccess.h>
52 #include <asm/bitops.h>
53 #include <asm/system.h>
55 #include <asm/pgtable.h>
57 #include <asm/cache.h>
59 #include <asm/ptrace.h>
61 #define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
63 extern atomic_t ipi_recv
;
64 extern atomic_t ipi_sent
;
65 void enable_irq(unsigned int irq_nr
);
66 void disable_irq(unsigned int irq_nr
);
68 static void register_irq_proc (unsigned int irq
);
70 #define MAXCOUNT 10000000
72 irq_desc_t irq_desc
[NR_IRQS
] __cacheline_aligned
= {
74 .lock
= SPIN_LOCK_UNLOCKED
78 int ppc_spurious_interrupts
= 0;
79 struct irqaction
*ppc_irq_action
[NR_IRQS
];
80 unsigned long ppc_cached_irq_mask
[NR_MASK_WORDS
];
81 unsigned long ppc_lost_interrupts
[NR_MASK_WORDS
];
82 atomic_t ppc_n_lost_interrupts
;
84 /* nasty hack for shared irq's since we need to do kmalloc calls but
85 * can't very early in the boot when we need to do a request irq.
86 * this needs to be removed.
89 #define IRQ_KMALLOC_ENTRIES 8
90 static int cache_bitmask
= 0;
91 static struct irqaction malloc_cache
[IRQ_KMALLOC_ENTRIES
];
92 extern int mem_init_done
;
94 #if defined(CONFIG_TAU_INT)
95 extern int tau_interrupts(unsigned long cpu
);
96 extern int tau_initialized
;
99 void *irq_kmalloc(size_t size
, int pri
)
103 return kmalloc(size
,pri
);
104 for ( i
= 0; i
< IRQ_KMALLOC_ENTRIES
; i
++ )
105 if ( ! ( cache_bitmask
& (1<<i
) ) )
107 cache_bitmask
|= (1<<i
);
108 return (void *)(&malloc_cache
[i
]);
113 void irq_kfree(void *ptr
)
116 for ( i
= 0 ; i
< IRQ_KMALLOC_ENTRIES
; i
++ )
117 if ( ptr
== &malloc_cache
[i
] )
119 cache_bitmask
&= ~(1<<i
);
126 setup_irq(unsigned int irq
, struct irqaction
* new)
130 struct irqaction
*old
, **p
;
131 irq_desc_t
*desc
= irq_desc
+ irq
;
134 * Some drivers like serial.c use request_irq() heavily,
135 * so we have to be careful not to interfere with a
138 if (new->flags
& SA_SAMPLE_RANDOM
) {
140 * This function might sleep, we want to call it first,
141 * outside of the atomic block.
142 * Yes, this might clear the entropy pool if the wrong
143 * driver is attempted to be loaded, without actually
144 * installing a new handler, but is this really a problem,
145 * only the sysadmin is able to do this.
147 rand_initialize_irq(irq
);
151 * The following block of code has to be executed atomically
153 spin_lock_irqsave(&desc
->lock
,flags
);
155 if ((old
= *p
) != NULL
) {
156 /* Can't share interrupts unless both agree to */
157 if (!(old
->flags
& new->flags
& SA_SHIRQ
)) {
158 spin_unlock_irqrestore(&desc
->lock
,flags
);
162 /* add new interrupt at end of irq queue */
174 desc
->status
&= ~(IRQ_DISABLED
| IRQ_AUTODETECT
| IRQ_WAITING
);
176 if (desc
->handler
->startup
)
177 desc
->handler
->startup(irq
);
178 else if (desc
->handler
->enable
)
179 desc
->handler
->enable(irq
);
182 spin_unlock_irqrestore(&desc
->lock
,flags
);
184 register_irq_proc(irq
);
188 void free_irq(unsigned int irq
, void* dev_id
)
191 struct irqaction
**p
;
194 desc
= irq_desc
+ irq
;
195 spin_lock_irqsave(&desc
->lock
,flags
);
198 struct irqaction
* action
= *p
;
200 struct irqaction
**pp
= p
;
202 if (action
->dev_id
!= dev_id
)
205 /* Found it - now remove it from the list of entries */
208 desc
->status
|= IRQ_DISABLED
;
211 spin_unlock_irqrestore(&desc
->lock
,flags
);
213 synchronize_irq(irq
);
217 printk("Trying to free free IRQ%d\n",irq
);
218 spin_unlock_irqrestore(&desc
->lock
,flags
);
224 EXPORT_SYMBOL(free_irq
);
226 int request_irq(unsigned int irq
,
227 irqreturn_t (*handler
)(int, void *, struct pt_regs
*),
228 unsigned long irqflags
, const char * devname
, void *dev_id
)
230 struct irqaction
*action
;
236 printk(KERN_ERR
"request_irq called with NULL handler!\n");
241 action
= (struct irqaction
*)
242 irq_kmalloc(sizeof(struct irqaction
), GFP_KERNEL
);
244 printk(KERN_ERR
"irq_kmalloc() failed for irq %d !\n", irq
);
248 action
->handler
= handler
;
249 action
->flags
= irqflags
;
250 cpus_clear(action
->mask
);
251 action
->name
= devname
;
252 action
->dev_id
= dev_id
;
255 retval
= setup_irq(irq
, action
);
264 EXPORT_SYMBOL(request_irq
);
267 * Generic enable/disable code: this just calls
268 * down into the PIC-specific version for the actual
269 * hardware disable after having gotten the irq
274 * disable_irq_nosync - disable an irq without waiting
275 * @irq: Interrupt to disable
277 * Disable the selected interrupt line. Disables of an interrupt
278 * stack. Unlike disable_irq(), this function does not ensure existing
279 * instances of the IRQ handler have completed before returning.
281 * This function may be called from IRQ context.
284 void disable_irq_nosync(unsigned int irq
)
286 irq_desc_t
*desc
= irq_desc
+ irq
;
289 spin_lock_irqsave(&desc
->lock
, flags
);
290 if (!desc
->depth
++) {
291 if (!(desc
->status
& IRQ_PER_CPU
))
292 desc
->status
|= IRQ_DISABLED
;
295 spin_unlock_irqrestore(&desc
->lock
, flags
);
299 * disable_irq - disable an irq and wait for completion
300 * @irq: Interrupt to disable
302 * Disable the selected interrupt line. Disables of an interrupt
303 * stack. That is for two disables you need two enables. This
304 * function waits for any pending IRQ handlers for this interrupt
305 * to complete before returning. If you use this function while
306 * holding a resource the IRQ handler may need you will deadlock.
308 * This function may be called - with care - from IRQ context.
311 void disable_irq(unsigned int irq
)
313 irq_desc_t
*desc
= irq_desc
+ irq
;
314 disable_irq_nosync(irq
);
316 synchronize_irq(irq
);
320 * enable_irq - enable interrupt handling on an irq
321 * @irq: Interrupt to enable
323 * Re-enables the processing of interrupts on this IRQ line
324 * providing no disable_irq calls are now in effect.
326 * This function may be called from IRQ context.
329 void enable_irq(unsigned int irq
)
331 irq_desc_t
*desc
= irq_desc
+ irq
;
334 spin_lock_irqsave(&desc
->lock
, flags
);
335 switch (desc
->depth
) {
337 unsigned int status
= desc
->status
& ~IRQ_DISABLED
;
338 desc
->status
= status
;
339 if ((status
& (IRQ_PENDING
| IRQ_REPLAY
)) == IRQ_PENDING
) {
340 desc
->status
= status
| IRQ_REPLAY
;
341 hw_resend_irq(desc
->handler
,irq
);
350 printk("enable_irq(%u) unbalanced\n", irq
);
352 spin_unlock_irqrestore(&desc
->lock
, flags
);
355 int show_interrupts(struct seq_file
*p
, void *v
)
357 int i
= *(loff_t
*) v
, j
;
358 struct irqaction
* action
;
363 for (j
=0; j
<NR_CPUS
; j
++)
365 seq_printf(p
, "CPU%d ", j
);
370 spin_lock_irqsave(&irq_desc
[i
].lock
, flags
);
371 action
= irq_desc
[i
].action
;
372 if ( !action
|| !action
->handler
)
374 seq_printf(p
, "%3d: ", i
);
376 for (j
= 0; j
< NR_CPUS
; j
++)
378 seq_printf(p
, "%10u ",
379 kstat_cpu(j
).irqs
[i
]);
381 seq_printf(p
, "%10u ", kstat_irqs(i
));
382 #endif /* CONFIG_SMP */
383 if (irq_desc
[i
].handler
)
384 seq_printf(p
, " %s ", irq_desc
[i
].handler
->typename
);
386 seq_puts(p
, " None ");
387 seq_printf(p
, "%s", (irq_desc
[i
].status
& IRQ_LEVEL
) ? "Level " : "Edge ");
388 seq_printf(p
, " %s", action
->name
);
389 for (action
= action
->next
; action
; action
= action
->next
)
390 seq_printf(p
, ", %s", action
->name
);
393 spin_unlock_irqrestore(&irq_desc
[i
].lock
, flags
);
394 } else if (i
== NR_IRQS
) {
395 #ifdef CONFIG_TAU_INT
396 if (tau_initialized
){
397 seq_puts(p
, "TAU: ");
398 for (j
= 0; j
< NR_CPUS
; j
++)
400 seq_printf(p
, "%10u ", tau_interrupts(j
));
401 seq_puts(p
, " PowerPC Thermal Assist (cpu temp)\n");
405 /* should this be per processor send/receive? */
406 seq_printf(p
, "IPI (recv/sent): %10u/%u\n",
407 atomic_read(&ipi_recv
), atomic_read(&ipi_sent
));
409 seq_printf(p
, "BAD: %10u\n", ppc_spurious_interrupts
);
415 handle_irq_event(int irq
, struct pt_regs
*regs
, struct irqaction
*action
)
420 if (!(action
->flags
& SA_INTERRUPT
))
424 ret
= action
->handler(irq
, action
->dev_id
, regs
);
425 if (ret
== IRQ_HANDLED
)
426 status
|= action
->flags
;
427 action
= action
->next
;
429 if (status
& SA_SAMPLE_RANDOM
)
430 add_interrupt_randomness(irq
);
435 * Eventually, this should take an array of interrupts and an array size
436 * so it can dispatch multiple interrupts.
438 void ppc_irq_dispatch_handler(struct pt_regs
*regs
, int irq
)
441 struct irqaction
*action
;
442 irq_desc_t
*desc
= irq_desc
+ irq
;
444 kstat_this_cpu
.irqs
[irq
]++;
445 spin_lock(&desc
->lock
);
448 REPLAY is when Linux resends an IRQ that was dropped earlier
449 WAITING is used by probe to mark irqs that are being tested
451 status
= desc
->status
& ~(IRQ_REPLAY
| IRQ_WAITING
);
452 if (!(status
& IRQ_PER_CPU
))
453 status
|= IRQ_PENDING
; /* we _want_ to handle it */
456 * If the IRQ is disabled for whatever reason, we cannot
457 * use the action we have.
460 if (likely(!(status
& (IRQ_DISABLED
| IRQ_INPROGRESS
)))) {
461 action
= desc
->action
;
462 if (!action
|| !action
->handler
) {
463 ppc_spurious_interrupts
++;
464 printk(KERN_DEBUG
"Unhandled interrupt %x, disabled\n", irq
);
465 /* We can't call disable_irq here, it would deadlock */
467 desc
->status
|= IRQ_DISABLED
;
469 /* This is a real interrupt, we have to eoi it,
473 status
&= ~IRQ_PENDING
; /* we commit to handling */
474 if (!(status
& IRQ_PER_CPU
))
475 status
|= IRQ_INPROGRESS
; /* we are handling it */
477 desc
->status
= status
;
480 * If there is no IRQ handler or it was disabled, exit early.
481 Since we set PENDING, if another processor is handling
482 a different instance of this same irq, the other processor
483 will take care of it.
485 if (unlikely(!action
))
490 * Edge triggered interrupts need to remember
492 * This applies to any hw interrupts that allow a second
493 * instance of the same irq to arrive while we are in do_IRQ
494 * or in the handler. But the code here only handles the _second_
495 * instance of the irq, not the third or fourth. So it is mostly
496 * useful for irq hardware that does not mask cleanly in an
500 spin_unlock(&desc
->lock
);
501 handle_irq_event(irq
, regs
, action
);
502 spin_lock(&desc
->lock
);
504 if (likely(!(desc
->status
& IRQ_PENDING
)))
506 desc
->status
&= ~IRQ_PENDING
;
509 desc
->status
&= ~IRQ_INPROGRESS
;
511 * The ->end() handler has to deal with interrupts which got
512 * disabled while the handler was running.
514 if (irq_desc
[irq
].handler
) {
515 if (irq_desc
[irq
].handler
->end
)
516 irq_desc
[irq
].handler
->end(irq
);
517 else if (irq_desc
[irq
].handler
->enable
)
518 irq_desc
[irq
].handler
->enable(irq
);
520 spin_unlock(&desc
->lock
);
523 void do_IRQ(struct pt_regs
*regs
)
529 * Every platform is required to implement ppc_md.get_irq.
530 * This function will either return an irq number or -1 to
531 * indicate there are no more pending. But the first time
532 * through the loop this means there wasn't and IRQ pending.
533 * The value -2 is for buggy hardware and means that this IRQ
534 * has already been handled. -- Tom
536 while ((irq
= ppc_md
.get_irq(regs
)) >= 0) {
537 ppc_irq_dispatch_handler(regs
, irq
);
540 if (irq
!= -2 && first
)
541 /* That's not SMP safe ... but who cares ? */
542 ppc_spurious_interrupts
++;
546 unsigned long probe_irq_on (void)
551 EXPORT_SYMBOL(probe_irq_on
);
553 int probe_irq_off (unsigned long irqs
)
558 EXPORT_SYMBOL(probe_irq_off
);
560 unsigned int probe_irq_mask(unsigned long irqs
)
566 void synchronize_irq(unsigned int irq
)
568 while (irq_desc
[irq
].status
& IRQ_INPROGRESS
)
571 #endif /* CONFIG_SMP */
573 static struct proc_dir_entry
*root_irq_dir
;
574 static struct proc_dir_entry
*irq_dir
[NR_IRQS
];
575 static struct proc_dir_entry
*smp_affinity_entry
[NR_IRQS
];
577 #ifdef CONFIG_IRQ_ALL_CPUS
578 #define DEFAULT_CPU_AFFINITY CPU_MASK_ALL
580 #define DEFAULT_CPU_AFFINITY cpumask_of_cpu(0)
583 cpumask_t irq_affinity
[NR_IRQS
];
585 static int irq_affinity_read_proc (char *page
, char **start
, off_t off
,
586 int count
, int *eof
, void *data
)
588 int len
= cpumask_scnprintf(page
, count
, irq_affinity
[(long)data
]);
591 len
+= sprintf(page
+ len
, "\n");
595 static int irq_affinity_write_proc (struct file
*file
, const char __user
*buffer
,
596 unsigned long count
, void *data
)
598 int irq
= (int) data
, full_count
= count
, err
;
599 cpumask_t new_value
, tmp
;
601 if (!irq_desc
[irq
].handler
->set_affinity
)
604 err
= cpumask_parse(buffer
, count
, new_value
);
607 * Do not allow disabling IRQs completely - it's a too easy
608 * way to make the system unusable accidentally :-) At least
609 * one online CPU still has to be targeted.
611 * We assume a 1-1 logical<->physical cpu mapping here. If
612 * we assume that the cpu indices in /proc/irq/../smp_affinity
613 * are actually logical cpu #'s then we have no problem.
614 * -- Cort <cort@fsmlabs.com>
616 cpus_and(tmp
, new_value
, cpu_online_map
);
620 irq_affinity
[irq
] = new_value
;
621 irq_desc
[irq
].handler
->set_affinity(irq
, new_value
);
626 #define MAX_NAMELEN 10
628 static void register_irq_proc (unsigned int irq
)
630 struct proc_dir_entry
*entry
;
631 char name
[MAX_NAMELEN
];
633 if (!root_irq_dir
|| (irq_desc
[irq
].handler
== NULL
) || irq_dir
[irq
])
636 memset(name
, 0, MAX_NAMELEN
);
637 sprintf(name
, "%d", irq
);
639 /* create /proc/irq/1234 */
640 irq_dir
[irq
] = proc_mkdir(name
, root_irq_dir
);
642 /* create /proc/irq/1234/smp_affinity */
643 entry
= create_proc_entry("smp_affinity", 0600, irq_dir
[irq
]);
646 entry
->data
= (void *)irq
;
647 entry
->read_proc
= irq_affinity_read_proc
;
648 entry
->write_proc
= irq_affinity_write_proc
;
650 smp_affinity_entry
[irq
] = entry
;
653 void init_irq_proc (void)
657 /* create /proc/irq */
658 root_irq_dir
= proc_mkdir("irq", NULL
);
659 /* create /proc/irq/prof_cpu_mask */
660 create_prof_cpu_mask(root_irq_dir
);
663 * Create entries for all existing IRQs.
665 for (i
= 0; i
< NR_IRQS
; i
++) {
666 if (irq_desc
[i
].handler
== NULL
)
668 register_irq_proc(i
);
672 irqreturn_t
no_action(int irq
, void *dev
, struct pt_regs
*regs
)
677 void __init
init_IRQ(void)
681 for (i
= 0; i
< NR_IRQS
; ++i
)
682 irq_affinity
[i
] = DEFAULT_CPU_AFFINITY
;