include/asm-parisc/hardirq.h

   1 /* hardirq.h: PA-RISC hard IRQ support.
   2  *
   3  * Copyright (C) 2001 Matthew Wilcox <matthew@wil.cx>
   4  *
   5  * The locking is really quite interesting.  There's a cpu-local
   6  * count of how many interrupts are being handled, and a global
   7  * lock.  An interrupt can only be serviced if the global lock
   8  * is free.  You can't be sure no more interrupts are being
   9  * serviced until you've acquired the lock and then checked
  10  * all the per-cpu interrupt counts are all zero.  It's a specialised
  11  * br_lock, and that's exactly how Sparc does it.  We don't because
  12  * it's more locking for us.  This way is lock-free in the interrupt path.
  13  */
  14
  15 #ifndef _PARISC_HARDIRQ_H
  16 #define _PARISC_HARDIRQ_H
  17
  18 #include <linux/config.h>
  19 #include <linux/threads.h>
  20 #include <linux/cache.h>
  21
  22 typedef struct {
  23         unsigned long __softirq_pending; /* set_bit is used on this */
  24         unsigned int __syscall_count;
  25         struct task_struct * __ksoftirqd_task;
  26         unsigned long idle_timestamp;
  27 } ____cacheline_aligned irq_cpustat_t;
  28
  29 #include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
  30
  31 /*
  32  * We put the hardirq and softirq counter into the preemption counter. The bitmask has the
  33  * following meaning:
  34  *
  35  * - bits 0-7 are the preemption count (max preemption depth: 256)
  36  * - bits 8-15 are the softirq count (max # of softirqs: 256)
  37  * - bits 16-31 are the hardirq count (max # of hardirqs: 65536)
  38  *
  39  * - (bit 63 is the PREEMPT_ACTIVE flag---not currently implemented.)
  40  *
  41  * PREEMPT_MASK: 0x000000ff
  42  * SOFTIRQ_MASK: 0x0000ff00
  43  * HARDIRQ_MASK: 0xffff0000
  44  */
  45
  46 #define PREEMPT_BITS    8
  47 #define SOFTIRQ_BITS    8
  48 #define HARDIRQ_BITS    16
  49
  50 #define PREEMPT_SHIFT   0
  51 #define SOFTIRQ_SHIFT   (PREEMPT_SHIFT + PREEMPT_BITS)
  52 #define HARDIRQ_SHIFT   (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
  53
  54 /*
  55  * The hardirq mask has to be large enough to have space for potentially all IRQ sources
  56  * in the system nesting on a single CPU:
  57  */
  58 #if (1 << HARDIRQ_BITS) < NR_IRQS
  59 # error HARDIRQ_BITS is too low!
  60 #endif
  61
  62 #define irq_enter()             (preempt_count() += HARDIRQ_OFFSET)
  63 #define irq_exit()                                                              \
  64 do {                                                                            \
  65                 preempt_count() -= IRQ_EXIT_OFFSET;                             \
  66                 if (!in_interrupt() && softirq_pending(smp_processor_id()))     \
  67                         do_softirq();                                           \
  68                 preempt_enable_no_resched();                                    \
  69 } while (0)
  70
  71 #endif /* _PARISC_HARDIRQ_H */