include/asm-i386/mach-numaq/mach_apic.h

   1 #ifndef __ASM_MACH_APIC_H
   2 #define __ASM_MACH_APIC_H
   3
   4 #include <asm/io.h>
   5 #include <linux/mmzone.h>
   6
   7 #define APIC_DFR_VALUE  (APIC_DFR_CLUSTER)
   8
   9 static inline cpumask_t target_cpus(void)
  10 {
  11         return CPU_MASK_ALL;
  12 }
  13
  14 #define TARGET_CPUS (target_cpus())
  15
  16 #define NO_BALANCE_IRQ (1)
  17 #define esr_disable (1)
  18
  19 #define NO_IOAPIC_CHECK (0)
  20
  21 #define INT_DELIVERY_MODE dest_LowestPrio
  22 #define INT_DEST_MODE 0     /* physical delivery on LOCAL quad */
  23
  24 #define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap)
  25 #define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map)
  26 #define apicid_cluster(apicid) (apicid & 0xF0)
  27
  28 static inline int apic_id_registered(void)
  29 {
  30         return 1;
  31 }
  32
  33 static inline void init_apic_ldr(void)
  34 {
  35         /* Already done in NUMA-Q firmware */
  36 }
  37
  38 static inline void clustered_apic_check(void)
  39 {
  40         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
  41                 "NUMA-Q", nr_ioapics);
  42 }
  43
  44 /*
  45  * Skip adding the timer int on secondary nodes, which causes
  46  * a small but painful rift in the time-space continuum.
  47  */
  48 static inline int multi_timer_check(int apic, int irq)
  49 {
  50         return apic != 0 && irq == 0;
  51 }
  52
  53 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
  54 {
  55         /* We don't have a good way to do this yet - hack */
  56         return physids_promote(0xFUL);
  57 }
  58
  59 /* Mapping from cpu number to logical apicid */
  60 extern u8 cpu_2_logical_apicid[];
  61 static inline int cpu_to_logical_apicid(int cpu)
  62 {
  63        if (cpu >= NR_CPUS)
  64                return BAD_APICID;
  65         return (int)cpu_2_logical_apicid[cpu];
  66 }
  67
  68 /*
  69  * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
  70  * cpu to APIC ID relation to properly interact with the intelligent
  71  * mode of the cluster controller.
  72  */
  73 static inline int cpu_present_to_apicid(int mps_cpu)
  74 {
  75         if (mps_cpu < 60)
  76                 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
  77         else
  78                 return BAD_APICID;
  79 }
  80
  81 static inline int generate_logical_apicid(int quad, int phys_apicid)
  82 {
  83         return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
  84 }
  85
  86 static inline int apicid_to_node(int logical_apicid)
  87 {
  88         return logical_apicid >> 4;
  89 }
  90
  91 static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
  92 {
  93         int node = apicid_to_node(logical_apicid);
  94         int cpu = __ffs(logical_apicid & 0xf);
  95
  96         return physid_mask_of_physid(cpu + 4*node);
  97 }
  98
  99 static inline int mpc_apic_id(struct mpc_config_processor *m,
 100                         struct mpc_config_translation *translation_record)
 101 {
 102         int quad = translation_record->trans_quad;
 103         int logical_apicid = generate_logical_apicid(quad, m->mpc_apicid);
 104
 105         printk("Processor #%d %ld:%ld APIC version %d (quad %d, apic %d)\n",
 106                         m->mpc_apicid,
 107                         (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
 108                         (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
 109                         m->mpc_apicver, quad, logical_apicid);
 110         return logical_apicid;
 111 }
 112
 113 static inline void setup_portio_remap(void)
 114 {
 115         if (numnodes <= 1)
 116                 return;
 117
 118         printk("Remapping cross-quad port I/O for %d quads\n", numnodes);
 119         xquad_portio = ioremap (XQUAD_PORTIO_BASE, numnodes*XQUAD_PORTIO_QUAD);
 120         printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
 121                 (u_long) xquad_portio, (u_long) numnodes*XQUAD_PORTIO_QUAD);
 122 }
 123
 124 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
 125 {
 126         return (1);
 127 }
 128
 129 static inline void enable_apic_mode(void)
 130 {
 131 }
 132
 133 /*
 134  * We use physical apicids here, not logical, so just return the default
 135  * physical broadcast to stop people from breaking us
 136  */
 137 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 138 {
 139         return (int) 0xF;
 140 }
 141
 142 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
 143 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
 144 {
 145         return cpuid_apic >> index_msb;
 146 }
 147
 148 #endif /* __ASM_MACH_APIC_H */