include/asm-arm/arch-omap/clocks.h

   1 /*
   2  * OMAP clock interface
   3  *
   4  * Copyright (C) 2001 RidgeRun, Inc
   5  * Written by Gordon McNutt <gmcnutt@ridgerun.com>
   6  * Updated 2004 for Linux 2.6 by Tony Lindgren <tony@atomide.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  14  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  15  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  16  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  17  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  19  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  21  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23  *
  24  * You should have received a copy of the  GNU General Public License along
  25  * with this program; if not, write  to the Free Software Foundation, Inc.,
  26  * 675 Mass Ave, Cambridge, MA 02139, USA.
  27  */
  28
  29 #ifndef __ASM_ARM_CLOCKS_H
  30 #define __ASM_ARM_CLOCKS_H
  31
  32 #include <linux/config.h>
  33
  34 /* ARM_CKCTL bit shifts */
  35 #define PERDIV                  0
  36 #define LCDDIV                  2
  37 #define ARMDIV                  4
  38 #define DSPDIV                  6
  39 #define TCDIV                   8
  40 #define DSPMMUDIV               10
  41 #define ARM_TIMXO               12
  42 #define EN_DSPCK                13
  43 #define ARM_INTHCK_SEL          14 /* REVISIT: Where is this used? */
  44
  45 /* ARM_IDLECT1 bit shifts */
  46 #define IDLWDT_ARM      0
  47 #define IDLXORP_ARM     1
  48 #define IDLPER_ARM      2
  49 #define IDLLCD_ARM      3
  50 #define IDLLB_ARM       4
  51 #define IDLHSAB_ARM     5
  52 #define IDLIF_ARM       6
  53 #define IDLDPLL_ARM     7
  54 #define IDLAPI_ARM      8
  55 #define IDLTIM_ARM      9
  56 #define SETARM_IDLE     11
  57
  58 /* ARM_IDLECT2 bit shifts */
  59 #define EN_WDTCK        0
  60 #define EN_XORPCK       1
  61 #define EN_PERCK        2
  62 #define EN_LCDCK        3
  63 #define EN_LBCK         4
  64 #define EN_HSABCK       5
  65 #define EN_APICK        6
  66 #define EN_TIMCK        7
  67 #define DMACK_REQ       8
  68 #define EN_GPIOCK       9
  69 #define EN_LBFREECK     10
  70
  71 /*
  72  * OMAP clocks
  73  */
  74 typedef enum {
  75         /* Fixed system clock */
  76         OMAP_CLKIN = 0,
  77
  78         /* DPLL1 */
  79         OMAP_CK_GEN1, OMAP_CK_GEN2, OMAP_CK_GEN3,
  80
  81         /* TC usually needs to be checked before anything else */
  82         OMAP_TC_CK,
  83
  84         /* CLKM1 */
  85         OMAP_ARM_CK, OMAP_MPUPER_CK, OMAP_ARM_GPIO_CK, OMAP_MPUXOR_CK,
  86         OMAP_MPUTIM_CK, OMAP_MPUWD_CK,
  87
  88         /* CLKM2 */
  89         OMAP_DSP_CK, OMAP_DSPMMU_CK,
  90 #if 0
  91         /* Accessible only from the dsp */
  92         OMAP_DSPPER_CK, OMAP_GPIO_CK, OMAP_DSPXOR_CK, OMAP_DSPTIM_CK,
  93         OMAP_DSPWD_CK, OMAP_UART_CK,
  94 #endif
  95         /* CLKM3 */
  96         OMAP_DMA_CK, OMAP_API_CK, OMAP_HSAB_CK, OMAP_LBFREE_CK,
  97         OMAP_LB_CK, OMAP_LCD_CK
  98 } ck_t;
  99
 100 typedef enum {
 101         /* Reset the MPU */
 102         OMAP_ARM_RST,
 103
 104         /* Reset the DSP */
 105         OMAP_DSP_RST,
 106
 107         /* Reset priority registers, EMIF config, and MPUI control logic */
 108         OMAP_API_RST,
 109
 110         /* Reset DSP, MPU, and Peripherals */
 111         OMAP_SW_RST,
 112 } reset_t;
 113
 114 #define OMAP_CK_MIN                     OMAP_CLKIN
 115 #define OMAP_CK_MAX                     OMAP_LCD_CK
 116
 117 #if defined(CONFIG_OMAP_ARM_30MHZ)
 118 #define OMAP_CK_MAX_RATE                30
 119 #elif defined(CONFIG_OMAP_ARM_60MHZ)
 120 #define OMAP_CK_MAX_RATE                60
 121 #elif defined(CONFIG_OMAP_ARM_96MHZ)
 122 #define OMAP_CK_MAX_RATE                96
 123 #elif defined(CONFIG_OMAP_ARM_120MHZ)
 124 #define OMAP_CK_MAX_RATE                120
 125 #elif defined(CONFIG_OMAP_ARM_168MHZ)
 126 #define OMAP_CK_MAX_RATE                168
 127 #elif defined(CONFIG_OMAP_ARM_182MHZ)
 128 #define OMAP_CK_MAX_RATE                182
 129 #elif defined(CONFIG_OMAP_ARM_192MHZ)
 130 #define OMAP_CK_MAX_RATE                192
 131 #elif defined(CONFIG_OMAP_ARM_195MHZ)
 132 #define OMAP_CK_MAX_RATE                195
 133 #endif
 134
 135 #define CK_DPLL_MASK                    0x0fe0
 136
 137 /* Shared by CK and DSPC */
 138 #define MPUI_STROBE_MAX_1509            24
 139 #define MPUI_STROBE_MAX_1510            30
 140
 141 /*
 142  * ----------------------------------------------------------------------------
 143  * Clock interface functions
 144  * ----------------------------------------------------------------------------
 145  */
 146
 147 /*  Clock initialization.  */
 148 int init_ck(void);
 149
 150 /*
 151  * For some clocks you have a choice of which "parent" clocks they are derived
 152  * from. Use this to select a "parent". See the platform documentation for
 153  * valid combinations.
 154  */
 155 int ck_can_set_input(ck_t);
 156 int ck_set_input(ck_t ck, ck_t input);
 157 int ck_get_input(ck_t ck, ck_t *input);
 158
 159 /*
 160  * Use this to set a clock rate. If other clocks are derived from this one,
 161  * their rates will all change too. If this is a derived clock and I can't
 162  * change it to match your request unless I also change the parent clock, then
 163  * tough luck -- I won't change the parent automatically. I'll return an error
 164  * if I can't get the clock within 10% of what you want. Otherwise I'll return
 165  * the value I actually set it to. If I have to switch parents to get the rate
 166  * then I will do this automatically (since it only affects this clock and its
 167  * descendants).
 168  */
 169 int ck_can_set_rate(ck_t);
 170 int ck_set_rate(ck_t ck, int val_in_mhz);
 171 int ck_get_rate(ck_t ck);
 172
 173 /*
 174  * Use this to get a bitmap of available rates for the clock. Caller allocates
 175  *  the buffer and passes in the length. Clock module fills up to len bytes of
 176  *  the buffer & passes back actual bytes used.
 177  */
 178 int ck_get_rates(ck_t ck, void *buf, int len);
 179 int ck_valid_rate(int rate);
 180
 181 /*
 182  * Idle a clock. What happens next depends on the clock ;). For example, if
 183  * you idle the ARM_CK you might well end up in sleep mode on some platforms.
 184  * If you try to idle a clock that doesn't support it I'll return an error.
 185  * Note that idling a clock does not always take affect until certain h/w
 186  * conditions are met. Consult the platform specs to learn more.
 187  */
 188 int ck_can_idle(ck_t);
 189 int ck_idle(ck_t);
 190 int ck_activate(ck_t);
 191 int ck_is_idle(ck_t);
 192
 193 /*
 194  * Enable/disable a clock. I'll return an error if the h/w doesn't support it.
 195  * If you disable a clock being used by an active device then you probably
 196  * just screwed it. YOU are responsible for making sure this doesn't happen.
 197  */
 198 int ck_can_disable(ck_t);
 199 int ck_enable(ck_t);
 200 int ck_disable(ck_t);
 201 int ck_is_enabled(ck_t);
 202
 203 /* Enable/reset ARM peripherals (remove/set reset signal) */
 204 void ck_enable_peripherals(void);
 205 void ck_reset_peripherals(void);
 206
 207 /* Generate/clear a MPU or DSP reset */
 208 void ck_generate_reset(reset_t reset);
 209 void ck_release_from_reset(reset_t reset);
 210
 211 /* This gets a string representation of the clock's name. Useful for proc. */
 212 char *ck_get_name(ck_t);
 213
 214 extern void start_mputimer1(unsigned long);
 215
 216 #endif