initial commit with v2.6.9
[linux-2.6.9-moxart.git] / include / asm-alpha / hardirq.h
blob10be402fcb26dde9cf87885260339706097fd69a
1 #ifndef _ALPHA_HARDIRQ_H
2 #define _ALPHA_HARDIRQ_H
4 #include <linux/config.h>
5 #include <linux/threads.h>
6 #include <linux/cache.h>
9 /* entry.S is sensitive to the offsets of these fields */
10 typedef struct {
11 unsigned long __softirq_pending;
12 unsigned int __syscall_count;
13 unsigned long idle_timestamp;
14 struct task_struct * __ksoftirqd_task;
15 } ____cacheline_aligned irq_cpustat_t;
17 #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
20 * We put the hardirq and softirq counter into the preemption
21 * counter. The bitmask has the following meaning:
23 * - bits 0-7 are the preemption count (max preemption depth: 256)
24 * - bits 8-15 are the softirq count (max # of softirqs: 256)
25 * - bits 16-27 are the hardirq count (max # of hardirqs: 4096)
27 * - ( bit 30 is the PREEMPT_ACTIVE flag. )
29 * PREEMPT_MASK: 0x000000ff
30 * SOFTIRQ_MASK: 0x0000ff00
31 * HARDIRQ_MASK: 0x0fff0000
34 #define PREEMPT_BITS 8
35 #define SOFTIRQ_BITS 8
36 #define HARDIRQ_BITS 12
38 #define PREEMPT_SHIFT 0
39 #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
40 #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
43 * The hardirq mask has to be large enough to have
44 * space for potentially nestable IRQ sources in the system
45 * to nest on a single CPU. On Alpha, interrupts are masked at the CPU
46 * by IPL as well as at the system level. We only have 8 IPLs (UNIX PALcode)
47 * so we really only have 8 nestable IRQs, but allow some overhead
49 #if (1 << HARDIRQ_BITS) < 16
50 #error HARDIRQ_BITS is too low!
51 #endif
53 #define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
54 #define irq_exit() \
55 do { \
56 preempt_count() -= IRQ_EXIT_OFFSET; \
57 if (!in_interrupt() && \
58 softirq_pending(smp_processor_id())) \
59 do_softirq(); \
60 preempt_enable_no_resched(); \
61 } while (0)
63 #endif /* _ALPHA_HARDIRQ_H */