drivers/pcmcia/cardbus.c

   1 /*======================================================================
   2
   3     Cardbus device configuration
   4
   5     cardbus.c 1.87 2002/10/24 06:11:41
   6
   7     The contents of this file are subject to the Mozilla Public
   8     License Version 1.1 (the "License"); you may not use this file
   9     except in compliance with the License. You may obtain a copy of
  10     the License at http://www.mozilla.org/MPL/
  11
  12     Software distributed under the License is distributed on an "AS
  13     IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
  14     implied. See the License for the specific language governing
  15     rights and limitations under the License.
  16
  17     The initial developer of the original code is David A. Hinds
  18     <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
  19     are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
  20
  21     Alternatively, the contents of this file may be used under the
  22     terms of the GNU General Public License version 2 (the "GPL"), in which
  23     case the provisions of the GPL are applicable instead of the
  24     above.  If you wish to allow the use of your version of this file
  25     only under the terms of the GPL and not to allow others to use
  26     your version of this file under the MPL, indicate your decision
  27     by deleting the provisions above and replace them with the notice
  28     and other provisions required by the GPL.  If you do not delete
  29     the provisions above, a recipient may use your version of this
  30     file under either the MPL or the GPL.
  31
  32 ======================================================================*/
  33
  34 /*
  35  * Cardbus handling has been re-written to be more of a PCI bridge thing,
  36  * and the PCI code basically does all the resource handling.
  37  *
  38  *              Linus, Jan 2000
  39  */
  40
  41
  42 #include <linux/module.h>
  43 #include <linux/kernel.h>
  44 #include <linux/string.h>
  45 #include <linux/slab.h>
  46 #include <linux/mm.h>
  47 #include <linux/pci.h>
  48 #include <linux/ioport.h>
  49 #include <asm/irq.h>
  50 #include <asm/io.h>
  51
  52 #define IN_CARD_SERVICES
  53 #include <pcmcia/version.h>
  54 #include <pcmcia/cs_types.h>
  55 #include <pcmcia/ss.h>
  56 #include <pcmcia/cs.h>
  57 #include <pcmcia/bulkmem.h>
  58 #include <pcmcia/cistpl.h>
  59 #include "cs_internal.h"
  60
  61 /*====================================================================*/
  62
  63 #define FIND_FIRST_BIT(n)       ((n) - ((n) & ((n)-1)))
  64
  65 /* Offsets in the Expansion ROM Image Header */
  66 #define ROM_SIGNATURE           0x0000  /* 2 bytes */
  67 #define ROM_DATA_PTR            0x0018  /* 2 bytes */
  68
  69 /* Offsets in the CardBus PC Card Data Structure */
  70 #define PCDATA_SIGNATURE        0x0000  /* 4 bytes */
  71 #define PCDATA_VPD_PTR          0x0008  /* 2 bytes */
  72 #define PCDATA_LENGTH           0x000a  /* 2 bytes */
  73 #define PCDATA_REVISION         0x000c
  74 #define PCDATA_IMAGE_SZ         0x0010  /* 2 bytes */
  75 #define PCDATA_ROM_LEVEL        0x0012  /* 2 bytes */
  76 #define PCDATA_CODE_TYPE        0x0014
  77 #define PCDATA_INDICATOR        0x0015
  78
  79 /*=====================================================================
  80
  81     Expansion ROM's have a special layout, and pointers specify an
  82     image number and an offset within that image.  xlate_rom_addr()
  83     converts an image/offset address to an absolute offset from the
  84     ROM's base address.
  85
  86 =====================================================================*/
  87
  88 static u_int xlate_rom_addr(void __iomem *b, u_int addr)
  89 {
  90         u_int img = 0, ofs = 0, sz;
  91         u_short data;
  92         while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
  93                 if (img == (addr >> 28))
  94                         return (addr & 0x0fffffff) + ofs;
  95                 data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
  96                 sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
  97                             (readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
  98                 if ((sz == 0) || (readb(b + data + PCDATA_INDICATOR) & 0x80))
  99                         break;
 100                 b += sz;
 101                 ofs += sz;
 102                 img++;
 103         }
 104         return 0;
 105 }
 106
 107 /*=====================================================================
 108
 109     These are similar to setup_cis_mem and release_cis_mem for 16-bit
 110     cards.  The "result" that is used externally is the cb_cis_virt
 111     pointer in the struct pcmcia_socket structure.
 112
 113 =====================================================================*/
 114
 115 static void cb_release_cis_mem(struct pcmcia_socket * s)
 116 {
 117         if (s->cb_cis_virt) {
 118                 cs_dbg(s, 1, "cb_release_cis_mem()\n");
 119                 iounmap(s->cb_cis_virt);
 120                 s->cb_cis_virt = NULL;
 121                 s->cb_cis_res = NULL;
 122         }
 123 }
 124
 125 static int cb_setup_cis_mem(struct pcmcia_socket * s, struct resource *res)
 126 {
 127         unsigned int start, size;
 128
 129         if (res == s->cb_cis_res)
 130                 return 0;
 131
 132         if (s->cb_cis_res)
 133                 cb_release_cis_mem(s);
 134
 135         start = res->start;
 136         size = res->end - start + 1;
 137         s->cb_cis_virt = ioremap(start, size);
 138
 139         if (!s->cb_cis_virt)
 140                 return -1;
 141
 142         s->cb_cis_res = res;
 143
 144         return 0;
 145 }
 146
 147 /*=====================================================================
 148
 149     This is used by the CIS processing code to read CIS information
 150     from a CardBus device.
 151
 152 =====================================================================*/
 153
 154 int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void *ptr)
 155 {
 156         struct pci_dev *dev;
 157         struct resource *res;
 158
 159         cs_dbg(s, 3, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);
 160
 161         dev = pci_find_slot(s->cb_dev->subordinate->number, 0);
 162         if (!dev)
 163                 goto fail;
 164
 165         /* Config space? */
 166         if (space == 0) {
 167                 if (addr + len > 0x100)
 168                         goto fail;
 169                 for (; len; addr++, ptr++, len--)
 170                         pci_read_config_byte(dev, addr, ptr);
 171                 return 0;
 172         }
 173
 174         res = dev->resource + space - 1;
 175         if (!res->flags)
 176                 goto fail;
 177
 178         if (cb_setup_cis_mem(s, res) != 0)
 179                 goto fail;
 180
 181         if (space == 7) {
 182                 addr = xlate_rom_addr(s->cb_cis_virt, addr);
 183                 if (addr == 0)
 184                         goto fail;
 185         }
 186
 187         if (addr + len > res->end - res->start)
 188                 goto fail;
 189
 190         memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
 191         return 0;
 192
 193 fail:
 194         memset(ptr, 0xff, len);
 195         return -1;
 196 }
 197
 198 /*=====================================================================
 199
 200     cb_alloc() and cb_free() allocate and free the kernel data
 201     structures for a Cardbus device, and handle the lowest level PCI
 202     device setup issues.
 203
 204 =====================================================================*/
 205
 206 /*
 207  * Since there is only one interrupt available to CardBus
 208  * devices, all devices downstream of this device must
 209  * be using this IRQ.
 210  */
 211 static void cardbus_assign_irqs(struct pci_bus *bus, int irq)
 212 {
 213         struct pci_dev *dev;
 214
 215         list_for_each_entry(dev, &bus->devices, bus_list) {
 216                 u8 irq_pin;
 217
 218                 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
 219                 if (irq_pin) {
 220                         dev->irq = irq;
 221                         pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
 222                 }
 223
 224                 if (dev->subordinate)
 225                         cardbus_assign_irqs(dev->subordinate, irq);
 226         }
 227 }
 228
 229 int cb_alloc(struct pcmcia_socket * s)
 230 {
 231         struct pci_bus *bus = s->cb_dev->subordinate;
 232         struct pci_dev *dev;
 233         unsigned int max, pass;
 234
 235         s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
 236 //      pcibios_fixup_bus(bus);
 237
 238         max = bus->secondary;
 239         for (pass = 0; pass < 2; pass++)
 240                 list_for_each_entry(dev, &bus->devices, bus_list)
 241                         if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
 242                             dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
 243                                 max = pci_scan_bridge(bus, dev, max, pass);
 244
 245         /*
 246          * Size all resources below the CardBus controller.
 247          */
 248         pci_bus_size_bridges(bus);
 249         pci_bus_assign_resources(bus);
 250         cardbus_assign_irqs(bus, s->pci_irq);
 251         pci_enable_bridges(bus);
 252         pci_bus_add_devices(bus);
 253
 254         s->irq.AssignedIRQ = s->pci_irq;
 255         return CS_SUCCESS;
 256 }
 257
 258 void cb_free(struct pcmcia_socket * s)
 259 {
 260         struct pci_dev *bridge = s->cb_dev;
 261
 262         cb_release_cis_mem(s);
 263
 264         if (bridge)
 265                 pci_remove_behind_bridge(bridge);
 266 }