2 drivers/net/tulip/tulip.h
4 Copyright 2000,2001 The Linux Kernel Team
5 Written/copyright 1994-2001 by Donald Becker.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
10 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
11 for more information on this driver, or visit the project
12 Web page at http://sourceforge.net/projects/tulip/
16 #ifndef __NET_TULIP_H__
17 #define __NET_TULIP_H__
19 #include <linux/config.h>
20 #include <linux/kernel.h>
21 #include <linux/types.h>
22 #include <linux/spinlock.h>
23 #include <linux/netdevice.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
31 /* undefine, or define to various debugging levels (>4 == obscene levels) */
34 /* undefine USE_IO_OPS for MMIO, define for PIO */
35 #ifdef CONFIG_TULIP_MMIO
43 struct tulip_chip_table
{
46 int valid_intrs
; /* CSR7 interrupt enable settings */
48 void (*media_timer
) (unsigned long data
);
54 HAS_MEDIA_TABLE
= 0x0002,
55 CSR12_IN_SROM
= 0x0004,
56 ALWAYS_CHECK_MII
= 0x0008,
58 MC_HASH_ONLY
= 0x0020, /* Hash-only multicast filter. */
59 HAS_PNICNWAY
= 0x0080,
60 HAS_NWAY
= 0x0040, /* Uses internal NWay xcvr. */
61 HAS_INTR_MITIGATION
= 0x0100,
64 COMET_MAC_ADDR
= 0x0800,
67 HAS_SWAPPED_SEEPROM
= 0x4000,
68 NEEDS_FAKE_MEDIA_TABLE
= 0x8000,
72 /* chip types. careful! order is VERY IMPORTANT here, as these
73 * are used throughout the driver as indices into arrays */
74 /* Note 21142 == 21143. */
79 DC21142
= 3, DC21143
= 3,
103 /* Offsets to the Command and Status Registers, "CSRs". All accesses
104 must be longword instructions and quadword aligned. */
124 /* register offset and bits for CFDD PCI config reg */
125 enum pci_cfg_driver_reg
{
127 CFDD_Sleep
= (1 << 31),
128 CFDD_Snooze
= (1 << 30),
131 #define RxPollInt (RxIntr|RxNoBuf|RxDied|RxJabber)
133 /* The bits in the CSR5 status registers, mostly interrupt sources. */
139 NormalIntr
= 0x10000,
140 AbnormalIntr
= 0x8000,
145 TxFIFOUnderflow
= 0x20,
153 enum tulip_mode_bits
{
154 TxThreshold
= (1 << 22),
155 FullDuplex
= (1 << 9),
157 AcceptBroadcast
= 0x0100,
158 AcceptAllMulticast
= 0x0080,
159 AcceptAllPhys
= 0x0040,
162 RxTx
= (TxOn
| RxOn
),
166 enum tulip_busconfig_bits
{
175 /* The Tulip Rx and Tx buffer descriptors. */
176 struct tulip_rx_desc
{
184 struct tulip_tx_desc
{
188 u32 buffer2
; /* We use only buffer 1. */
192 enum desc_status_bits
{
193 DescOwned
= 0x80000000,
194 RxDescFatalErr
= 0x8000,
199 enum t21143_csr6_bits
{
202 csr6_ign_dest_msb
= (1<<26),
204 csr6_scr
= (1<<24), /* scramble mode flag: can't be set */
205 csr6_pcs
= (1<<23), /* Enables PCS functions (symbol mode requires csr6_ps be set) default is set */
206 csr6_ttm
= (1<<22), /* Transmit Threshold Mode, set for 10baseT, 0 for 100BaseTX */
207 csr6_sf
= (1<<21), /* Store and forward. If set ignores TR bits */
208 csr6_hbd
= (1<<19), /* Heart beat disable. Disables SQE function in 10baseT */
209 csr6_ps
= (1<<18), /* Port Select. 0 (defualt) = 10baseT, 1 = 100baseTX: can't be set */
210 csr6_ca
= (1<<17), /* Collision Offset Enable. If set uses special algorithm in low collision situations */
211 csr6_trh
= (1<<15), /* Transmit Threshold high bit */
212 csr6_trl
= (1<<14), /* Transmit Threshold low bit */
214 /***************************************************************
215 * This table shows transmit threshold values based on media *
216 * and these two registers (from PNIC1 & 2 docs) Note: this is *
217 * all meaningless if sf is set. *
218 ***************************************************************/
220 /***********************************
221 * (trh,trl) * 100BaseTX * 10BaseT *
222 ***********************************
225 * (1,0) * 512 * 128 *
226 * (1,1) * 1024 * 160 *
227 ***********************************/
229 csr6_fc
= (1<<12), /* Forces a collision in next transmission (for testing in loopback mode) */
230 csr6_om_int_loop
= (1<<10), /* internal (FIFO) loopback flag */
231 csr6_om_ext_loop
= (1<<11), /* external (PMD) loopback flag */
232 /* set both and you get (PHY) loopback */
233 csr6_fd
= (1<<9), /* Full duplex mode, disables hearbeat, no loopback */
234 csr6_pm
= (1<<7), /* Pass All Multicast */
235 csr6_pr
= (1<<6), /* Promiscuous mode */
236 csr6_sb
= (1<<5), /* Start(1)/Stop(0) backoff counter */
237 csr6_if
= (1<<4), /* Inverse Filtering, rejects only addresses in address table: can't be set */
238 csr6_pb
= (1<<3), /* Pass Bad Frames, (1) causes even bad frames to be passed on */
239 csr6_ho
= (1<<2), /* Hash-only filtering mode: can't be set */
240 csr6_hp
= (1<<0), /* Hash/Perfect Receive Filtering Mode: can't be set */
242 csr6_mask_capture
= (csr6_sc
| csr6_ca
),
243 csr6_mask_defstate
= (csr6_mask_capture
| csr6_mbo
),
244 csr6_mask_hdcap
= (csr6_mask_defstate
| csr6_hbd
| csr6_ps
),
245 csr6_mask_hdcaptt
= (csr6_mask_hdcap
| csr6_trh
| csr6_trl
),
246 csr6_mask_fullcap
= (csr6_mask_hdcaptt
| csr6_fd
),
247 csr6_mask_fullpromisc
= (csr6_pr
| csr6_pm
),
248 csr6_mask_filters
= (csr6_hp
| csr6_ho
| csr6_if
),
249 csr6_mask_100bt
= (csr6_scr
| csr6_pcs
| csr6_hbd
),
253 /* Keep the ring sizes a power of two for efficiency.
254 Making the Tx ring too large decreases the effectiveness of channel
255 bonding and packet priority.
256 There are no ill effects from too-large receive rings. */
258 #define TX_RING_SIZE 32
259 #define RX_RING_SIZE 128
260 #define MEDIA_MASK 31
262 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
264 #define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */
266 #if defined(__sparc__) || defined(__hppa__)
267 /* The UltraSparc PCI controllers will disconnect at every 64-byte
268 * crossing anyways so it makes no sense to tell Tulip to burst
269 * any more than that.
271 #define TULIP_MAX_CACHE_LINE 16 /* in units of 32-bit words */
273 #define TULIP_MAX_CACHE_LINE 32 /* in units of 32-bit words */
277 /* Ring-wrap flag in length field, use for last ring entry.
278 0x01000000 means chain on buffer2 address,
279 0x02000000 means use the ring start address in CSR2/3.
280 Note: Some work-alike chips do not function correctly in chained mode.
281 The ASIX chip works only in chained mode.
282 Thus we indicates ring mode, but always write the 'next' field for
283 chained mode as well.
285 #define DESC_RING_WRAP 0x02000000
288 #define EEPROM_SIZE 512 /* 2 << EEPROM_ADDRLEN */
291 #define RUN_AT(x) (jiffies + (x))
293 #if defined(__i386__) /* AKA get_unaligned() */
294 #define get_u16(ptr) (*(u16 *)(ptr))
296 #define get_u16(ptr) (((u8*)(ptr))[0] + (((u8*)(ptr))[1]<<8))
302 unsigned char *leafdata
;
309 u8 csr12dir
; /* General purpose pin directions. */
311 unsigned has_nonmii
:1;
312 unsigned has_reset
:6;
314 u32 csr15val
; /* 21143 NWay setting. */
315 struct medialeaf mleaf
[0];
320 struct mediainfo
*next
;
332 struct tulip_private
{
333 const char *product_name
;
334 struct net_device
*next_module
;
335 struct tulip_rx_desc
*rx_ring
;
336 struct tulip_tx_desc
*tx_ring
;
337 dma_addr_t rx_ring_dma
;
338 dma_addr_t tx_ring_dma
;
339 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
340 struct ring_info tx_buffers
[TX_RING_SIZE
];
341 /* The addresses of receive-in-place skbuffs. */
342 struct ring_info rx_buffers
[RX_RING_SIZE
];
343 u16 setup_frame
[96]; /* Pseudo-Tx frame to init address table. */
347 struct net_device_stats stats
;
348 struct timer_list timer
; /* Media selection timer. */
349 struct timer_list oom_timer
; /* Out of memory timer. */
353 unsigned int cur_rx
, cur_tx
; /* The next free ring entry */
354 unsigned int dirty_rx
, dirty_tx
; /* The ring entries to be free()ed. */
356 #ifdef CONFIG_TULIP_NAPI_HW_MITIGATION
359 unsigned int full_duplex
:1; /* Full-duplex operation requested. */
360 unsigned int full_duplex_lock
:1;
361 unsigned int fake_addr
:1; /* Multiport board faked address. */
362 unsigned int default_port
:4; /* Last dev->if_port value. */
363 unsigned int media2
:4; /* Secondary monitored media port. */
364 unsigned int medialock
:1; /* Don't sense media type. */
365 unsigned int mediasense
:1; /* Media sensing in progress. */
366 unsigned int nway
:1, nwayset
:1; /* 21143 internal NWay. */
367 unsigned int csr0
; /* CSR0 setting. */
368 unsigned int csr6
; /* Current CSR6 control settings. */
369 unsigned char eeprom
[EEPROM_SIZE
]; /* Serial EEPROM contents. */
370 void (*link_change
) (struct net_device
* dev
, int csr5
);
371 u16 sym_advertise
, mii_advertise
; /* NWay capabilities advertised. */
372 u16 lpar
; /* 21143 Link partner ability. */
374 signed char phys
[4], mii_cnt
; /* MII device addresses. */
375 struct mediatable
*mtable
;
376 int cur_index
; /* Current media index. */
378 struct pci_dev
*pdev
;
382 unsigned long base_addr
;
384 int pad0
; /* Used for 8-byte alignment */
388 struct eeprom_fixup
{
393 u16 newtable
[32]; /* Max length below. */
398 extern u16 t21142_csr14
[];
399 void t21142_timer(unsigned long data
);
400 void t21142_start_nway(struct net_device
*dev
);
401 void t21142_lnk_change(struct net_device
*dev
, int csr5
);
405 void pnic2_lnk_change(struct net_device
*dev
, int csr5
);
406 void pnic2_timer(unsigned long data
);
407 void pnic2_start_nway(struct net_device
*dev
);
408 void pnic2_lnk_change(struct net_device
*dev
, int csr5
);
411 void tulip_parse_eeprom(struct net_device
*dev
);
412 int tulip_read_eeprom(struct net_device
*dev
, int location
, int addr_len
);
415 extern unsigned int tulip_max_interrupt_work
;
416 extern int tulip_rx_copybreak
;
417 irqreturn_t
tulip_interrupt(int irq
, void *dev_instance
, struct pt_regs
*regs
);
418 int tulip_refill_rx(struct net_device
*dev
);
419 #ifdef CONFIG_TULIP_NAPI
420 int tulip_poll(struct net_device
*dev
, int *budget
);
425 int tulip_mdio_read(struct net_device
*dev
, int phy_id
, int location
);
426 void tulip_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int value
);
427 void tulip_select_media(struct net_device
*dev
, int startup
);
428 int tulip_check_duplex(struct net_device
*dev
);
429 void tulip_find_mii (struct net_device
*dev
, int board_idx
);
432 void pnic_do_nway(struct net_device
*dev
);
433 void pnic_lnk_change(struct net_device
*dev
, int csr5
);
434 void pnic_timer(unsigned long data
);
437 void tulip_timer(unsigned long data
);
438 void mxic_timer(unsigned long data
);
439 void comet_timer(unsigned long data
);
442 extern int tulip_debug
;
443 extern const char * const medianame
[];
444 extern const char tulip_media_cap
[];
445 extern struct tulip_chip_table tulip_tbl
[];
446 void oom_timer(unsigned long data
);
447 extern u8 t21040_csr13
[];
456 #define inb(addr) readb((void*)(addr))
457 #define inw(addr) readw((void*)(addr))
458 #define inl(addr) readl((void*)(addr))
459 #define outb(val,addr) writeb((val), (void*)(addr))
460 #define outw(val,addr) writew((val), (void*)(addr))
461 #define outl(val,addr) writel((val), (void*)(addr))
462 #endif /* !USE_IO_OPS */
466 static inline void tulip_start_rxtx(struct tulip_private
*tp
)
468 long ioaddr
= tp
->base_addr
;
469 outl(tp
->csr6
| RxTx
, ioaddr
+ CSR6
);
471 (void) inl(ioaddr
+ CSR6
); /* mmio sync */
474 static inline void tulip_stop_rxtx(struct tulip_private
*tp
)
476 long ioaddr
= tp
->base_addr
;
477 u32 csr6
= inl(ioaddr
+ CSR6
);
480 outl(csr6
& ~RxTx
, ioaddr
+ CSR6
);
482 (void) inl(ioaddr
+ CSR6
); /* mmio sync */
486 static inline void tulip_restart_rxtx(struct tulip_private
*tp
)
490 tulip_start_rxtx(tp
);
493 #endif /* __NET_TULIP_H__ */