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initial commit with v2.6.9
[linux-2.6.9-moxart.git] / drivers / media / video / cx88 / cx88-video.c
blobe73b8ce4e210c9ff26b4343bfc174fda6bcc82da
1 /*
2 * device driver for Conexant 2388x based TV cards
3 * video4linux video interface
4 *
5 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/list.h>
24 #include <linux/module.h>
25 #include <linux/kmod.h>
26 #include <linux/kernel.h>
27 #include <linux/slab.h>
28 #include <linux/interrupt.h>
29 #include <asm/div64.h>
30
31 #include "cx88.h"
32
33 #define V4L2_I2C_CLIENTS 1
34
35 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
36 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
37 MODULE_LICENSE("GPL");
38
39 /* ------------------------------------------------------------------ */
40
41 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
42 MODULE_PARM(video_nr,"1-" __stringify(CX88_MAXBOARDS) "i");
43 MODULE_PARM_DESC(video_nr,"video device numbers");
44
45 static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
46 MODULE_PARM(vbi_nr,"1-" __stringify(CX88_MAXBOARDS) "i");
47 MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
48
49 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
50 MODULE_PARM(radio_nr,"1-" __stringify(CX88_MAXBOARDS) "i");
51 MODULE_PARM_DESC(radio_nr,"radio device numbers");
52
53 static unsigned int latency = UNSET;
54 MODULE_PARM(latency,"i");
55 MODULE_PARM_DESC(latency,"pci latency timer");
56
57 static unsigned int video_debug = 0;
58 MODULE_PARM(video_debug,"i");
59 MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
60
61 static unsigned int irq_debug = 0;
62 MODULE_PARM(irq_debug,"i");
63 MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
64
65 static unsigned int vid_limit = 16;
66 MODULE_PARM(vid_limit,"i");
67 MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
68
69 static unsigned int tuner[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
70 MODULE_PARM(tuner,"1-" __stringify(CX88_MAXBOARDS) "i");
71 MODULE_PARM_DESC(tuner,"tuner type");
72
73 static unsigned int card[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
74 MODULE_PARM(card,"1-" __stringify(CX88_MAXBOARDS) "i");
75 MODULE_PARM_DESC(card,"card type");
76
77 static unsigned int nicam = 0;
78 MODULE_PARM(nicam,"i");
79 MODULE_PARM_DESC(nicam,"tv audio is nicam");
80
81 #define dprintk(level,fmt, arg...) if (video_debug >= level) \
82 printk(KERN_DEBUG "%s: " fmt, dev->name , ## arg)
83
84 /* ------------------------------------------------------------------ */
85
86 static struct list_head cx8800_devlist;
87 static unsigned int cx8800_devcount;
88
89 /* ------------------------------------------------------------------- */
90 /* static data */
91
92 static unsigned int inline norm_swidth(struct cx8800_tvnorm *norm)
93 {
94 return (norm->id & V4L2_STD_625_50) ? 922 : 754;
95 }
96
97 static unsigned int inline norm_hdelay(struct cx8800_tvnorm *norm)
98 {
99 return (norm->id & V4L2_STD_625_50) ? 186 : 135;
100 }
101
102 static unsigned int inline norm_vdelay(struct cx8800_tvnorm *norm)
103 {
104 return (norm->id & V4L2_STD_625_50) ? 0x24 : 0x18;
105 }
106
107 static unsigned int inline norm_maxw(struct cx8800_tvnorm *norm)
108 {
109 return (norm->id & V4L2_STD_625_50) ? 768 : 640;
110 // return (norm->id & V4L2_STD_625_50) ? 720 : 640;
111 }
112
113 static unsigned int inline norm_maxh(struct cx8800_tvnorm *norm)
114 {
115 return (norm->id & V4L2_STD_625_50) ? 576 : 480;
116 }
117
118 static unsigned int inline norm_fsc8(struct cx8800_tvnorm *norm)
119 {
120 static const unsigned int ntsc = 28636360;
121 static const unsigned int pal = 35468950;
122
123 return (norm->id & V4L2_STD_625_50) ? pal : ntsc;
124 }
125
126 static unsigned int inline norm_notchfilter(struct cx8800_tvnorm *norm)
127 {
128 return (norm->id & V4L2_STD_625_50)
129 ? HLNotchFilter135PAL
130 : HLNotchFilter135NTSC;
131 }
132
133 static unsigned int inline norm_htotal(struct cx8800_tvnorm *norm)
134 {
135 return (norm->id & V4L2_STD_625_50) ? 1135 : 910;
136 }
137
138 static unsigned int inline norm_vbipack(struct cx8800_tvnorm *norm)
139 {
140 return (norm->id & V4L2_STD_625_50) ? 511 : 288;
141 }
142
143 static struct cx8800_tvnorm tvnorms[] = {
144 {
145 .name = "NTSC-M",
146 .id = V4L2_STD_NTSC_M,
147 .cxiformat = VideoFormatNTSC,
148 .cxoformat = 0x181f0008,
149 },{
150 .name = "NTSC-JP",
151 .id = V4L2_STD_NTSC_M_JP,
152 .cxiformat = VideoFormatNTSCJapan,
153 .cxoformat = 0x181f0008,
154 #if 0
155 },{
156 .name = "NTSC-4.43",
157 .id = FIXME,
158 .cxiformat = VideoFormatNTSC443,
159 .cxoformat = 0x181f0008,
160 #endif
161 },{
162 .name = "PAL-BG",
163 .id = V4L2_STD_PAL_BG,
164 .cxiformat = VideoFormatPAL,
165 .cxoformat = 0x181f0008,
166 },{
167 .name = "PAL-DK",
168 .id = V4L2_STD_PAL_DK,
169 .cxiformat = VideoFormatPAL,
170 .cxoformat = 0x181f0008,
171 },{
172 .name = "PAL-I",
173 .id = V4L2_STD_PAL_I,
174 .cxiformat = VideoFormatPAL,
175 .cxoformat = 0x181f0008,
176 },{
177 .name = "PAL-M",
178 .id = V4L2_STD_PAL_M,
179 .cxiformat = VideoFormatPALM,
180 .cxoformat = 0x1c1f0008,
181 },{
182 .name = "PAL-N",
183 .id = V4L2_STD_PAL_N,
184 .cxiformat = VideoFormatPALN,
185 .cxoformat = 0x1c1f0008,
186 },{
187 .name = "PAL-Nc",
188 .id = V4L2_STD_PAL_Nc,
189 .cxiformat = VideoFormatPALNC,
190 .cxoformat = 0x1c1f0008,
191 },{
192 .name = "PAL-60",
193 .id = V4L2_STD_PAL_60,
194 .cxiformat = VideoFormatPAL60,
195 .cxoformat = 0x181f0008,
196 },{
197 .name = "SECAM-L",
198 .id = V4L2_STD_SECAM_L,
199 .cxiformat = VideoFormatSECAM,
200 .cxoformat = 0x181f0008,
201 },{
202 .name = "SECAM-DK",
203 .id = V4L2_STD_SECAM_DK,
204 .cxiformat = VideoFormatSECAM,
205 .cxoformat = 0x181f0008,
206 }
207 };
208
209 static struct cx8800_fmt formats[] = {
210 {
211 .name = "8 bpp, gray",
212 .fourcc = V4L2_PIX_FMT_GREY,
213 .cxformat = ColorFormatY8,
214 .depth = 8,
215 .flags = FORMAT_FLAGS_PACKED,
216 },{
217 .name = "15 bpp RGB, le",
218 .fourcc = V4L2_PIX_FMT_RGB555,
219 .cxformat = ColorFormatRGB15,
220 .depth = 16,
221 .flags = FORMAT_FLAGS_PACKED,
222 },{
223 .name = "15 bpp RGB, be",
224 .fourcc = V4L2_PIX_FMT_RGB555X,
225 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
226 .depth = 16,
227 .flags = FORMAT_FLAGS_PACKED,
228 },{
229 .name = "16 bpp RGB, le",
230 .fourcc = V4L2_PIX_FMT_RGB565,
231 .cxformat = ColorFormatRGB16,
232 .depth = 16,
233 .flags = FORMAT_FLAGS_PACKED,
234 },{
235 .name = "16 bpp RGB, be",
236 .fourcc = V4L2_PIX_FMT_RGB565X,
237 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
238 .depth = 16,
239 .flags = FORMAT_FLAGS_PACKED,
240 },{
241 .name = "24 bpp RGB, le",
242 .fourcc = V4L2_PIX_FMT_BGR24,
243 .cxformat = ColorFormatRGB24,
244 .depth = 24,
245 .flags = FORMAT_FLAGS_PACKED,
246 },{
247 .name = "32 bpp RGB, le",
248 .fourcc = V4L2_PIX_FMT_BGR32,
249 .cxformat = ColorFormatRGB32,
250 .depth = 32,
251 .flags = FORMAT_FLAGS_PACKED,
252 },{
253 .name = "32 bpp RGB, be",
254 .fourcc = V4L2_PIX_FMT_RGB32,
255 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
256 .depth = 32,
257 .flags = FORMAT_FLAGS_PACKED,
258 },{
259 .name = "4:2:2, packed, YUYV",
260 .fourcc = V4L2_PIX_FMT_YUYV,
261 .cxformat = ColorFormatYUY2,
262 .depth = 16,
263 .flags = FORMAT_FLAGS_PACKED,
264 },{
265 .name = "4:2:2, packed, UYVY",
266 .fourcc = V4L2_PIX_FMT_UYVY,
267 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
268 .depth = 16,
269 .flags = FORMAT_FLAGS_PACKED,
270 },
271 };
272
273 static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
274 {
275 unsigned int i;
276
277 for (i = 0; i < ARRAY_SIZE(formats); i++)
278 if (formats[i].fourcc == fourcc)
279 return formats+i;
280 return NULL;
281 }
282
283 /* ------------------------------------------------------------------- */
284
285 static const struct v4l2_queryctrl no_ctl = {
286 .name = "42",
287 .flags = V4L2_CTRL_FLAG_DISABLED,
288 };
289
290 static struct cx88_ctrl cx8800_ctls[] = {
291 /* --- video --- */
292 {
293 .v = {
294 .id = V4L2_CID_BRIGHTNESS,
295 .name = "Brightness",
296 .minimum = 0x00,
297 .maximum = 0xff,
298 .step = 1,
299 .default_value = 0,
300 .type = V4L2_CTRL_TYPE_INTEGER,
301 },
302 .off = 128,
303 .reg = MO_CONTR_BRIGHT,
304 .mask = 0x00ff,
305 .shift = 0,
306 },{
307 .v = {
308 .id = V4L2_CID_CONTRAST,
309 .name = "Contrast",
310 .minimum = 0,
311 .maximum = 0xff,
312 .step = 1,
313 .default_value = 0,
314 .type = V4L2_CTRL_TYPE_INTEGER,
315 },
316 .reg = MO_CONTR_BRIGHT,
317 .mask = 0xff00,
318 .shift = 8,
319 },{
320 .v = {
321 .id = V4L2_CID_HUE,
322 .name = "Hue",
323 .minimum = 0,
324 .maximum = 0xff,
325 .step = 1,
326 .default_value = 0,
327 .type = V4L2_CTRL_TYPE_INTEGER,
328 },
329 .off = 0,
330 .reg = MO_HUE,
331 .mask = 0x00ff,
332 .shift = 0,
333 },{
334 /* strictly, this only describes only U saturation.
335 * V saturation is handled specially through code.
336 */
337 .v = {
338 .id = V4L2_CID_SATURATION,
339 .name = "Saturation",
340 .minimum = 0,
341 .maximum = 0xff,
342 .step = 1,
343 .default_value = 0,
344 .type = V4L2_CTRL_TYPE_INTEGER,
345 },
346 .off = 0,
347 .reg = MO_UV_SATURATION,
348 .mask = 0x00ff,
349 .shift = 0,
350 },{
351 /* --- audio --- */
352 .v = {
353 .id = V4L2_CID_AUDIO_MUTE,
354 .name = "Mute",
355 .minimum = 0,
356 .maximum = 1,
357 .type = V4L2_CTRL_TYPE_BOOLEAN,
358 },
359 .reg = AUD_VOL_CTL,
360 .sreg = SHADOW_AUD_VOL_CTL,
361 .mask = (1 << 6),
362 .shift = 6,
363 },{
364 .v = {
365 .id = V4L2_CID_AUDIO_VOLUME,
366 .name = "Volume",
367 .minimum = 0,
368 .maximum = 0x3f,
369 .step = 1,
370 .default_value = 0,
371 .type = V4L2_CTRL_TYPE_INTEGER,
372 },
373 .reg = AUD_VOL_CTL,
374 .sreg = SHADOW_AUD_VOL_CTL,
375 .mask = 0x3f,
376 .shift = 0,
377 },{
378 .v = {
379 .id = V4L2_CID_AUDIO_BALANCE,
380 .name = "Balance",
381 .minimum = 0,
382 .maximum = 0x7f,
383 .step = 1,
384 .default_value = 0x40,
385 .type = V4L2_CTRL_TYPE_INTEGER,
386 },
387 .reg = AUD_BAL_CTL,
388 .sreg = SHADOW_AUD_BAL_CTL,
389 .mask = 0x7f,
390 .shift = 0,
391 }
392 };
393 const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
394
395 /* ------------------------------------------------------------------- */
396 /* resource management */
397
398 static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
399 {
400 if (fh->resources & bit)
401 /* have it already allocated */
402 return 1;
403
404 /* is it free? */
405 down(&dev->lock);
406 if (dev->resources & bit) {
407 /* no, someone else uses it */
408 up(&dev->lock);
409 return 0;
410 }
411 /* it's free, grab it */
412 fh->resources |= bit;
413 dev->resources |= bit;
414 dprintk(1,"res: get %d\n",bit);
415 up(&dev->lock);
416 return 1;
417 }
418
419 static
420 int res_check(struct cx8800_fh *fh, unsigned int bit)
421 {
422 return (fh->resources & bit);
423 }
424
425 static
426 int res_locked(struct cx8800_dev *dev, unsigned int bit)
427 {
428 return (dev->resources & bit);
429 }
430
431 static
432 void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
433 {
434 if ((fh->resources & bits) != bits)
435 BUG();
436
437 down(&dev->lock);
438 fh->resources &= ~bits;
439 dev->resources &= ~bits;
440 dprintk(1,"res: put %d\n",bits);
441 up(&dev->lock);
442 }
443
444 /* ------------------------------------------------------------------ */
445
446 static const u32 xtal = 28636363;
447
448 static int set_pll(struct cx8800_dev *dev, int prescale, u32 ofreq)
449 {
450 static u32 pre[] = { 0, 0, 0, 3, 2, 1 };
451 u64 pll;
452 u32 reg;
453 int i;
454
455 if (prescale < 2)
456 prescale = 2;
457 if (prescale > 5)
458 prescale = 5;
459
460 pll = ofreq * 8 * prescale * (u64)(1 << 20);
461 do_div(pll,xtal);
462 reg = (pll & 0x3ffffff) | (pre[prescale] << 26);
463 if (((reg >> 20) & 0x3f) < 14) {
464 printk("%s: pll out of range\n",dev->name);
465 return -1;
466 }
467
468 dprintk(1,"set_pll: MO_PLL_REG 0x%08x [old=0x%08x,freq=%d]\n",
469 reg, cx_read(MO_PLL_REG), ofreq);
470 cx_write(MO_PLL_REG, reg);
471 for (i = 0; i < 10; i++) {
472 reg = cx_read(MO_DEVICE_STATUS);
473 if (reg & (1<<2)) {
474 dprintk(1,"pll locked [pre=%d,ofreq=%d]\n",
475 prescale,ofreq);
476 return 0;
477 }
478 dprintk(1,"pll not locked yet, waiting ...\n");
479 set_current_state(TASK_INTERRUPTIBLE);
480 schedule_timeout(HZ/10);
481 }
482 dprintk(1,"pll NOT locked [pre=%d,ofreq=%d]\n",prescale,ofreq);
483 return -1;
484 }
485
486 static int set_tvaudio(struct cx8800_dev *dev)
487 {
488 if (CX88_VMUX_TELEVISION != INPUT(dev->input)->type)
489 return 0;
490
491 if (V4L2_STD_PAL_BG & dev->tvnorm->id) {
492 dev->tvaudio = nicam ? WW_NICAM_BGDKL : WW_A2_BG;
493
494 } else if (V4L2_STD_PAL_DK & dev->tvnorm->id) {
495 dev->tvaudio = nicam ? WW_NICAM_BGDKL : WW_A2_DK;
496
497 } else if (V4L2_STD_PAL_I & dev->tvnorm->id) {
498 dev->tvaudio = WW_NICAM_I;
499
500 } else if (V4L2_STD_SECAM_L & dev->tvnorm->id) {
501 dev->tvaudio = WW_SYSTEM_L_AM;
502
503 } else if (V4L2_STD_SECAM_DK & dev->tvnorm->id) {
504 dev->tvaudio = WW_A2_DK;
505
506 } else if ((V4L2_STD_NTSC_M & dev->tvnorm->id) ||
507 (V4L2_STD_PAL_M & dev->tvnorm->id)) {
508 dev->tvaudio = WW_BTSC;
509
510 } else if (V4L2_STD_NTSC_M_JP & dev->tvnorm->id) {
511 dev->tvaudio = WW_EIAJ;
512
513 } else {
514 printk("%s: tvaudio support needs work for this tv norm [%s], sorry\n",
515 dev->name, dev->tvnorm->name);
516 dev->tvaudio = 0;
517 return 0;
518 }
519
520 cx_andor(MO_AFECFG_IO, 0x1f, 0x0);
521 cx88_set_tvaudio(dev);
522 // cx88_set_stereo(dev,V4L2_TUNER_MODE_STEREO);
523
524 cx_write(MO_AUDD_LNGTH, 128/8); /* fifo size */
525 cx_write(MO_AUDR_LNGTH, 128/8); /* fifo size */
526 cx_write(MO_AUD_DMACNTRL, 0x03); /* need audio fifo */
527 return 0;
528 }
529
530 static int set_tvnorm(struct cx8800_dev *dev, struct cx8800_tvnorm *norm)
531 {
532 u32 fsc8;
533 u32 adc_clock;
534 u32 vdec_clock;
535 u64 tmp64;
536 u32 bdelay,agcdelay,htotal;
537
538 dev->tvnorm = norm;
539 fsc8 = norm_fsc8(norm);
540 adc_clock = xtal;
541 vdec_clock = fsc8;
542
543 dprintk(1,"set_tvnorm: \"%s\" fsc8=%d adc=%d vdec=%d\n",
544 norm->name, fsc8, adc_clock, vdec_clock);
545 set_pll(dev,2,vdec_clock);
546
547 dprintk(1,"set_tvnorm: MO_INPUT_FORMAT 0x%08x [old=0x%08x]\n",
548 norm->cxiformat, cx_read(MO_INPUT_FORMAT) & 0x0f);
549 cx_andor(MO_INPUT_FORMAT, 0xf, norm->cxiformat);
550
551 #if 1
552 // FIXME: as-is from DScaler
553 dprintk(1,"set_tvnorm: MO_OUTPUT_FORMAT 0x%08x [old=0x%08x]\n",
554 norm->cxoformat, cx_read(MO_OUTPUT_FORMAT));
555 cx_write(MO_OUTPUT_FORMAT, norm->cxoformat);
556 #endif
557
558 // MO_SCONV_REG = adc clock / video dec clock * 2^17
559 tmp64 = adc_clock * (u64)(1 << 17);
560 do_div(tmp64, vdec_clock);
561 dprintk(1,"set_tvnorm: MO_SCONV_REG 0x%08x [old=0x%08x]\n",
562 (u32)tmp64, cx_read(MO_SCONV_REG));
563 cx_write(MO_SCONV_REG, (u32)tmp64);
564
565 // MO_SUB_STEP = 8 * fsc / video dec clock * 2^22
566 tmp64 = fsc8 * (u64)(1 << 22);
567 do_div(tmp64, vdec_clock);
568 dprintk(1,"set_tvnorm: MO_SUB_STEP 0x%08x [old=0x%08x]\n",
569 (u32)tmp64, cx_read(MO_SUB_STEP));
570 cx_write(MO_SUB_STEP, (u32)tmp64);
571
572 // MO_SUB_STEP_DR = 8 * 4406250 / video dec clock * 2^22
573 tmp64 = 4406250 * 8 * (u64)(1 << 22);
574 do_div(tmp64, vdec_clock);
575 dprintk(1,"set_tvnorm: MO_SUB_STEP_DR 0x%08x [old=0x%08x]\n",
576 (u32)tmp64, cx_read(MO_SUB_STEP_DR));
577 cx_write(MO_SUB_STEP_DR, (u32)tmp64);
578
579 // bdelay + agcdelay
580 bdelay = vdec_clock * 65 / 20000000 + 21;
581 agcdelay = vdec_clock * 68 / 20000000 + 15;
582 dprintk(1,"set_tvnorm: MO_AGC_BURST 0x%08x [old=0x%08x,bdelay=%d,agcdelay=%d]\n",
583 (bdelay << 8) | agcdelay, cx_read(MO_AGC_BURST), bdelay, agcdelay);
584 cx_write(MO_AGC_BURST, (bdelay << 8) | agcdelay);
585
586 // htotal
587 tmp64 = norm_htotal(norm) * (u64)vdec_clock;
588 do_div(tmp64, fsc8);
589 htotal = (u32)tmp64 | (norm_notchfilter(norm) << 11);
590 dprintk(1,"set_tvnorm: MO_HTOTAL 0x%08x [old=0x%08x,htotal=%d]\n",
591 htotal, cx_read(MO_HTOTAL), (u32)tmp64);
592 cx_write(MO_HTOTAL, htotal);
593
594 // vbi stuff
595 cx_write(MO_VBI_PACKET, ((1 << 11) | /* (norm_vdelay(norm) << 11) | */
596 norm_vbipack(norm)));
597
598 // audio
599 set_tvaudio(dev);
600
601 // tell i2c chips
602 #ifdef V4L2_I2C_CLIENTS
603 cx8800_call_i2c_clients(dev,VIDIOC_S_STD,&norm->id);
604 #else
605 {
606 struct video_channel c;
607 memset(&c,0,sizeof(c));
608 c.channel = dev->input;
609 c.norm = VIDEO_MODE_PAL;
610 if ((norm->id & (V4L2_STD_NTSC_M|V4L2_STD_NTSC_M_JP)))
611 c.norm = VIDEO_MODE_NTSC;
612 if (norm->id & V4L2_STD_SECAM)
613 c.norm = VIDEO_MODE_SECAM;
614 cx8800_call_i2c_clients(dev,VIDIOCSCHAN,&c);
615 }
616 #endif
617
618 // done
619 return 0;
620 }
621
622 static int set_scale(struct cx8800_dev *dev, unsigned int width, unsigned int height,
623 enum v4l2_field field)
624 {
625 unsigned int swidth = norm_swidth(dev->tvnorm);
626 unsigned int sheight = norm_maxh(dev->tvnorm);
627 u32 value;
628
629 dprintk(1,"set_scale: %dx%d [%s%s,%s]\n", width, height,
630 V4L2_FIELD_HAS_TOP(field) ? "T" : "",
631 V4L2_FIELD_HAS_BOTTOM(field) ? "B" : "",
632 dev->tvnorm->name);
633 if (!V4L2_FIELD_HAS_BOTH(field))
634 height *= 2;
635
636 // recalc H delay and scale registers
637 value = (width * norm_hdelay(dev->tvnorm)) / swidth;
638 value &= 0x3fe;
639 cx_write(MO_HDELAY_EVEN, value);
640 cx_write(MO_HDELAY_ODD, value);
641 dprintk(1,"set_scale: hdelay 0x%04x\n", value);
642
643 value = (swidth * 4096 / width) - 4096;
644 cx_write(MO_HSCALE_EVEN, value);
645 cx_write(MO_HSCALE_ODD, value);
646 dprintk(1,"set_scale: hscale 0x%04x\n", value);
647
648 cx_write(MO_HACTIVE_EVEN, width);
649 cx_write(MO_HACTIVE_ODD, width);
650 dprintk(1,"set_scale: hactive 0x%04x\n", width);
651
652 // recalc V scale Register (delay is constant)
653 cx_write(MO_VDELAY_EVEN, norm_vdelay(dev->tvnorm));
654 cx_write(MO_VDELAY_ODD, norm_vdelay(dev->tvnorm));
655 dprintk(1,"set_scale: vdelay 0x%04x\n", norm_vdelay(dev->tvnorm));
656
657 value = (0x10000 - (sheight * 512 / height - 512)) & 0x1fff;
658 cx_write(MO_VSCALE_EVEN, value);
659 cx_write(MO_VSCALE_ODD, value);
660 dprintk(1,"set_scale: vscale 0x%04x\n", value);
661
662 cx_write(MO_VACTIVE_EVEN, sheight);
663 cx_write(MO_VACTIVE_ODD, sheight);
664 dprintk(1,"set_scale: vactive 0x%04x\n", sheight);
665
666 // setup filters
667 value = 0;
668 value |= (1 << 19); // CFILT (default)
669 if (V4L2_FIELD_INTERLACED == field)
670 value |= (1 << 3); // VINT (interlaced vertical scaling)
671 if (width < 385)
672 value |= (1 << 0); // 3-tap interpolation
673 if (width < 193)
674 value |= (1 << 1); // 5-tap interpolation
675
676 cx_write(MO_FILTER_EVEN, value);
677 cx_write(MO_FILTER_ODD, value);
678 dprintk(1,"set_scale: filter 0x%04x\n", value);
679
680 return 0;
681 }
682
683 static int video_mux(struct cx8800_dev *dev, unsigned int input)
684 {
685 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
686 input, INPUT(input)->vmux,
687 INPUT(input)->gpio0,INPUT(input)->gpio1,
688 INPUT(input)->gpio2,INPUT(input)->gpio3);
689 dev->input = input;
690 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input)->vmux << 14);
691 cx_write(MO_GP0_IO, INPUT(input)->gpio0);
692 cx_write(MO_GP1_IO, INPUT(input)->gpio1);
693 cx_write(MO_GP2_IO, INPUT(input)->gpio2);
694 cx_write(MO_GP3_IO, INPUT(input)->gpio3);
695
696 switch (INPUT(input)->type) {
697 case CX88_VMUX_SVIDEO:
698 cx_set(MO_AFECFG_IO, 0x00000001);
699 cx_set(MO_INPUT_FORMAT, 0x00010010);
700 break;
701 default:
702 cx_clear(MO_AFECFG_IO, 0x00000001);
703 cx_clear(MO_INPUT_FORMAT, 0x00010010);
704 break;
705 }
706 return 0;
707 }
708
709 /* ------------------------------------------------------------------ */
710
711 static int start_video_dma(struct cx8800_dev *dev,
712 struct cx88_dmaqueue *q,
713 struct cx88_buffer *buf)
714 {
715 /* setup fifo + format */
716 cx88_sram_channel_setup(dev, &cx88_sram_channels[SRAM_CH21],
717 buf->bpl, buf->risc.dma);
718 set_scale(dev, buf->vb.width, buf->vb.height, buf->vb.field);
719 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
720
721 /* reset counter */
722 cx_write(MO_VIDY_GPCNTRL,0x3);
723 q->count = 1;
724
725 /* enable irqs */
726 cx_set(MO_PCI_INTMSK, 0x00fc01);
727 cx_set(MO_VID_INTMSK, 0x0f0011);
728
729 /* enable capture */
730 cx_set(VID_CAPTURE_CONTROL,0x06);
731
732 /* start dma */
733 cx_set(MO_DEV_CNTRL2, (1<<5));
734 cx_set(MO_VID_DMACNTRL, 0x11);
735
736 return 0;
737 }
738
739 static int restart_video_queue(struct cx8800_dev *dev,
740 struct cx88_dmaqueue *q)
741 {
742 struct cx88_buffer *buf, *prev;
743 struct list_head *item;
744
745 if (!list_empty(&q->active)) {
746 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
747 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
748 buf, buf->vb.i);
749 start_video_dma(dev, q, buf);
750 list_for_each(item,&q->active) {
751 buf = list_entry(item, struct cx88_buffer, vb.queue);
752 buf->count = q->count++;
753 }
754 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
755 return 0;
756 }
757
758 prev = NULL;
759 for (;;) {
760 if (list_empty(&q->queued))
761 return 0;
762 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
763 if (NULL == prev) {
764 list_del(&buf->vb.queue);
765 list_add_tail(&buf->vb.queue,&q->active);
766 start_video_dma(dev, q, buf);
767 buf->vb.state = STATE_ACTIVE;
768 buf->count = q->count++;
769 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
770 dprintk(2,"[%p/%d] restart_queue - first active\n",
771 buf,buf->vb.i);
772
773 } else if (prev->vb.width == buf->vb.width &&
774 prev->vb.height == buf->vb.height &&
775 prev->fmt == buf->fmt) {
776 list_del(&buf->vb.queue);
777 list_add_tail(&buf->vb.queue,&q->active);
778 buf->vb.state = STATE_ACTIVE;
779 buf->count = q->count++;
780 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
781 dprintk(2,"[%p/%d] restart_queue - move to active\n",
782 buf,buf->vb.i);
783 } else {
784 return 0;
785 }
786 prev = buf;
787 }
788 }
789
790 /* ------------------------------------------------------------------ */
791
792 static int
793 buffer_setup(struct file *file, unsigned int *count, unsigned int *size)
794 {
795 struct cx8800_fh *fh = file->private_data;
796
797 *size = fh->fmt->depth*fh->width*fh->height >> 3;
798 if (0 == *count)
799 *count = 32;
800 while (*size * *count > vid_limit * 1024 * 1024)
801 (*count)--;
802 return 0;
803 }
804
805 static int
806 buffer_prepare(struct file *file, struct videobuf_buffer *vb,
807 enum v4l2_field field)
808 {
809 struct cx8800_fh *fh = file->private_data;
810 struct cx8800_dev *dev = fh->dev;
811 struct cx88_buffer *buf = (struct cx88_buffer*)vb;
812 int rc, init_buffer = 0;
813
814 BUG_ON(NULL == fh->fmt);
815 if (fh->width < 48 || fh->width > norm_maxw(dev->tvnorm) ||
816 fh->height < 32 || fh->height > norm_maxh(dev->tvnorm))
817 return -EINVAL;
818 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
819 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
820 return -EINVAL;
821
822 if (buf->fmt != fh->fmt ||
823 buf->vb.width != fh->width ||
824 buf->vb.height != fh->height ||
825 buf->vb.field != field) {
826 buf->fmt = fh->fmt;
827 buf->vb.width = fh->width;
828 buf->vb.height = fh->height;
829 buf->vb.field = field;
830 init_buffer = 1;
831 }
832
833 if (STATE_NEEDS_INIT == buf->vb.state) {
834 init_buffer = 1;
835 if (0 != (rc = videobuf_iolock(dev->pci,&buf->vb,NULL)))
836 goto fail;
837 }
838
839 if (init_buffer) {
840 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
841 switch (buf->vb.field) {
842 case V4L2_FIELD_TOP:
843 cx88_risc_buffer(dev->pci, &buf->risc,
844 buf->vb.dma.sglist, 0, UNSET,
845 buf->bpl, 0, buf->vb.height);
846 break;
847 case V4L2_FIELD_BOTTOM:
848 cx88_risc_buffer(dev->pci, &buf->risc,
849 buf->vb.dma.sglist, UNSET, 0,
850 buf->bpl, 0, buf->vb.height);
851 break;
852 case V4L2_FIELD_INTERLACED:
853 cx88_risc_buffer(dev->pci, &buf->risc,
854 buf->vb.dma.sglist, 0, buf->bpl,
855 buf->bpl, buf->bpl,
856 buf->vb.height >> 1);
857 break;
858 case V4L2_FIELD_SEQ_TB:
859 cx88_risc_buffer(dev->pci, &buf->risc,
860 buf->vb.dma.sglist,
861 0, buf->bpl * (buf->vb.height >> 1),
862 buf->bpl, 0,
863 buf->vb.height >> 1);
864 break;
865 case V4L2_FIELD_SEQ_BT:
866 cx88_risc_buffer(dev->pci, &buf->risc,
867 buf->vb.dma.sglist,
868 buf->bpl * (buf->vb.height >> 1), 0,
869 buf->bpl, 0,
870 buf->vb.height >> 1);
871 break;
872 default:
873 BUG();
874 }
875 }
876 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
877 buf, buf->vb.i,
878 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
879 (unsigned long)buf->risc.dma);
880
881 buf->vb.state = STATE_PREPARED;
882 return 0;
883
884 fail:
885 cx88_free_buffer(dev->pci,buf);
886 return rc;
887 }
888
889 static void
890 buffer_queue(struct file *file, struct videobuf_buffer *vb)
891 {
892 struct cx88_buffer *buf = (struct cx88_buffer*)vb;
893 struct cx88_buffer *prev;
894 struct cx8800_fh *fh = file->private_data;
895 struct cx8800_dev *dev = fh->dev;
896 struct cx88_dmaqueue *q = &dev->vidq;
897
898 /* add jump to stopper */
899 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | 0x10000);
900 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
901
902 if (!list_empty(&q->queued)) {
903 list_add_tail(&buf->vb.queue,&q->queued);
904 buf->vb.state = STATE_QUEUED;
905 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
906 buf, buf->vb.i);
907
908 } else if (list_empty(&q->active)) {
909 list_add_tail(&buf->vb.queue,&q->active);
910 start_video_dma(dev, q, buf);
911 buf->vb.state = STATE_ACTIVE;
912 buf->count = q->count++;
913 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
914 dprintk(2,"[%p/%d] buffer_queue - first active\n",
915 buf, buf->vb.i);
916
917 } else {
918 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
919 if (prev->vb.width == buf->vb.width &&
920 prev->vb.height == buf->vb.height &&
921 prev->fmt == buf->fmt) {
922 list_add_tail(&buf->vb.queue,&q->active);
923 buf->vb.state = STATE_ACTIVE;
924 buf->count = q->count++;
925 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
926 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
927 buf, buf->vb.i);
928
929 } else {
930 list_add_tail(&buf->vb.queue,&q->queued);
931 buf->vb.state = STATE_QUEUED;
932 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
933 buf, buf->vb.i);
934 }
935 }
936 }
937
938 static void buffer_release(struct file *file, struct videobuf_buffer *vb)
939 {
940 struct cx88_buffer *buf = (struct cx88_buffer*)vb;
941 struct cx8800_fh *fh = file->private_data;
942
943 cx88_free_buffer(fh->dev->pci,buf);
944 }
945
946 struct videobuf_queue_ops cx8800_video_qops = {
947 .buf_setup = buffer_setup,
948 .buf_prepare = buffer_prepare,
949 .buf_queue = buffer_queue,
950 .buf_release = buffer_release,
951 };
952
953 /* ------------------------------------------------------------------ */
954
955 #if 0 /* overlay support not finished yet */
956 static u32* ov_risc_field(struct cx8800_dev *dev, struct cx8800_fh *fh,
957 u32 *rp, struct btcx_skiplist *skips,
958 u32 sync_line, int skip_even, int skip_odd)
959 {
960 int line,maxy,start,end,skip,nskips;
961 u32 ri,ra;
962 u32 addr;
963
964 /* sync instruction */
965 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
966
967 addr = (unsigned long)dev->fbuf.base;
968 addr += dev->fbuf.fmt.bytesperline * fh->win.w.top;
969 addr += (fh->fmt->depth >> 3) * fh->win.w.left;
970
971 /* scan lines */
972 for (maxy = -1, line = 0; line < fh->win.w.height;
973 line++, addr += dev->fbuf.fmt.bytesperline) {
974 if ((line%2) == 0 && skip_even)
975 continue;
976 if ((line%2) == 1 && skip_odd)
977 continue;
978
979 /* calculate clipping */
980 if (line > maxy)
981 btcx_calc_skips(line, fh->win.w.width, &maxy,
982 skips, &nskips, fh->clips, fh->nclips);
983
984 /* write out risc code */
985 for (start = 0, skip = 0; start < fh->win.w.width; start = end) {
986 if (skip >= nskips) {
987 ri = RISC_WRITE;
988 end = fh->win.w.width;
989 } else if (start < skips[skip].start) {
990 ri = RISC_WRITE;
991 end = skips[skip].start;
992 } else {
993 ri = RISC_SKIP;
994 end = skips[skip].end;
995 skip++;
996 }
997 if (RISC_WRITE == ri)
998 ra = addr + (fh->fmt->depth>>3)*start;
999 else
1000 ra = 0;
1001
1002 if (0 == start)
1003 ri |= RISC_SOL;
1004 if (fh->win.w.width == end)
1005 ri |= RISC_EOL;
1006 ri |= (fh->fmt->depth>>3) * (end-start);
1007
1008 *(rp++)=cpu_to_le32(ri);
1009 if (0 != ra)
1010 *(rp++)=cpu_to_le32(ra);
1011 }
1012 }
1013 kfree(skips);
1014 return rp;
1015 }
1016
1017 static int ov_risc_frame(struct cx8800_dev *dev, struct cx8800_fh *fh,
1018 struct cx88_buffer *buf)
1019 {
1020 struct btcx_skiplist *skips;
1021 u32 instructions,fields;
1022 u32 *rp;
1023 int rc;
1024
1025 /* skip list for window clipping */
1026 if (NULL == (skips = kmalloc(sizeof(*skips) * fh->nclips,GFP_KERNEL)))
1027 return -ENOMEM;
1028
1029 fields = 0;
1030 if (V4L2_FIELD_HAS_TOP(fh->win.field))
1031 fields++;
1032 if (V4L2_FIELD_HAS_BOTTOM(fh->win.field))
1033 fields++;
1034
1035 /* estimate risc mem: worst case is (clip+1) * lines instructions
1036 + syncs + jump (all 2 dwords) */
1037 instructions = (fh->nclips+1) * fh->win.w.height;
1038 instructions += 3 + 4;
1039 if ((rc = btcx_riscmem_alloc(dev->pci,&buf->risc,instructions*8)) < 0) {
1040 kfree(skips);
1041 return rc;
1042 }
1043
1044 /* write risc instructions */
1045 rp = buf->risc.cpu;
1046 switch (fh->win.field) {
1047 case V4L2_FIELD_TOP:
1048 rp = ov_risc_field(dev, fh, rp, skips, 0, 0, 0);
1049 break;
1050 case V4L2_FIELD_BOTTOM:
1051 rp = ov_risc_field(dev, fh, rp, skips, 0x200, 0, 0);
1052 break;
1053 case V4L2_FIELD_INTERLACED:
1054 rp = ov_risc_field(dev, fh, rp, skips, 0, 0, 1);
1055 rp = ov_risc_field(dev, fh, rp, skips, 0x200, 1, 0);
1056 break;
1057 default:
1058 BUG();
1059 }
1060
1061 /* save pointer to jmp instruction address */
1062 buf->risc.jmp = rp;
1063 kfree(skips);
1064 return 0;
1065 }
1066
1067 static int verify_window(struct cx8800_dev *dev, struct v4l2_window *win)
1068 {
1069 enum v4l2_field field;
1070 int maxw, maxh;
1071
1072 if (NULL == dev->fbuf.base)
1073 return -EINVAL;
1074 if (win->w.width < 48 || win->w.height < 32)
1075 return -EINVAL;
1076 if (win->clipcount > 2048)
1077 return -EINVAL;
1078
1079 field = win->field;
1080 maxw = norm_maxw(dev->tvnorm);
1081 maxh = norm_maxh(dev->tvnorm);
1082
1083 if (V4L2_FIELD_ANY == field) {
1084 field = (win->w.height > maxh/2)
1085 ? V4L2_FIELD_INTERLACED
1086 : V4L2_FIELD_TOP;
1087 }
1088 switch (field) {
1089 case V4L2_FIELD_TOP:
1090 case V4L2_FIELD_BOTTOM:
1091 maxh = maxh / 2;
1092 break;
1093 case V4L2_FIELD_INTERLACED:
1094 break;
1095 default:
1096 return -EINVAL;
1097 }
1098
1099 win->field = field;
1100 if (win->w.width > maxw)
1101 win->w.width = maxw;
1102 if (win->w.height > maxh)
1103 win->w.height = maxh;
1104 return 0;
1105 }
1106
1107 static int setup_window(struct cx8800_dev *dev, struct cx8800_fh *fh,
1108 struct v4l2_window *win)
1109 {
1110 struct v4l2_clip *clips = NULL;
1111 int n,size,retval = 0;
1112
1113 if (NULL == fh->fmt)
1114 return -EINVAL;
1115 retval = verify_window(dev,win);
1116 if (0 != retval)
1117 return retval;
1118
1119 /* copy clips -- luckily v4l1 + v4l2 are binary
1120 compatible here ...*/
1121 n = win->clipcount;
1122 size = sizeof(*clips)*(n+4);
1123 clips = kmalloc(size,GFP_KERNEL);
1124 if (NULL == clips)
1125 return -ENOMEM;
1126 if (n > 0) {
1127 if (copy_from_user(clips,win->clips,sizeof(struct v4l2_clip)*n)) {
1128 kfree(clips);
1129 return -EFAULT;
1130 }
1131 }
1132
1133 /* clip against screen */
1134 if (NULL != dev->fbuf.base)
1135 n = btcx_screen_clips(dev->fbuf.fmt.width, dev->fbuf.fmt.height,
1136 &win->w, clips, n);
1137 btcx_sort_clips(clips,n);
1138
1139 /* 4-byte alignments */
1140 switch (fh->fmt->depth) {
1141 case 8:
1142 case 24:
1143 btcx_align(&win->w, clips, n, 3);
1144 break;
1145 case 16:
1146 btcx_align(&win->w, clips, n, 1);
1147 break;
1148 case 32:
1149 /* no alignment fixups needed */
1150 break;
1151 default:
1152 BUG();
1153 }
1154
1155 down(&fh->vidq.lock);
1156 if (fh->clips)
1157 kfree(fh->clips);
1158 fh->clips = clips;
1159 fh->nclips = n;
1160 fh->win = *win;
1161 #if 0
1162 fh->ov.setup_ok = 1;
1163 #endif
1164
1165 /* update overlay if needed */
1166 retval = 0;
1167 #if 0
1168 if (check_btres(fh, RESOURCE_OVERLAY)) {
1169 struct bttv_buffer *new;
1170
1171 new = videobuf_alloc(sizeof(*new));
1172 bttv_overlay_risc(btv, &fh->ov, fh->ovfmt, new);
1173 retval = bttv_switch_overlay(btv,fh,new);
1174 }
1175 #endif
1176 up(&fh->vidq.lock);
1177 return retval;
1178 }
1179 #endif
1180
1181 /* ------------------------------------------------------------------ */
1182
1183 static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
1184 {
1185 switch (fh->type) {
1186 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1187 return &fh->vidq;
1188 case V4L2_BUF_TYPE_VBI_CAPTURE:
1189 return &fh->vbiq;
1190 default:
1191 BUG();
1192 return NULL;
1193 }
1194 }
1195
1196 static int get_ressource(struct cx8800_fh *fh)
1197 {
1198 switch (fh->type) {
1199 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1200 return RESOURCE_VIDEO;
1201 case V4L2_BUF_TYPE_VBI_CAPTURE:
1202 return RESOURCE_VBI;
1203 default:
1204 BUG();
1205 return 0;
1206 }
1207 }
1208
1209 static int video_open(struct inode *inode, struct file *file)
1210 {
1211 int minor = iminor(inode);
1212 struct cx8800_dev *h,*dev = NULL;
1213 struct cx8800_fh *fh;
1214 struct list_head *list;
1215 enum v4l2_buf_type type = 0;
1216 int radio = 0;
1217
1218 list_for_each(list,&cx8800_devlist) {
1219 h = list_entry(list, struct cx8800_dev, devlist);
1220 if (h->video_dev->minor == minor) {
1221 dev = h;
1222 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1223 }
1224 if (h->vbi_dev->minor == minor) {
1225 dev = h;
1226 type = V4L2_BUF_TYPE_VBI_CAPTURE;
1227 }
1228 if (h->radio_dev &&
1229 h->radio_dev->minor == minor) {
1230 radio = 1;
1231 dev = h;
1232 }
1233 }
1234 if (NULL == dev)
1235 return -ENODEV;
1236
1237 dprintk(1,"open minor=%d radio=%d type=%s\n",
1238 minor,radio,v4l2_type_names[type]);
1239
1240 /* allocate + initialize per filehandle data */
1241 fh = kmalloc(sizeof(*fh),GFP_KERNEL);
1242 if (NULL == fh)
1243 return -ENOMEM;
1244 memset(fh,0,sizeof(*fh));
1245 file->private_data = fh;
1246 fh->dev = dev;
1247 fh->radio = radio;
1248 fh->type = type;
1249 fh->width = 320;
1250 fh->height = 240;
1251 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1252
1253 videobuf_queue_init(&fh->vidq, &cx8800_video_qops,
1254 dev->pci, &dev->slock,
1255 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1256 V4L2_FIELD_INTERLACED,
1257 sizeof(struct cx88_buffer));
1258 videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops,
1259 dev->pci, &dev->slock,
1260 V4L2_BUF_TYPE_VBI_CAPTURE,
1261 V4L2_FIELD_SEQ_TB,
1262 sizeof(struct cx88_buffer));
1263 init_MUTEX(&fh->vidq.lock);
1264 init_MUTEX(&fh->vbiq.lock);
1265
1266 if (fh->radio) {
1267 dprintk(1,"video_open: setting radio device\n");
1268 cx_write(MO_GP0_IO, cx88_boards[dev->board].radio.gpio0);
1269 cx_write(MO_GP1_IO, cx88_boards[dev->board].radio.gpio1);
1270 cx_write(MO_GP2_IO, cx88_boards[dev->board].radio.gpio2);
1271 cx_write(MO_GP3_IO, cx88_boards[dev->board].radio.gpio3);
1272 dev->tvaudio = WW_FM;
1273 cx88_set_tvaudio(dev);
1274 cx88_set_stereo(dev,V4L2_TUNER_MODE_STEREO);
1275 cx8800_call_i2c_clients(dev,AUDC_SET_RADIO,NULL);
1276 }
1277
1278 return 0;
1279 }
1280
1281 static ssize_t
1282 video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1283 {
1284 struct cx8800_fh *fh = file->private_data;
1285
1286 switch (fh->type) {
1287 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1288 if (res_locked(fh->dev,RESOURCE_VIDEO))
1289 return -EBUSY;
1290 return videobuf_read_one(file, &fh->vidq, data, count, ppos);
1291 case V4L2_BUF_TYPE_VBI_CAPTURE:
1292 if (!res_get(fh->dev,fh,RESOURCE_VBI))
1293 return -EBUSY;
1294 return videobuf_read_stream(file, &fh->vbiq, data, count, ppos, 1);
1295 default:
1296 BUG();
1297 return 0;
1298 }
1299 }
1300
1301 static unsigned int
1302 video_poll(struct file *file, struct poll_table_struct *wait)
1303 {
1304 struct cx8800_fh *fh = file->private_data;
1305
1306 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type)
1307 return videobuf_poll_stream(file, &fh->vbiq, wait);
1308
1309 /* FIXME */
1310 return POLLERR;
1311 }
1312
1313 static int video_release(struct inode *inode, struct file *file)
1314 {
1315 struct cx8800_fh *fh = file->private_data;
1316 struct cx8800_dev *dev = fh->dev;
1317
1318 /* turn off overlay */
1319 if (res_check(fh, RESOURCE_OVERLAY)) {
1320 /* FIXME */
1321 res_free(dev,fh,RESOURCE_OVERLAY);
1322 }
1323
1324 /* stop video capture */
1325 if (res_check(fh, RESOURCE_VIDEO)) {
1326 videobuf_queue_cancel(file,&fh->vidq);
1327 res_free(dev,fh,RESOURCE_VIDEO);
1328 }
1329 if (fh->vidq.read_buf) {
1330 buffer_release(file,fh->vidq.read_buf);
1331 kfree(fh->vidq.read_buf);
1332 }
1333
1334 /* stop vbi capture */
1335 if (res_check(fh, RESOURCE_VBI)) {
1336 if (fh->vbiq.streaming)
1337 videobuf_streamoff(file,&fh->vbiq);
1338 if (fh->vbiq.reading)
1339 videobuf_read_stop(file,&fh->vbiq);
1340 res_free(dev,fh,RESOURCE_VBI);
1341 }
1342
1343 file->private_data = NULL;
1344 kfree(fh);
1345 return 0;
1346 }
1347
1348 static int
1349 video_mmap(struct file *file, struct vm_area_struct * vma)
1350 {
1351 struct cx8800_fh *fh = file->private_data;
1352
1353 return videobuf_mmap_mapper(vma, get_queue(fh));
1354 }
1355
1356 /* ------------------------------------------------------------------ */
1357
1358 static int get_control(struct cx8800_dev *dev, struct v4l2_control *ctl)
1359 {
1360 struct cx88_ctrl *c = NULL;
1361 u32 value;
1362 int i;
1363
1364 for (i = 0; i < CX8800_CTLS; i++)
1365 if (cx8800_ctls[i].v.id == ctl->id)
1366 c = &cx8800_ctls[i];
1367 if (NULL == c)
1368 return -EINVAL;
1369
1370 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
1371 switch (ctl->id) {
1372 case V4L2_CID_AUDIO_BALANCE:
1373 ctl->value = (value & 0x40) ? (value & 0x3f) : (0x40 - (value & 0x3f));
1374 break;
1375 case V4L2_CID_AUDIO_VOLUME:
1376 ctl->value = 0x3f - (value & 0x3f);
1377 break;
1378 default:
1379 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
1380 break;
1381 }
1382 return 0;
1383 }
1384
1385 static int set_control(struct cx8800_dev *dev, struct v4l2_control *ctl)
1386 {
1387 struct cx88_ctrl *c = NULL;
1388 u32 v_sat_value;
1389 u32 value;
1390 int i;
1391
1392 for (i = 0; i < CX8800_CTLS; i++)
1393 if (cx8800_ctls[i].v.id == ctl->id)
1394 c = &cx8800_ctls[i];
1395 if (NULL == c)
1396 return -EINVAL;
1397
1398 if (ctl->value < c->v.minimum)
1399 return -ERANGE;
1400 if (ctl->value > c->v.maximum)
1401 return -ERANGE;
1402 switch (ctl->id) {
1403 case V4L2_CID_AUDIO_BALANCE:
1404 value = (ctl->value < 0x40) ? (0x40 - ctl->value) : ctl->value;
1405 break;
1406 case V4L2_CID_AUDIO_VOLUME:
1407 value = 0x3f - (ctl->value & 0x3f);
1408 break;
1409 case V4L2_CID_SATURATION:
1410 /* special v_sat handling */
1411 v_sat_value = ctl->value - (0x7f - 0x5a);
1412 if (v_sat_value > 0xff)
1413 v_sat_value = 0xff;
1414 if (v_sat_value < 0x00)
1415 v_sat_value = 0x00;
1416 cx_andor(MO_UV_SATURATION, 0xff00, v_sat_value << 8);
1417 /* fall through to default route for u_sat */
1418 default:
1419 value = ((ctl->value - c->off) << c->shift) & c->mask;
1420 break;
1421 }
1422 dprintk(1,"set_control id=0x%X reg=0x%x val=0x%x%s\n",
1423 ctl->id, c->reg, value, c->sreg ? " [shadowed]" : "");
1424 if (c->sreg) {
1425 cx_sandor(c->sreg, c->reg, c->mask, value);
1426 } else {
1427 cx_andor(c->reg, c->mask, value);
1428 }
1429 return 0;
1430 }
1431
1432 static void init_controls(struct cx8800_dev *dev)
1433 {
1434 static struct v4l2_control mute = {
1435 .id = V4L2_CID_AUDIO_MUTE,
1436 .value = 1,
1437 };
1438 static struct v4l2_control volume = {
1439 .id = V4L2_CID_AUDIO_VOLUME,
1440 .value = 0x3f,
1441 };
1442
1443 set_control(dev,&mute);
1444 set_control(dev,&volume);
1445 }
1446
1447 /* ------------------------------------------------------------------ */
1448
1449 static int cx8800_g_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1450 struct v4l2_format *f)
1451 {
1452 switch (f->type) {
1453 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1454 memset(&f->fmt.pix,0,sizeof(f->fmt.pix));
1455 f->fmt.pix.width = fh->width;
1456 f->fmt.pix.height = fh->height;
1457 f->fmt.pix.field = fh->vidq.field;
1458 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1459 f->fmt.pix.bytesperline =
1460 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1461 f->fmt.pix.sizeimage =
1462 f->fmt.pix.height * f->fmt.pix.bytesperline;
1463 return 0;
1464 case V4L2_BUF_TYPE_VBI_CAPTURE:
1465 cx8800_vbi_fmt(dev, f);
1466 return 0;
1467 default:
1468 return -EINVAL;
1469 }
1470 }
1471
1472 static int cx8800_try_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1473 struct v4l2_format *f)
1474 {
1475 switch (f->type) {
1476 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1477 {
1478 struct cx8800_fmt *fmt;
1479 enum v4l2_field field;
1480 unsigned int maxw, maxh;
1481
1482 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1483 if (NULL == fmt)
1484 return -EINVAL;
1485
1486 field = f->fmt.pix.field;
1487 maxw = norm_maxw(dev->tvnorm);
1488 maxh = norm_maxh(dev->tvnorm);
1489
1490 if (V4L2_FIELD_ANY == field) {
1491 field = (f->fmt.pix.height > maxh/2)
1492 ? V4L2_FIELD_INTERLACED
1493 : V4L2_FIELD_BOTTOM;
1494 }
1495
1496 switch (field) {
1497 case V4L2_FIELD_TOP:
1498 case V4L2_FIELD_BOTTOM:
1499 maxh = maxh / 2;
1500 break;
1501 case V4L2_FIELD_INTERLACED:
1502 break;
1503 default:
1504 return -EINVAL;
1505 }
1506
1507 f->fmt.pix.field = field;
1508 if (f->fmt.pix.height < 32)
1509 f->fmt.pix.height = 32;
1510 if (f->fmt.pix.height > maxh)
1511 f->fmt.pix.height = maxh;
1512 if (f->fmt.pix.width < 48)
1513 f->fmt.pix.width = 48;
1514 if (f->fmt.pix.width > maxw)
1515 f->fmt.pix.width = maxw;
1516 f->fmt.pix.width &= ~0x03;
1517 f->fmt.pix.bytesperline =
1518 (f->fmt.pix.width * fmt->depth) >> 3;
1519 f->fmt.pix.sizeimage =
1520 f->fmt.pix.height * f->fmt.pix.bytesperline;
1521
1522 return 0;
1523 }
1524 case V4L2_BUF_TYPE_VBI_CAPTURE:
1525 cx8800_vbi_fmt(dev, f);
1526 return 0;
1527 default:
1528 return -EINVAL;
1529 }
1530 }
1531
1532 static int cx8800_s_fmt(struct cx8800_dev *dev, struct cx8800_fh *fh,
1533 struct v4l2_format *f)
1534 {
1535 int err;
1536
1537 switch (f->type) {
1538 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1539 err = cx8800_try_fmt(dev,fh,f);
1540 if (0 != err)
1541 return err;
1542
1543 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1544 fh->width = f->fmt.pix.width;
1545 fh->height = f->fmt.pix.height;
1546 fh->vidq.field = f->fmt.pix.field;
1547 return 0;
1548 case V4L2_BUF_TYPE_VBI_CAPTURE:
1549 cx8800_vbi_fmt(dev, f);
1550 return 0;
1551 default:
1552 return -EINVAL;
1553 }
1554 }
1555
1556 /*
1557 * This function is _not_ called directly, but from
1558 * video_generic_ioctl (and maybe others). userspace
1559 * copying is done already, arg is a kernel pointer.
1560 */
1561 static int video_do_ioctl(struct inode *inode, struct file *file,
1562 unsigned int cmd, void *arg)
1563 {
1564 struct cx8800_fh *fh = file->private_data;
1565 struct cx8800_dev *dev = fh->dev;
1566 #if 0
1567 unsigned long flags;
1568 #endif
1569 int err;
1570
1571 if (video_debug > 1)
1572 cx88_print_ioctl(dev->name,cmd);
1573 switch (cmd) {
1574 case VIDIOC_QUERYCAP:
1575 {
1576 struct v4l2_capability *cap = arg;
1577
1578 memset(cap,0,sizeof(*cap));
1579 strcpy(cap->driver, "cx8800");
1580 strlcpy(cap->card, cx88_boards[dev->board].name,
1581 sizeof(cap->card));
1582 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1583 cap->version = CX88_VERSION_CODE;
1584 cap->capabilities =
1585 V4L2_CAP_VIDEO_CAPTURE |
1586 V4L2_CAP_READWRITE |
1587 V4L2_CAP_STREAMING |
1588 V4L2_CAP_VBI_CAPTURE |
1589 #if 0
1590 V4L2_CAP_VIDEO_OVERLAY |
1591 #endif
1592 0;
1593 if (UNSET != dev->tuner_type)
1594 cap->capabilities |= V4L2_CAP_TUNER;
1595
1596 return 0;
1597 }
1598
1599 /* ---------- tv norms ---------- */
1600 case VIDIOC_ENUMSTD:
1601 {
1602 struct v4l2_standard *e = arg;
1603 unsigned int i;
1604
1605 i = e->index;
1606 if (i >= ARRAY_SIZE(tvnorms))
1607 return -EINVAL;
1608 err = v4l2_video_std_construct(e, tvnorms[e->index].id,
1609 tvnorms[e->index].name);
1610 e->index = i;
1611 if (err < 0)
1612 return err;
1613 return 0;
1614 }
1615 case VIDIOC_G_STD:
1616 {
1617 v4l2_std_id *id = arg;
1618
1619 *id = dev->tvnorm->id;
1620 return 0;
1621 }
1622 case VIDIOC_S_STD:
1623 {
1624 v4l2_std_id *id = arg;
1625 unsigned int i;
1626
1627 for(i = 0; i < ARRAY_SIZE(tvnorms); i++)
1628 if (*id & tvnorms[i].id)
1629 break;
1630 if (i == ARRAY_SIZE(tvnorms))
1631 return -EINVAL;
1632
1633 down(&dev->lock);
1634 set_tvnorm(dev,&tvnorms[i]);
1635 up(&dev->lock);
1636 return 0;
1637 }
1638
1639 /* ------ input switching ---------- */
1640 case VIDIOC_ENUMINPUT:
1641 {
1642 static const char *iname[] = {
1643 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1644 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1645 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1646 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1647 [ CX88_VMUX_TELEVISION ] = "Television",
1648 [ CX88_VMUX_SVIDEO ] = "S-Video",
1649 [ CX88_VMUX_DEBUG ] = "for debug only",
1650 };
1651 struct v4l2_input *i = arg;
1652 unsigned int n;
1653
1654 n = i->index;
1655 if (n >= 4)
1656 return -EINVAL;
1657 if (0 == INPUT(n)->type)
1658 return -EINVAL;
1659 memset(i,0,sizeof(*i));
1660 i->index = n;
1661 i->type = V4L2_INPUT_TYPE_CAMERA;
1662 strcpy(i->name,iname[INPUT(n)->type]);
1663 if (CX88_VMUX_TELEVISION == INPUT(n)->type)
1664 i->type = V4L2_INPUT_TYPE_TUNER;
1665 for (n = 0; n < ARRAY_SIZE(tvnorms); n++)
1666 i->std |= tvnorms[n].id;
1667 return 0;
1668 }
1669 case VIDIOC_G_INPUT:
1670 {
1671 unsigned int *i = arg;
1672
1673 *i = dev->input;
1674 return 0;
1675 }
1676 case VIDIOC_S_INPUT:
1677 {
1678 unsigned int *i = arg;
1679
1680 if (*i >= 4)
1681 return -EINVAL;
1682 down(&dev->lock);
1683 video_mux(dev,*i);
1684 up(&dev->lock);
1685 return 0;
1686 }
1687
1688 /* --- capture ioctls ---------------------------------------- */
1689 case VIDIOC_ENUM_FMT:
1690 {
1691 struct v4l2_fmtdesc *f = arg;
1692 enum v4l2_buf_type type;
1693 unsigned int index;
1694
1695 index = f->index;
1696 type = f->type;
1697 switch (type) {
1698 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
1699 if (index >= ARRAY_SIZE(formats))
1700 return -EINVAL;
1701 memset(f,0,sizeof(*f));
1702 f->index = index;
1703 f->type = type;
1704 strlcpy(f->description,formats[index].name,sizeof(f->description));
1705 f->pixelformat = formats[index].fourcc;
1706 break;
1707 default:
1708 return -EINVAL;
1709 }
1710 return 0;
1711 }
1712 case VIDIOC_G_FMT:
1713 {
1714 struct v4l2_format *f = arg;
1715 return cx8800_g_fmt(dev,fh,f);
1716 }
1717 case VIDIOC_S_FMT:
1718 {
1719 struct v4l2_format *f = arg;
1720 return cx8800_s_fmt(dev,fh,f);
1721 }
1722 case VIDIOC_TRY_FMT:
1723 {
1724 struct v4l2_format *f = arg;
1725 return cx8800_try_fmt(dev,fh,f);
1726 }
1727
1728 /* --- controls ---------------------------------------------- */
1729 case VIDIOC_QUERYCTRL:
1730 {
1731 struct v4l2_queryctrl *c = arg;
1732 int i;
1733
1734 if (c->id < V4L2_CID_BASE ||
1735 c->id >= V4L2_CID_LASTP1)
1736 return -EINVAL;
1737 for (i = 0; i < CX8800_CTLS; i++)
1738 if (cx8800_ctls[i].v.id == c->id)
1739 break;
1740 if (i == CX8800_CTLS) {
1741 *c = no_ctl;
1742 return 0;
1743 }
1744 *c = cx8800_ctls[i].v;
1745 return 0;
1746 }
1747 case VIDIOC_G_CTRL:
1748 return get_control(dev,arg);
1749 case VIDIOC_S_CTRL:
1750 return set_control(dev,arg);
1751
1752 /* --- tuner ioctls ------------------------------------------ */
1753 case VIDIOC_G_TUNER:
1754 {
1755 struct v4l2_tuner *t = arg;
1756 u32 reg;
1757
1758 if (UNSET == dev->tuner_type)
1759 return -EINVAL;
1760 if (0 != t->index)
1761 return -EINVAL;
1762
1763 memset(t,0,sizeof(*t));
1764 strcpy(t->name, "Television");
1765 t->type = V4L2_TUNER_ANALOG_TV;
1766 t->capability = V4L2_TUNER_CAP_NORM;
1767 t->rangehigh = 0xffffffffUL;
1768
1769 cx88_get_stereo(dev ,t);
1770 reg = cx_read(MO_DEVICE_STATUS);
1771 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1772 return 0;
1773 }
1774 case VIDIOC_S_TUNER:
1775 {
1776 struct v4l2_tuner *t = arg;
1777
1778 if (UNSET == dev->tuner_type)
1779 return -EINVAL;
1780 if (0 != t->index)
1781 return -EINVAL;
1782 cx88_set_stereo(dev,t->audmode);
1783 return 0;
1784 }
1785 case VIDIOC_G_FREQUENCY:
1786 {
1787 struct v4l2_frequency *f = arg;
1788
1789 if (UNSET == dev->tuner_type)
1790 return -EINVAL;
1791 if (f->tuner != 0)
1792 return -EINVAL;
1793 memset(f,0,sizeof(*f));
1794 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1795 f->frequency = dev->freq;
1796 return 0;
1797 }
1798 case VIDIOC_S_FREQUENCY:
1799 {
1800 struct v4l2_frequency *f = arg;
1801
1802 if (UNSET == dev->tuner_type)
1803 return -EINVAL;
1804 if (f->tuner != 0)
1805 return -EINVAL;
1806 if (0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV)
1807 return -EINVAL;
1808 if (1 == fh->radio && f->type != V4L2_TUNER_RADIO)
1809 return -EINVAL;
1810 down(&dev->lock);
1811 dev->freq = f->frequency;
1812 #ifdef V4L2_I2C_CLIENTS
1813 cx8800_call_i2c_clients(dev,VIDIOC_S_FREQUENCY,f);
1814 #else
1815 cx8800_call_i2c_clients(dev,VIDIOCSFREQ,&dev->freq);
1816 #endif
1817 up(&dev->lock);
1818 return 0;
1819 }
1820
1821 /* --- streaming capture ------------------------------------- */
1822 case VIDIOCGMBUF:
1823 {
1824 struct video_mbuf *mbuf = arg;
1825 struct videobuf_queue *q;
1826 struct v4l2_requestbuffers req;
1827 unsigned int i;
1828
1829 q = get_queue(fh);
1830 memset(&req,0,sizeof(req));
1831 req.type = q->type;
1832 req.count = 8;
1833 req.memory = V4L2_MEMORY_MMAP;
1834 err = videobuf_reqbufs(file,q,&req);
1835 if (err < 0)
1836 return err;
1837 memset(mbuf,0,sizeof(*mbuf));
1838 mbuf->frames = req.count;
1839 mbuf->size = 0;
1840 for (i = 0; i < mbuf->frames; i++) {
1841 mbuf->offsets[i] = q->bufs[i]->boff;
1842 mbuf->size += q->bufs[i]->bsize;
1843 }
1844 return 0;
1845 }
1846 case VIDIOC_REQBUFS:
1847 return videobuf_reqbufs(file, get_queue(fh), arg);
1848
1849 case VIDIOC_QUERYBUF:
1850 return videobuf_querybuf(get_queue(fh), arg);
1851
1852 case VIDIOC_QBUF:
1853 return videobuf_qbuf(file, get_queue(fh), arg);
1854
1855 case VIDIOC_DQBUF:
1856 return videobuf_dqbuf(file, get_queue(fh), arg);
1857
1858 case VIDIOC_STREAMON:
1859 {
1860 int res = get_ressource(fh);
1861
1862 if (!res_get(dev,fh,res))
1863 return -EBUSY;
1864 return videobuf_streamon(file, get_queue(fh));
1865 }
1866 case VIDIOC_STREAMOFF:
1867 {
1868 int res = get_ressource(fh);
1869
1870 err = videobuf_streamoff(file, get_queue(fh));
1871 if (err < 0)
1872 return err;
1873 res_free(dev,fh,res);
1874 return 0;
1875 }
1876
1877 default:
1878 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
1879 video_do_ioctl);
1880 }
1881 return 0;
1882 }
1883
1884 static int video_ioctl(struct inode *inode, struct file *file,
1885 unsigned int cmd, unsigned long arg)
1886 {
1887 return video_usercopy(inode, file, cmd, arg, video_do_ioctl);
1888 }
1889
1890 /* ----------------------------------------------------------- */
1891
1892 static int radio_do_ioctl(struct inode *inode, struct file *file,
1893 unsigned int cmd, void *arg)
1894 {
1895 struct cx8800_fh *fh = file->private_data;
1896 struct cx8800_dev *dev = fh->dev;
1897
1898 if (video_debug > 1)
1899 cx88_print_ioctl(dev->name,cmd);
1900
1901 switch (cmd) {
1902 case VIDIOC_QUERYCAP:
1903 {
1904 struct v4l2_capability *cap = arg;
1905
1906 memset(cap,0,sizeof(*cap));
1907 strcpy(cap->driver, "cx8800");
1908 strlcpy(cap->card, cx88_boards[dev->board].name,
1909 sizeof(cap->card));
1910 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1911 cap->version = CX88_VERSION_CODE;
1912 cap->capabilities = V4L2_CAP_TUNER;
1913 return 0;
1914 }
1915 case VIDIOC_G_TUNER:
1916 {
1917 struct v4l2_tuner *t = arg;
1918
1919 if (t->index > 0)
1920 return -EINVAL;
1921
1922 memset(t,0,sizeof(*t));
1923 strcpy(t->name, "Radio");
1924 t->rangelow = (int)(65*16);
1925 t->rangehigh = (int)(108*16);
1926
1927 #ifdef V4L2_I2C_CLIENTS
1928 cx8800_call_i2c_clients(dev,VIDIOC_G_TUNER,t);
1929 #else
1930 {
1931 struct video_tuner vt;
1932 memset(&vt,0,sizeof(vt));
1933 cx8800_call_i2c_clients(dev,VIDIOCGTUNER,&vt);
1934 t->signal = vt.signal;
1935 }
1936 #endif
1937 return 0;
1938 }
1939 case VIDIOC_ENUMINPUT:
1940 {
1941 struct v4l2_input *i = arg;
1942
1943 if (i->index != 0)
1944 return -EINVAL;
1945 strcpy(i->name,"Radio");
1946 i->type = V4L2_INPUT_TYPE_TUNER;
1947 return 0;
1948 }
1949 case VIDIOC_G_INPUT:
1950 {
1951 int *i = arg;
1952 *i = 0;
1953 return 0;
1954 }
1955 case VIDIOC_G_AUDIO:
1956 {
1957 struct v4l2_audio *a = arg;
1958
1959 memset(a,0,sizeof(*a));
1960 strcpy(a->name,"Radio");
1961 return 0;
1962 }
1963 case VIDIOC_G_STD:
1964 {
1965 v4l2_std_id *id = arg;
1966 *id = 0;
1967 return 0;
1968 }
1969 case VIDIOC_S_AUDIO:
1970 case VIDIOC_S_TUNER:
1971 case VIDIOC_S_INPUT:
1972 case VIDIOC_S_STD:
1973 return 0;
1974
1975 case VIDIOC_QUERYCTRL:
1976 {
1977 struct v4l2_queryctrl *c = arg;
1978 int i;
1979
1980 if (c->id < V4L2_CID_BASE ||
1981 c->id >= V4L2_CID_LASTP1)
1982 return -EINVAL;
1983 if (c->id == V4L2_CID_AUDIO_MUTE) {
1984 for (i = 0; i < CX8800_CTLS; i++)
1985 if (cx8800_ctls[i].v.id == c->id)
1986 break;
1987 *c = cx8800_ctls[i].v;
1988 } else
1989 *c = no_ctl;
1990 return 0;
1991 }
1992
1993
1994 case VIDIOC_G_CTRL:
1995 case VIDIOC_S_CTRL:
1996 case VIDIOC_G_FREQUENCY:
1997 case VIDIOC_S_FREQUENCY:
1998 return video_do_ioctl(inode,file,cmd,arg);
1999
2000 default:
2001 return v4l_compat_translate_ioctl(inode,file,cmd,arg,
2002 radio_do_ioctl);
2003 }
2004 return 0;
2005 };
2006
2007 static int radio_ioctl(struct inode *inode, struct file *file,
2008 unsigned int cmd, unsigned long arg)
2009 {
2010 return video_usercopy(inode, file, cmd, arg, radio_do_ioctl);
2011 };
2012
2013 /* ----------------------------------------------------------- */
2014
2015 static void cx8800_vid_timeout(unsigned long data)
2016 {
2017 struct cx8800_dev *dev = (struct cx8800_dev*)data;
2018 struct cx88_dmaqueue *q = &dev->vidq;
2019 struct cx88_buffer *buf;
2020 unsigned long flags;
2021
2022 cx88_sram_channel_dump(dev, &cx88_sram_channels[SRAM_CH21]);
2023 //cx88_risc_disasm(dev,&dev->vidq.stopper);
2024
2025 cx_clear(MO_VID_DMACNTRL, 0x11);
2026 cx_clear(VID_CAPTURE_CONTROL, 0x06);
2027
2028 spin_lock_irqsave(&dev->slock,flags);
2029 while (!list_empty(&q->active)) {
2030 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
2031 list_del(&buf->vb.queue);
2032 buf->vb.state = STATE_ERROR;
2033 wake_up(&buf->vb.done);
2034 printk("%s: [%p/%d] timeout - dma=0x%08lx\n", dev->name,
2035 buf, buf->vb.i, (unsigned long)buf->risc.dma);
2036 }
2037 restart_video_queue(dev,q);
2038 spin_unlock_irqrestore(&dev->slock,flags);
2039 }
2040
2041 static void cx8800_wakeup(struct cx8800_dev *dev,
2042 struct cx88_dmaqueue *q, u32 count)
2043 {
2044 struct cx88_buffer *buf;
2045
2046 for (;;) {
2047 if (list_empty(&q->active))
2048 break;
2049 buf = list_entry(q->active.next,
2050 struct cx88_buffer, vb.queue);
2051 if (buf->count > count)
2052 break;
2053 do_gettimeofday(&buf->vb.ts);
2054 dprintk(2,"[%p/%d] wakeup reg=%d buf=%d\n",buf,buf->vb.i,
2055 count, buf->count);
2056 buf->vb.state = STATE_DONE;
2057 list_del(&buf->vb.queue);
2058 wake_up(&buf->vb.done);
2059 }
2060 if (list_empty(&q->active)) {
2061 del_timer(&q->timeout);
2062 } else {
2063 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
2064 }
2065 }
2066
2067 static void cx8800_vid_irq(struct cx8800_dev *dev)
2068 {
2069 u32 status, mask, count;
2070
2071 status = cx_read(MO_VID_INTSTAT);
2072 mask = cx_read(MO_VID_INTMSK);
2073 if (0 == (status & mask))
2074 return;
2075 cx_write(MO_VID_INTSTAT, status);
2076 if (irq_debug || (status & mask & ~0xff))
2077 cx88_print_irqbits(dev->name, "irq vid",
2078 cx88_vid_irqs, status, mask);
2079
2080 /* risc op code error */
2081 if (status & (1 << 16)) {
2082 printk(KERN_WARNING "%s: video risc op code error\n",dev->name);
2083 cx_clear(MO_VID_DMACNTRL, 0x11);
2084 cx_clear(VID_CAPTURE_CONTROL, 0x06);
2085 cx88_sram_channel_dump(dev, &cx88_sram_channels[SRAM_CH21]);
2086 }
2087
2088 /* risc1 y */
2089 if (status & 0x01) {
2090 spin_lock(&dev->slock);
2091 count = cx_read(MO_VIDY_GPCNT);
2092 cx8800_wakeup(dev, &dev->vidq, count);
2093 spin_unlock(&dev->slock);
2094 }
2095
2096 /* risc1 vbi */
2097 if (status & 0x08) {
2098 spin_lock(&dev->slock);
2099 count = cx_read(MO_VBI_GPCNT);
2100 cx8800_wakeup(dev, &dev->vbiq, count);
2101 spin_unlock(&dev->slock);
2102 }
2103
2104 /* risc2 y */
2105 if (status & 0x10) {
2106 dprintk(2,"stopper video\n");
2107 spin_lock(&dev->slock);
2108 restart_video_queue(dev,&dev->vidq);
2109 spin_unlock(&dev->slock);
2110 }
2111
2112 /* risc2 vbi */
2113 if (status & 0x80) {
2114 dprintk(2,"stopper vbi\n");
2115 spin_lock(&dev->slock);
2116 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2117 spin_unlock(&dev->slock);
2118 }
2119 }
2120
2121 static irqreturn_t cx8800_irq(int irq, void *dev_id, struct pt_regs *regs)
2122 {
2123 struct cx8800_dev *dev = dev_id;
2124 u32 status, mask;
2125 int loop, handled = 0;
2126
2127 for (loop = 0; loop < 10; loop++) {
2128 status = cx_read(MO_PCI_INTSTAT);
2129 mask = cx_read(MO_PCI_INTMSK);
2130 if (0 == (status & mask))
2131 goto out;
2132 handled = 1;
2133 cx_write(MO_PCI_INTSTAT, status);
2134 if (irq_debug || (status & mask & ~0x1f))
2135 cx88_print_irqbits(dev->name, "irq pci",
2136 cx88_pci_irqs, status, mask);
2137
2138 if (status & 1)
2139 cx8800_vid_irq(dev);
2140 };
2141 if (10 == loop) {
2142 printk(KERN_WARNING "%s: irq loop -- clearing mask\n",
2143 dev->name);
2144 cx_write(MO_PCI_INTMSK,0);
2145 }
2146
2147 out:
2148 return IRQ_RETVAL(handled);
2149 }
2150
2151 /* ----------------------------------------------------------- */
2152 /* exported stuff */
2153
2154 static struct file_operations video_fops =
2155 {
2156 .owner = THIS_MODULE,
2157 .open = video_open,
2158 .release = video_release,
2159 .read = video_read,
2160 .poll = video_poll,
2161 .mmap = video_mmap,
2162 .ioctl = video_ioctl,
2163 .llseek = no_llseek,
2164 };
2165
2166 struct video_device cx8800_video_template =
2167 {
2168 .name = "cx8800-video",
2169 .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES,
2170 .hardware = 0,
2171 .fops = &video_fops,
2172 .minor = -1,
2173 };
2174
2175 struct video_device cx8800_vbi_template =
2176 {
2177 .name = "cx8800-vbi",
2178 .type = VID_TYPE_TELETEXT|VID_TYPE_TUNER,
2179 .hardware = 0,
2180 .fops = &video_fops,
2181 .minor = -1,
2182 };
2183
2184 static struct file_operations radio_fops =
2185 {
2186 .owner = THIS_MODULE,
2187 .open = video_open,
2188 .release = video_release,
2189 .ioctl = radio_ioctl,
2190 .llseek = no_llseek,
2191 };
2192
2193 struct video_device cx8800_radio_template =
2194 {
2195 .name = "cx8800-radio",
2196 .type = VID_TYPE_TUNER,
2197 .hardware = 0,
2198 .fops = &radio_fops,
2199 .minor = -1,
2200 };
2201
2202 /* ----------------------------------------------------------- */
2203
2204 static void cx8800_shutdown(struct cx8800_dev *dev)
2205 {
2206 /* disable RISC controller + IRQs */
2207 cx_write(MO_DEV_CNTRL2, 0);
2208
2209 /* stop dma transfers */
2210 cx_write(MO_VID_DMACNTRL, 0x0);
2211 cx_write(MO_AUD_DMACNTRL, 0x0);
2212 cx_write(MO_TS_DMACNTRL, 0x0);
2213 cx_write(MO_VIP_DMACNTRL, 0x0);
2214 cx_write(MO_GPHST_DMACNTRL, 0x0);
2215
2216 /* stop interupts */
2217 cx_write(MO_PCI_INTMSK, 0x0);
2218 cx_write(MO_VID_INTMSK, 0x0);
2219 cx_write(MO_AUD_INTMSK, 0x0);
2220 cx_write(MO_TS_INTMSK, 0x0);
2221 cx_write(MO_VIP_INTMSK, 0x0);
2222 cx_write(MO_GPHST_INTMSK, 0x0);
2223
2224 /* stop capturing */
2225 cx_write(VID_CAPTURE_CONTROL, 0);
2226 }
2227
2228 static int cx8800_reset(struct cx8800_dev *dev)
2229 {
2230 dprintk(1,"cx8800_reset\n");
2231
2232 cx8800_shutdown(dev);
2233
2234 /* clear irq status */
2235 cx_write(MO_VID_INTSTAT, 0xFFFFFFFF); // Clear PIV int
2236 cx_write(MO_PCI_INTSTAT, 0xFFFFFFFF); // Clear PCI int
2237 cx_write(MO_INT1_STAT, 0xFFFFFFFF); // Clear RISC int
2238
2239 /* wait a bit */
2240 set_current_state(TASK_INTERRUPTIBLE);
2241 schedule_timeout(HZ/10);
2242
2243 /* init sram */
2244 cx88_sram_channel_setup(dev, &cx88_sram_channels[SRAM_CH21], 720*4, 0);
2245 cx88_sram_channel_setup(dev, &cx88_sram_channels[SRAM_CH22], 128, 0);
2246 cx88_sram_channel_setup(dev, &cx88_sram_channels[SRAM_CH23], 128, 0);
2247 cx88_sram_channel_setup(dev, &cx88_sram_channels[SRAM_CH24], 128, 0);
2248 cx88_sram_channel_setup(dev, &cx88_sram_channels[SRAM_CH25], 128, 0);
2249 cx88_sram_channel_setup(dev, &cx88_sram_channels[SRAM_CH26], 128, 0);
2250
2251 /* misc init ... */
2252 cx_write(MO_INPUT_FORMAT, ((1 << 13) | // agc enable
2253 (1 << 12) | // agc gain
2254 (1 << 11) | // adaptibe agc
2255 (0 << 10) | // chroma agc
2256 (0 << 9) | // ckillen
2257 (7)));
2258
2259 /* setup image format */
2260 cx_andor(MO_COLOR_CTRL, 0x4000, 0x4000);
2261
2262 /* setup FIFO Threshholds */
2263 cx_write(MO_PDMA_STHRSH, 0x0807);
2264 cx_write(MO_PDMA_DTHRSH, 0x0807);
2265
2266 /* fixes flashing of image */
2267 cx_write(MO_AGC_SYNC_TIP1, 0x0380000F);
2268 cx_write(MO_AGC_BACK_VBI, 0x00E00555);
2269
2270 cx_write(MO_VID_INTSTAT, 0xFFFFFFFF); // Clear PIV int
2271 cx_write(MO_PCI_INTSTAT, 0xFFFFFFFF); // Clear PCI int
2272 cx_write(MO_INT1_STAT, 0xFFFFFFFF); // Clear RISC int
2273
2274 return 0;
2275 }
2276
2277 static struct video_device *vdev_init(struct cx8800_dev *dev,
2278 struct video_device *template,
2279 char *type)
2280 {
2281 struct video_device *vfd;
2282
2283 vfd = video_device_alloc();
2284 if (NULL == vfd)
2285 return NULL;
2286 *vfd = *template;
2287 vfd->minor = -1;
2288 vfd->dev = &dev->pci->dev;
2289 vfd->release = video_device_release;
2290 snprintf(vfd->name, sizeof(vfd->name), "%s %s (%s)",
2291 dev->name, type, cx88_boards[dev->board].name);
2292 return vfd;
2293 }
2294
2295 static void cx8800_unregister_video(struct cx8800_dev *dev)
2296 {
2297 if (dev->radio_dev) {
2298 if (-1 != dev->radio_dev->minor)
2299 video_unregister_device(dev->radio_dev);
2300 else
2301 video_device_release(dev->radio_dev);
2302 dev->radio_dev = NULL;
2303 }
2304 if (dev->vbi_dev) {
2305 if (-1 != dev->vbi_dev->minor)
2306 video_unregister_device(dev->vbi_dev);
2307 else
2308 video_device_release(dev->vbi_dev);
2309 dev->vbi_dev = NULL;
2310 }
2311 if (dev->video_dev) {
2312 if (-1 != dev->video_dev->minor)
2313 video_unregister_device(dev->video_dev);
2314 else
2315 video_device_release(dev->video_dev);
2316 dev->video_dev = NULL;
2317 }
2318 }
2319
2320 static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
2321 const struct pci_device_id *pci_id)
2322 {
2323 struct cx8800_dev *dev;
2324 unsigned int i;
2325 int err;
2326
2327 dev = kmalloc(sizeof(*dev),GFP_KERNEL);
2328 if (NULL == dev)
2329 return -ENOMEM;
2330 memset(dev,0,sizeof(*dev));
2331
2332 /* pci init */
2333 dev->pci = pci_dev;
2334 if (pci_enable_device(pci_dev)) {
2335 err = -EIO;
2336 goto fail1;
2337 }
2338 sprintf(dev->name,"cx%x[%d]",pci_dev->device,cx8800_devcount);
2339
2340 /* pci quirks */
2341 cx88_pci_quirks(dev->name, dev->pci, &latency);
2342 if (UNSET != latency) {
2343 printk(KERN_INFO "%s: setting pci latency timer to %d\n",
2344 dev->name,latency);
2345 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
2346 }
2347
2348 /* print pci info */
2349 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
2350 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
2351 printk(KERN_INFO "%s: found at %s, rev: %d, irq: %d, "
2352 "latency: %d, mmio: 0x%lx\n", dev->name,
2353 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
2354 dev->pci_lat,pci_resource_start(pci_dev,0));
2355
2356 pci_set_master(pci_dev);
2357 if (!pci_dma_supported(pci_dev,0xffffffff)) {
2358 printk("%s: Oops: no 32bit PCI DMA ???\n",dev->name);
2359 err = -EIO;
2360 goto fail1;
2361 }
2362
2363 /* board config */
2364 dev->board = card[cx8800_devcount];
2365 for (i = 0; UNSET == dev->board && i < cx88_idcount; i++)
2366 if (pci_dev->subsystem_vendor == cx88_subids[i].subvendor &&
2367 pci_dev->subsystem_device == cx88_subids[i].subdevice)
2368 dev->board = cx88_subids[i].card;
2369 if (UNSET == dev->board) {
2370 dev->board = CX88_BOARD_UNKNOWN;
2371 cx88_card_list(dev);
2372 }
2373 printk(KERN_INFO "%s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
2374 dev->name,pci_dev->subsystem_vendor,
2375 pci_dev->subsystem_device,cx88_boards[dev->board].name,
2376 dev->board, card[cx8800_devcount] == dev->board ?
2377 "insmod option" : "autodetected");
2378
2379 dev->tuner_type = tuner[cx8800_devcount];
2380 if (UNSET == dev->tuner_type)
2381 dev->tuner_type = cx88_boards[dev->board].tuner_type;
2382
2383 /* get mmio */
2384 if (!request_mem_region(pci_resource_start(pci_dev,0),
2385 pci_resource_len(pci_dev,0),
2386 dev->name)) {
2387 err = -EBUSY;
2388 printk(KERN_ERR "%s: can't get MMIO memory @ 0x%lx\n",
2389 dev->name,pci_resource_start(pci_dev,0));
2390 goto fail1;
2391 }
2392 dev->lmmio = ioremap(pci_resource_start(pci_dev,0),
2393 pci_resource_len(pci_dev,0));
2394 dev->bmmio = (u8*)dev->lmmio;
2395
2396 /* initialize driver struct */
2397 init_MUTEX(&dev->lock);
2398 dev->slock = SPIN_LOCK_UNLOCKED;
2399 dev->tvnorm = tvnorms;
2400
2401 /* init video dma queues */
2402 INIT_LIST_HEAD(&dev->vidq.active);
2403 INIT_LIST_HEAD(&dev->vidq.queued);
2404 dev->vidq.timeout.function = cx8800_vid_timeout;
2405 dev->vidq.timeout.data = (unsigned long)dev;
2406 init_timer(&dev->vidq.timeout);
2407 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
2408 MO_VID_DMACNTRL,0x11,0x00);
2409
2410 /* init vbi dma queues */
2411 INIT_LIST_HEAD(&dev->vbiq.active);
2412 INIT_LIST_HEAD(&dev->vbiq.queued);
2413 dev->vbiq.timeout.function = cx8800_vbi_timeout;
2414 dev->vbiq.timeout.data = (unsigned long)dev;
2415 init_timer(&dev->vbiq.timeout);
2416 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
2417 MO_VID_DMACNTRL,0x88,0x00);
2418
2419 /* initialize hardware */
2420 cx8800_reset(dev);
2421
2422 /* get irq */
2423 err = request_irq(pci_dev->irq, cx8800_irq,
2424 SA_SHIRQ | SA_INTERRUPT, dev->name, dev);
2425 if (err < 0) {
2426 printk(KERN_ERR "%s: can't get IRQ %d\n",
2427 dev->name,pci_dev->irq);
2428 goto fail2;
2429 }
2430
2431 /* register i2c bus + load i2c helpers */
2432 cx8800_i2c_init(dev);
2433 cx88_card_setup(dev);
2434
2435 /* load and configure helper modules */
2436 if (TUNER_ABSENT != dev->tuner_type)
2437 request_module("tuner");
2438 if (cx88_boards[dev->board].needs_tda9887)
2439 request_module("tda9887");
2440 if (dev->tuner_type != UNSET)
2441 cx8800_call_i2c_clients(dev,TUNER_SET_TYPE,&dev->tuner_type);
2442
2443 /* register v4l devices */
2444 dev->video_dev = vdev_init(dev,&cx8800_video_template,"video");
2445 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
2446 video_nr[cx8800_devcount]);
2447 if (err < 0) {
2448 printk(KERN_INFO "%s: can't register video device\n",
2449 dev->name);
2450 goto fail3;
2451 }
2452 printk(KERN_INFO "%s: registered device video%d [v4l2]\n",
2453 dev->name,dev->video_dev->minor & 0x1f);
2454
2455 dev->vbi_dev = vdev_init(dev,&cx8800_vbi_template,"vbi");
2456 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
2457 vbi_nr[cx8800_devcount]);
2458 if (err < 0) {
2459 printk(KERN_INFO "%s: can't register vbi device\n",
2460 dev->name);
2461 goto fail3;
2462 }
2463 printk(KERN_INFO "%s: registered device vbi%d\n",
2464 dev->name,dev->vbi_dev->minor & 0x1f);
2465
2466 if (dev->has_radio) {
2467 dev->radio_dev = vdev_init(dev,&cx8800_radio_template,"radio");
2468 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
2469 radio_nr[cx8800_devcount]);
2470 if (err < 0) {
2471 printk(KERN_INFO "%s: can't register radio device\n",
2472 dev->name);
2473 goto fail3;
2474 }
2475 printk(KERN_INFO "%s: registered device radio%d\n",
2476 dev->name,dev->radio_dev->minor & 0x1f);
2477 }
2478
2479 /* everything worked */
2480 list_add_tail(&dev->devlist,&cx8800_devlist);
2481 pci_set_drvdata(pci_dev,dev);
2482 cx8800_devcount++;
2483
2484 /* initial device configuration */
2485 down(&dev->lock);
2486 init_controls(dev);
2487 set_tvnorm(dev,tvnorms);
2488 video_mux(dev,0);
2489 up(&dev->lock);
2490
2491 /* start tvaudio thread */
2492 init_completion(&dev->texit);
2493 dev->tpid = kernel_thread(cx88_audio_thread, dev, 0);
2494 return 0;
2495
2496 fail3:
2497 cx8800_unregister_video(dev);
2498 if (0 == dev->i2c_rc)
2499 i2c_bit_del_bus(&dev->i2c_adap);
2500 free_irq(pci_dev->irq, dev);
2501 fail2:
2502 release_mem_region(pci_resource_start(pci_dev,0),
2503 pci_resource_len(pci_dev,0));
2504 fail1:
2505 kfree(dev);
2506 return err;
2507 }
2508
2509 static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
2510 {
2511 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
2512
2513 /* stop thread */
2514 dev->shutdown = 1;
2515 if (dev->tpid >= 0)
2516 wait_for_completion(&dev->texit);
2517
2518 cx8800_shutdown(dev);
2519 pci_disable_device(pci_dev);
2520
2521 /* unregister stuff */
2522 if (0 == dev->i2c_rc)
2523 i2c_bit_del_bus(&dev->i2c_adap);
2524
2525 free_irq(pci_dev->irq, dev);
2526 release_mem_region(pci_resource_start(pci_dev,0),
2527 pci_resource_len(pci_dev,0));
2528
2529 cx8800_unregister_video(dev);
2530 pci_set_drvdata(pci_dev, NULL);
2531
2532 /* free memory */
2533 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
2534 list_del(&dev->devlist);
2535 cx8800_devcount--;
2536 kfree(dev);
2537 }
2538
2539 static int cx8800_suspend(struct pci_dev *pci_dev, u32 state)
2540 {
2541 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
2542
2543 printk("%s: suspend %d\n", dev->name, state);
2544
2545 cx8800_shutdown(dev);
2546 del_timer(&dev->vidq.timeout);
2547
2548 pci_save_state(pci_dev, dev->state.pci_cfg);
2549 if (0 != pci_set_power_state(pci_dev, state)) {
2550 pci_disable_device(pci_dev);
2551 dev->state.disabled = 1;
2552 }
2553 return 0;
2554 }
2555
2556 static int cx8800_resume(struct pci_dev *pci_dev)
2557 {
2558 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
2559
2560 printk("%s: resume\n", dev->name);
2561
2562 if (dev->state.disabled) {
2563 pci_enable_device(pci_dev);
2564 dev->state.disabled = 0;
2565 }
2566 pci_set_power_state(pci_dev, 0);
2567 pci_restore_state(pci_dev, dev->state.pci_cfg);
2568
2569 /* re-initialize hardware */
2570 cx8800_reset(dev);
2571
2572 /* restart video capture */
2573 spin_lock(&dev->slock);
2574 restart_video_queue(dev,&dev->vidq);
2575 spin_unlock(&dev->slock);
2576
2577 return 0;
2578 }
2579
2580 /* ----------------------------------------------------------- */
2581
2582 struct pci_device_id cx8800_pci_tbl[] = {
2583 {
2584 .vendor = 0x14f1,
2585 .device = 0x8800,
2586 .subvendor = PCI_ANY_ID,
2587 .subdevice = PCI_ANY_ID,
2588 },{
2589 /* --- end of list --- */
2590 }
2591 };
2592 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2593
2594 static struct pci_driver cx8800_pci_driver = {
2595 .name = "cx8800",
2596 .id_table = cx8800_pci_tbl,
2597 .probe = cx8800_initdev,
2598 .remove = cx8800_finidev,
2599
2600 .suspend = cx8800_suspend,
2601 .resume = cx8800_resume,
2602 };
2603
2604 static int cx8800_init(void)
2605 {
2606 INIT_LIST_HEAD(&cx8800_devlist);
2607 printk(KERN_INFO "cx2388x v4l2 driver version %d.%d.%d loaded\n",
2608 (CX88_VERSION_CODE >> 16) & 0xff,
2609 (CX88_VERSION_CODE >> 8) & 0xff,
2610 CX88_VERSION_CODE & 0xff);
2611 #ifdef SNAPSHOT
2612 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2613 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2614 #endif
2615 return pci_module_init(&cx8800_pci_driver);
2616 }
2617
2618 static void cx8800_fini(void)
2619 {
2620 pci_unregister_driver(&cx8800_pci_driver);
2621 }
2622
2623 module_init(cx8800_init);
2624 module_exit(cx8800_fini);
2625
2626 /* ----------------------------------------------------------- */
2627 /*
2628 * Local variables:
2629 * c-basic-offset: 8
2630 * End:
2631 */
MOXA 2.6.9 from sdlinux-moxaart.tgz