drivers/char/agp/agp.h

   1 /*
   2  * AGPGART
   3  * Copyright (C) 2002-2004 Dave Jones
   4  * Copyright (C) 1999 Jeff Hartmann
   5  * Copyright (C) 1999 Precision Insight, Inc.
   6  * Copyright (C) 1999 Xi Graphics, Inc.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included
  16  * in all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  21  * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  24  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #ifndef _AGP_BACKEND_PRIV_H
  29 #define _AGP_BACKEND_PRIV_H 1
  30
  31 #include <asm/agp.h>    /* for flush_agp_cache() */
  32
  33 #define PFX "agpgart: "
  34
  35 //#define AGP_DEBUG 1
  36 #ifdef AGP_DEBUG
  37 #define DBG(x,y...) printk (KERN_DEBUG PFX "%s: " x "\n", __FUNCTION__ , ## y)
  38 #else
  39 #define DBG(x,y...) do { } while (0)
  40 #endif
  41
  42 extern struct agp_bridge_data *agp_bridge;
  43
  44 enum aper_size_type {
  45         U8_APER_SIZE,
  46         U16_APER_SIZE,
  47         U32_APER_SIZE,
  48         LVL2_APER_SIZE,
  49         FIXED_APER_SIZE
  50 };
  51
  52 struct gatt_mask {
  53         unsigned long mask;
  54         u32 type;
  55         /* totally device specific, for integrated chipsets that
  56          * might have different types of memory masks.  For other
  57          * devices this will probably be ignored */
  58 };
  59
  60 struct aper_size_info_8 {
  61         int size;
  62         int num_entries;
  63         int page_order;
  64         u8 size_value;
  65 };
  66
  67 struct aper_size_info_16 {
  68         int size;
  69         int num_entries;
  70         int page_order;
  71         u16 size_value;
  72 };
  73
  74 struct aper_size_info_32 {
  75         int size;
  76         int num_entries;
  77         int page_order;
  78         u32 size_value;
  79 };
  80
  81 struct aper_size_info_lvl2 {
  82         int size;
  83         int num_entries;
  84         u32 size_value;
  85 };
  86
  87 struct aper_size_info_fixed {
  88         int size;
  89         int num_entries;
  90         int page_order;
  91 };
  92
  93 struct agp_bridge_driver {
  94         struct module *owner;
  95         void *aperture_sizes;
  96         int num_aperture_sizes;
  97         enum aper_size_type size_type;
  98         int cant_use_aperture;
  99         int needs_scratch_page;
 100         struct gatt_mask *masks;
 101         int (*fetch_size)(void);
 102         int (*configure)(void);
 103         void (*agp_enable)(u32);
 104         void (*cleanup)(void);
 105         void (*tlb_flush)(struct agp_memory *);
 106         unsigned long (*mask_memory)(unsigned long, int);
 107         void (*cache_flush)(void);
 108         int (*create_gatt_table)(void);
 109         int (*free_gatt_table)(void);
 110         int (*insert_memory)(struct agp_memory *, off_t, int);
 111         int (*remove_memory)(struct agp_memory *, off_t, int);
 112         struct agp_memory *(*alloc_by_type) (size_t, int);
 113         void (*free_by_type)(struct agp_memory *);
 114         void *(*agp_alloc_page)(void);
 115         void (*agp_destroy_page)(void *);
 116 };
 117
 118 struct agp_bridge_data {
 119         struct agp_version *version;
 120         struct agp_bridge_driver *driver;
 121         struct vm_operations_struct *vm_ops;
 122         void *previous_size;
 123         void *current_size;
 124         void *dev_private_data;
 125         struct pci_dev *dev;
 126         u32 __iomem *gatt_table;
 127         u32 *gatt_table_real;
 128         unsigned long scratch_page;
 129         unsigned long scratch_page_real;
 130         unsigned long gart_bus_addr;
 131         unsigned long gatt_bus_addr;
 132         u32 mode;
 133         enum chipset_type type;
 134         unsigned long *key_list;
 135         atomic_t current_memory_agp;
 136         atomic_t agp_in_use;
 137         int max_memory_agp;     /* in number of pages */
 138         int aperture_size_idx;
 139         int capndx;
 140         char major_version;
 141         char minor_version;
 142 };
 143
 144 #define OUTREG64(mmap, addr, val)       __raw_writeq((val), (mmap)+(addr))
 145 #define OUTREG32(mmap, addr, val)       __raw_writel((val), (mmap)+(addr))
 146 #define OUTREG16(mmap, addr, val)       __raw_writew((val), (mmap)+(addr))
 147 #define OUTREG8(mmap, addr, val)        __raw_writeb((val), (mmap)+(addr))
 148
 149 #define INREG64(mmap, addr)             __raw_readq((mmap)+(addr))
 150 #define INREG32(mmap, addr)             __raw_readl((mmap)+(addr))
 151 #define INREG16(mmap, addr)             __raw_readw((mmap)+(addr))
 152 #define INREG8(mmap, addr)              __raw_readb((mmap)+(addr))
 153
 154 #define KB(x)   ((x) * 1024)
 155 #define MB(x)   (KB (KB (x)))
 156 #define GB(x)   (MB (KB (x)))
 157
 158 #define A_SIZE_8(x)     ((struct aper_size_info_8 *) x)
 159 #define A_SIZE_16(x)    ((struct aper_size_info_16 *) x)
 160 #define A_SIZE_32(x)    ((struct aper_size_info_32 *) x)
 161 #define A_SIZE_LVL2(x)  ((struct aper_size_info_lvl2 *) x)
 162 #define A_SIZE_FIX(x)   ((struct aper_size_info_fixed *) x)
 163 #define A_IDX8(bridge)  (A_SIZE_8((bridge)->driver->aperture_sizes) + i)
 164 #define A_IDX16(bridge) (A_SIZE_16((bridge)->driver->aperture_sizes) + i)
 165 #define A_IDX32(bridge) (A_SIZE_32((bridge)->driver->aperture_sizes) + i)
 166 #define MAXKEY          (4096 * 32)
 167
 168 #define PGE_EMPTY(b, p) (!(p) || (p) == (unsigned long) (b)->scratch_page)
 169
 170
 171 /* Intel registers */
 172 #define INTEL_APSIZE    0xb4
 173 #define INTEL_ATTBASE   0xb8
 174 #define INTEL_AGPCTRL   0xb0
 175 #define INTEL_NBXCFG    0x50
 176 #define INTEL_ERRSTS    0x91
 177
 178 /* Intel i830 registers */
 179 #define I830_GMCH_CTRL                  0x52
 180 #define I830_GMCH_ENABLED               0x4
 181 #define I830_GMCH_MEM_MASK              0x1
 182 #define I830_GMCH_MEM_64M               0x1
 183 #define I830_GMCH_MEM_128M              0
 184 #define I830_GMCH_GMS_MASK              0x70
 185 #define I830_GMCH_GMS_DISABLED          0x00
 186 #define I830_GMCH_GMS_LOCAL             0x10
 187 #define I830_GMCH_GMS_STOLEN_512        0x20
 188 #define I830_GMCH_GMS_STOLEN_1024       0x30
 189 #define I830_GMCH_GMS_STOLEN_8192       0x40
 190 #define I830_RDRAM_CHANNEL_TYPE         0x03010
 191 #define I830_RDRAM_ND(x)                (((x) & 0x20) >> 5)
 192 #define I830_RDRAM_DDT(x)               (((x) & 0x18) >> 3)
 193
 194 /* This one is for I830MP w. an external graphic card */
 195 #define INTEL_I830_ERRSTS       0x92
 196
 197 /* Intel 855GM/852GM registers */
 198 #define I855_GMCH_GMS_STOLEN_0M         0x0
 199 #define I855_GMCH_GMS_STOLEN_1M         (0x1 << 4)
 200 #define I855_GMCH_GMS_STOLEN_4M         (0x2 << 4)
 201 #define I855_GMCH_GMS_STOLEN_8M         (0x3 << 4)
 202 #define I855_GMCH_GMS_STOLEN_16M        (0x4 << 4)
 203 #define I855_GMCH_GMS_STOLEN_32M        (0x5 << 4)
 204 #define I85X_CAPID                      0x44
 205 #define I85X_VARIANT_MASK               0x7
 206 #define I85X_VARIANT_SHIFT              5
 207 #define I855_GME                        0x0
 208 #define I855_GM                         0x4
 209 #define I852_GME                        0x2
 210 #define I852_GM                         0x5
 211
 212 /* Intel i845 registers */
 213 #define INTEL_I845_AGPM         0x51
 214 #define INTEL_I845_ERRSTS       0xc8
 215
 216 /* Intel i860 registers */
 217 #define INTEL_I860_MCHCFG       0x50
 218 #define INTEL_I860_ERRSTS       0xc8
 219
 220 /* Intel i810 registers */
 221 #define I810_GMADDR             0x10
 222 #define I810_MMADDR             0x14
 223 #define I810_PTE_BASE           0x10000
 224 #define I810_PTE_MAIN_UNCACHED  0x00000000
 225 #define I810_PTE_LOCAL          0x00000002
 226 #define I810_PTE_VALID          0x00000001
 227 #define I810_SMRAM_MISCC        0x70
 228 #define I810_GFX_MEM_WIN_SIZE   0x00010000
 229 #define I810_GFX_MEM_WIN_32M    0x00010000
 230 #define I810_GMS                0x000000c0
 231 #define I810_GMS_DISABLE        0x00000000
 232 #define I810_PGETBL_CTL         0x2020
 233 #define I810_PGETBL_ENABLED     0x00000001
 234 #define I810_DRAM_CTL           0x3000
 235 #define I810_DRAM_ROW_0         0x00000001
 236 #define I810_DRAM_ROW_0_SDRAM   0x00000001
 237
 238 struct agp_device_ids {
 239         unsigned short device_id; /* first, to make table easier to read */
 240         enum chipset_type chipset;
 241         const char *chipset_name;
 242         int (*chipset_setup) (struct pci_dev *pdev);    /* used to override generic */
 243 };
 244
 245 /* Driver registration */
 246 struct agp_bridge_data *agp_alloc_bridge(void);
 247 void agp_put_bridge(struct agp_bridge_data *bridge);
 248 int agp_add_bridge(struct agp_bridge_data *bridge);
 249 void agp_remove_bridge(struct agp_bridge_data *bridge);
 250
 251 /* Frontend routines. */
 252 int agp_frontend_initialize(void);
 253 void agp_frontend_cleanup(void);
 254
 255 /* Generic routines. */
 256 void agp_generic_enable(u32 mode);
 257 int agp_generic_create_gatt_table(void);
 258 int agp_generic_free_gatt_table(void);
 259 struct agp_memory *agp_create_memory(int scratch_pages);
 260 int agp_generic_insert_memory(struct agp_memory *mem, off_t pg_start, int type);
 261 int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type);
 262 struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type);
 263 void agp_generic_free_by_type(struct agp_memory *curr);
 264 void *agp_generic_alloc_page(void);
 265 void agp_generic_destroy_page(void *addr);
 266 void agp_free_key(int key);
 267 int agp_num_entries(void);
 268 u32 agp_collect_device_status(u32 mode, u32 command);
 269 void agp_device_command(u32 command, int agp_v3);
 270 int agp_3_5_enable(struct agp_bridge_data *bridge);
 271 void global_cache_flush(void);
 272 void get_agp_version(struct agp_bridge_data *bridge);
 273 unsigned long agp_generic_mask_memory(unsigned long addr, int type);
 274
 275 /* generic routines for agp>=3 */
 276 int agp3_generic_fetch_size(void);
 277 void agp3_generic_tlbflush(struct agp_memory *mem);
 278 int agp3_generic_configure(void);
 279 void agp3_generic_cleanup(void);
 280
 281 /* aperture sizes have been standardised since v3 */
 282 #define AGP_GENERIC_SIZES_ENTRIES 11
 283 extern struct aper_size_info_16 agp3_generic_sizes[];
 284
 285
 286 extern int agp_off;
 287 extern int agp_try_unsupported_boot;
 288
 289 /* Chipset independant registers (from AGP Spec) */
 290 #define AGP_APBASE      0x10
 291
 292 #define AGPSTAT         0x4
 293 #define AGPCMD          0x8
 294 #define AGPNISTAT       0xc
 295 #define AGPCTRL         0x10
 296 #define AGPAPSIZE       0x14
 297 #define AGPNEPG         0x16
 298 #define AGPGARTLO       0x18
 299 #define AGPGARTHI       0x1c
 300 #define AGPNICMD        0x20
 301
 302 #define AGP_MAJOR_VERSION_SHIFT (20)
 303 #define AGP_MINOR_VERSION_SHIFT (16)
 304
 305 #define AGPSTAT_RQ_DEPTH        (0xff000000)
 306 #define AGPSTAT_RQ_DEPTH_SHIFT  24
 307
 308 #define AGPSTAT_CAL_MASK        (1<<12|1<<11|1<<10)
 309 #define AGPSTAT_ARQSZ           (1<<15|1<<14|1<<13)
 310 #define AGPSTAT_ARQSZ_SHIFT     13
 311
 312 #define AGPSTAT_SBA             (1<<9)
 313 #define AGPSTAT_AGP_ENABLE      (1<<8)
 314 #define AGPSTAT_FW              (1<<4)
 315 #define AGPSTAT_MODE_3_0        (1<<3)
 316
 317 #define AGPSTAT2_1X             (1<<0)
 318 #define AGPSTAT2_2X             (1<<1)
 319 #define AGPSTAT2_4X             (1<<2)
 320
 321 #define AGPSTAT3_RSVD           (1<<2)
 322 #define AGPSTAT3_8X             (1<<1)
 323 #define AGPSTAT3_4X             (1)
 324
 325 #define AGPCTRL_APERENB         (1<<8)
 326 #define AGPCTRL_GTLBEN          (1<<7)
 327
 328 #endif  /* _AGP_BACKEND_PRIV_H */