2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
6 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Hartmut Penner (hp@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/config.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/offsets.h>
21 #include <asm/unistd.h>
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53 STACK_SIZE = 1 << STACK_SHIFT
55 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
56 _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
57 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED)
59 #define BASED(name) name-system_call(%r13)
62 * Register usage in interrupt handlers:
63 * R9 - pointer to current task structure
64 * R13 - pointer to literal pool
65 * R14 - return register for function calls
66 * R15 - kernel stack pointer
69 .macro SAVE_ALL_BASE savearea
70 stmg %r12,%r15,\savearea
74 .macro SAVE_ALL psworg,savearea,sync
77 tm \psworg+1,0x01 # test problem state bit
78 jz 2f # skip stack setup save
79 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
81 tm \psworg+1,0x01 # test problem state bit
82 jnz 1f # from user -> load kernel stack
83 clc \psworg+8(8),BASED(.Lcritical_end)
85 clc \psworg+8(8),BASED(.Lcritical_start)
87 brasl %r14,cleanup_critical
88 tm 0(%r12),0x01 # retest problem state after cleanup
90 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
92 srag %r14,%r14,STACK_SHIFT
94 1: lg %r15,__LC_ASYNC_STACK # load async stack
96 #ifdef CONFIG_CHECK_STACK
98 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
102 2: aghi %r15,-SP_SIZE # make room for registers & psw
103 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
105 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
106 icm %r12,12,__LC_SVC_ILC
107 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
109 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
111 stg %r12,__SF_BACKCHAIN(%r15)
114 .macro RESTORE_ALL sync
115 mvc __LC_RETURN_PSW(16),SP_PSW(%r15) # move user PSW to lowcore
117 ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
119 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
120 lpswe __LC_RETURN_PSW # back to caller
124 * Scheduler resume function, called by switch_to
125 * gpr2 = (task_struct *) prev
126 * gpr3 = (task_struct *) next
132 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
133 jz __switch_to_noper # if not we're fine
134 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
135 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
136 je __switch_to_noper # we got away without bashing TLB's
137 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
139 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
140 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
141 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
142 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
143 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
144 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
145 stg %r3,__LC_THREAD_INFO
147 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
152 * SVC interrupt handler routine. System calls are synchronous events and
153 * are executed with interrupts enabled.
158 SAVE_ALL_BASE __LC_SAVE_AREA
159 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
160 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
162 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
163 slag %r7,%r7,2 # *4 and test for svc 0
165 # svc 0: system call number in %r1
166 cl %r1,BASED(.Lnr_syscalls)
168 lgfr %r7,%r1 # clear high word in r1
169 slag %r7,%r7,2 # svc 0: system call number in %r1
171 mvc SP_ARGS(8,%r15),SP_R7(%r15)
173 larl %r10,sys_call_table
174 #ifdef CONFIG_S390_SUPPORT
175 tm SP_PSW+3(%r15),0x01 # are we running in 31 bit mode ?
177 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
180 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
181 lgf %r8,0(%r7,%r10) # load address of system call routine
183 basr %r14,%r8 # call sys_xxxx
184 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
185 # ATTENTION: check sys_execve_glue before
186 # changing anything here !!
189 tm SP_PSW+1(%r15),0x01 # returning to user ?
191 tm __TI_flags+7(%r9),_TIF_WORK_SVC
192 jnz sysc_work # there is work to do (signals etc.)
197 # recheck if there is more work to do
200 tm __TI_flags+7(%r9),_TIF_WORK_SVC
201 jz sysc_leave # there is no work to do
203 # One of the work bits is on. Find out which one.
206 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
208 tm __TI_flags+7(%r9),_TIF_SIGPENDING
210 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
212 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
217 # _TIF_NEED_RESCHED is set, call schedule
220 larl %r14,sysc_work_loop
221 jg schedule # return point is sysc_return
224 # _TIF_SIGPENDING is set, call do_signal
227 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
228 la %r2,SP_PTREGS(%r15) # load pt_regs
229 sgr %r3,%r3 # clear *oldset
230 brasl %r14,do_signal # call do_signal
231 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
233 j sysc_leave # out of here, do NOT recheck
236 # _TIF_RESTART_SVC is set, set up registers and restart svc
239 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
240 lg %r7,SP_R2(%r15) # load new svc number
242 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
243 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
244 j sysc_do_restart # restart svc
247 # _TIF_SINGLE_STEP is set, call do_single_step
250 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
251 lhi %r0,__LC_PGM_OLD_PSW
252 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
253 la %r2,SP_PTREGS(%r15) # address of register-save area
254 larl %r14,sysc_return # load adr. of system return
255 jg do_single_step # branch to do_sigtrap
261 # call syscall_trace before and after system call
262 # special linkage: %r12 contains the return address for trace_svc
265 la %r2,SP_PTREGS(%r15) # load pt_regs
269 brasl %r14,syscall_trace
273 lg %r7,SP_R2(%r15) # strace might have changed the
274 sll %r7,2 # system call
277 lmg %r3,%r6,SP_R3(%r15)
278 lg %r2,SP_ORIG_R2(%r15)
279 basr %r14,%r8 # call sys_xxx
280 stg %r2,SP_R2(%r15) # store return value
282 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
284 la %r2,SP_PTREGS(%r15) # load pt_regs
286 larl %r14,sysc_return # return point is sysc_return
290 # a new process exits the kernel with ret_from_fork
294 lg %r13,__LC_SVC_NEW_PSW+8
295 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
296 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
298 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
299 0: brasl %r14,schedule_tail
300 stosm 24(%r15),0x03 # reenable interrupts
304 # clone, fork, vfork, exec and sigreturn need glue,
305 # because they all expect pt_regs as parameter,
306 # but are called with different parameter.
307 # return-address is set up above
310 la %r2,SP_PTREGS(%r15) # load pt_regs
311 jg sys_clone # branch to sys_clone
313 #ifdef CONFIG_S390_SUPPORT
315 la %r2,SP_PTREGS(%r15) # load pt_regs
316 jg sys32_clone # branch to sys32_clone
320 la %r2,SP_PTREGS(%r15) # load pt_regs
321 jg sys_fork # branch to sys_fork
324 la %r2,SP_PTREGS(%r15) # load pt_regs
325 jg sys_vfork # branch to sys_vfork
328 la %r2,SP_PTREGS(%r15) # load pt_regs
329 lgr %r12,%r14 # save return address
330 brasl %r14,sys_execve # call sys_execve
331 ltgr %r2,%r2 # check if execve failed
332 bnz 0(%r12) # it did fail -> store result in gpr2
333 b 6(%r12) # SKIP STG 2,SP_R2(15) in
334 # system_call/sysc_tracesys
335 #ifdef CONFIG_S390_SUPPORT
337 la %r2,SP_PTREGS(%r15) # load pt_regs
338 lgr %r12,%r14 # save return address
339 brasl %r14,sys32_execve # call sys32_execve
340 ltgr %r2,%r2 # check if execve failed
341 bnz 0(%r12) # it did fail -> store result in gpr2
342 b 6(%r12) # SKIP STG 2,SP_R2(15) in
343 # system_call/sysc_tracesys
347 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
348 jg sys_sigreturn # branch to sys_sigreturn
350 #ifdef CONFIG_S390_SUPPORT
351 sys32_sigreturn_glue:
352 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
353 jg sys32_sigreturn # branch to sys32_sigreturn
356 sys_rt_sigreturn_glue:
357 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
358 jg sys_rt_sigreturn # branch to sys_sigreturn
360 #ifdef CONFIG_S390_SUPPORT
361 sys32_rt_sigreturn_glue:
362 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter
363 jg sys32_rt_sigreturn # branch to sys32_sigreturn
367 # sigsuspend and rt_sigsuspend need pt_regs as an additional
368 # parameter and they have to skip the store of %r2 into the
369 # user register %r2 because the return value was set in
370 # sigsuspend and rt_sigsuspend already and must not be overwritten!
374 lgr %r5,%r4 # move mask back
375 lgr %r4,%r3 # move history1 parameter
376 lgr %r3,%r2 # move history0 parameter
377 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
378 la %r14,6(%r14) # skip store of return value
379 jg sys_sigsuspend # branch to sys_sigsuspend
381 #ifdef CONFIG_S390_SUPPORT
382 sys32_sigsuspend_glue:
383 llgfr %r4,%r4 # unsigned long
384 lgr %r5,%r4 # move mask back
386 lgr %r4,%r3 # move history1 parameter
388 lgr %r3,%r2 # move history0 parameter
389 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
390 la %r14,6(%r14) # skip store of return value
391 jg sys32_sigsuspend # branch to sys32_sigsuspend
394 sys_rt_sigsuspend_glue:
395 lgr %r4,%r3 # move sigsetsize parameter
396 lgr %r3,%r2 # move unewset parameter
397 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
398 la %r14,6(%r14) # skip store of return value
399 jg sys_rt_sigsuspend # branch to sys_rt_sigsuspend
401 #ifdef CONFIG_S390_SUPPORT
402 sys32_rt_sigsuspend_glue:
403 llgfr %r3,%r3 # size_t
404 lgr %r4,%r3 # move sigsetsize parameter
405 llgtr %r2,%r2 # sigset_emu31_t *
406 lgr %r3,%r2 # move unewset parameter
407 la %r2,SP_PTREGS(%r15) # load pt_regs as first parameter
408 la %r14,6(%r14) # skip store of return value
409 jg sys32_rt_sigsuspend # branch to sys32_rt_sigsuspend
412 sys_sigaltstack_glue:
413 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
414 jg sys_sigaltstack # branch to sys_sigreturn
416 #ifdef CONFIG_S390_SUPPORT
417 sys32_sigaltstack_glue:
418 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter
419 jg sys32_sigaltstack_wrapper # branch to sys_sigreturn
423 * Program check handler routine
426 .globl pgm_check_handler
429 * First we need to check for a special case:
430 * Single stepping an instruction that disables the PER event mask will
431 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
432 * For a single stepped SVC the program check handler gets control after
433 * the SVC new PSW has been loaded. But we want to execute the SVC first and
434 * then handle the PER event. Therefore we update the SVC old PSW to point
435 * to the pgm_check_handler and branch to the SVC handler after we checked
436 * if we have to load the kernel stack register.
437 * For every other possible cause for PER event without the PER mask set
438 * we just ignore the PER event (FIXME: is there anything we have to do
441 SAVE_ALL_BASE __LC_SAVE_AREA
442 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
443 jnz pgm_per # got per exception -> special case
444 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
445 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
446 lgf %r3,__LC_PGM_ILC # load program interruption code
451 larl %r1,pgm_check_table
452 lg %r1,0(%r8,%r1) # load address of handler routine
453 la %r2,SP_PTREGS(%r15) # address of register-save area
454 larl %r14,sysc_return
455 br %r1 # branch to interrupt-handler
458 # handle per exception
461 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
462 jnz pgm_per_std # ok, normal per event from user space
463 # ok its one of the special cases, now we need to find out which one
464 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
466 # no interesting special case, ignore PER event
467 lmg %r12,%r15,__LC_SAVE_AREA
468 lpswe __LC_PGM_OLD_PSW
471 # Normal per exception
474 SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
475 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
476 lg %r1,__TI_task(%r9)
477 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
478 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
479 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
480 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
481 lgf %r3,__LC_PGM_ILC # load program interruption code
483 ngr %r8,%r3 # clear per-event-bit and ilc
488 # it was a single stepped SVC that is causing all the trouble
491 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
492 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
493 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
494 lg %r1,__TI_task(%r9)
495 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
496 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
497 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
498 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
499 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
503 * IO interrupt handler routine
505 .globl io_int_handler
508 SAVE_ALL_BASE __LC_SAVE_AREA+32
509 SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+32,0
510 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
511 la %r2,SP_PTREGS(%r15) # address of register-save area
512 brasl %r14,do_IRQ # call standard irq handler
515 tm SP_PSW+1(%r15),0x01 # returning to user ?
516 #ifdef CONFIG_PREEMPT
517 jno io_preempt # no -> check for preemptive scheduling
519 jno io_leave # no-> skip resched & signal
521 tm __TI_flags+7(%r9),_TIF_WORK_INT
522 jnz io_work # there is work to do (signals etc.)
526 #ifdef CONFIG_PREEMPT
528 icm %r0,15,__TI_precount(%r9)
530 # switch to kernel stack
533 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
534 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
537 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
540 mvc __TI_precount(4,%r9),0(%r1)
541 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
542 brasl %r14,schedule # call schedule
543 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
544 xc __TI_precount(4,%r9),__TI_precount(%r9)
549 # switch to kernel stack, then check TIF bits
552 lg %r1,__LC_KERNEL_STACK
554 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
555 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
558 # One of the work bits is on. Find out which one.
559 # Checked are: _TIF_SIGPENDING and _TIF_NEED_RESCHED
562 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
564 tm __TI_flags+7(%r9),_TIF_SIGPENDING
569 # _TIF_NEED_RESCHED is set, call schedule
572 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
573 brasl %r14,schedule # call scheduler
574 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
575 tm __TI_flags+7(%r9),_TIF_WORK_INT
576 jz io_leave # there is no work to do
580 # _TIF_SIGPENDING is set, call do_signal
583 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
584 la %r2,SP_PTREGS(%r15) # load pt_regs
585 slgr %r3,%r3 # clear *oldset
586 brasl %r14,do_signal # call do_signal
587 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
588 j sysc_leave # out of here, do NOT recheck
591 * External interrupt handler routine
593 .globl ext_int_handler
596 SAVE_ALL_BASE __LC_SAVE_AREA+32
597 SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32,0
598 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
599 la %r2,SP_PTREGS(%r15) # address of register-save area
600 llgh %r3,__LC_EXT_INT_CODE # get interruption code
605 * Machine check handler routines
607 .globl mcck_int_handler
609 SAVE_ALL_BASE __LC_SAVE_AREA+64
610 SAVE_ALL __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64,0
611 brasl %r14,s390_do_machine_check
617 * Restart interruption handler, kick starter for additional CPUs
619 .globl restart_int_handler
621 lg %r15,__LC_SAVE_AREA+120 # load ksp
622 lghi %r10,__LC_CREGS_SAVE_AREA
623 lctlg %c0,%c15,0(%r10) # get new ctl regs
624 lghi %r10,__LC_AREGS_SAVE_AREA
626 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
627 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
631 * If we do not run with SMP enabled, let the new CPU crash ...
633 .globl restart_int_handler
637 lpswe restart_crash-restart_base(%r1)
640 .long 0x000a0000,0x00000000,0x00000000,0x00000000
644 #ifdef CONFIG_CHECK_STACK
646 * The synchronous or the asynchronous stack overflowed. We are dead.
647 * No need to properly save the registers, we are going to panic anyway.
648 * Setup a pt_regs so that show_trace can provide a good call trace.
651 lg %r15,__LC_PANIC_STACK # change to panic stack
653 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
654 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
655 la %r1,__LC_SAVE_AREA
656 chi %r12,__LC_SVC_OLD_PSW
658 chi %r12,__LC_PGM_OLD_PSW
660 la %r1,__LC_SAVE_AREA+16
661 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
662 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
663 la %r2,SP_PTREGS(%r15) # load pt_regs
664 jg kernel_stack_overflow
667 cleanup_table_system_call:
668 .quad system_call, sysc_do_svc
669 cleanup_table_sysc_return:
670 .quad sysc_return, sysc_leave
671 cleanup_table_sysc_leave:
672 .quad sysc_leave, sysc_work_loop
673 cleanup_table_sysc_work_loop:
674 .quad sysc_work_loop, sysc_reschedule
677 clc 8(8,%r12),BASED(cleanup_table_system_call)
679 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
680 jl cleanup_system_call
682 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
684 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
685 jl cleanup_sysc_return
687 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
689 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
690 jl cleanup_sysc_leave
692 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
694 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
695 jl cleanup_sysc_leave
700 mvc __LC_RETURN_PSW(8),0(%r12)
701 clc 8(8,%r12),BASED(cleanup_table_system_call)
703 mvc __LC_SAVE_AREA(32),__LC_SAVE_AREA+32
704 0: stg %r13,__LC_SAVE_AREA+40
705 SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
706 stg %r15,__LC_SAVE_AREA+56
707 llgh %r7,__LC_SVC_INT_CODE
708 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
709 la %r12,__LC_RETURN_PSW
713 mvc __LC_RETURN_PSW(8),0(%r12)
714 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
715 la %r12,__LC_RETURN_PSW
719 clc 8(8,%r12),BASED(cleanup_sysc_leave_lpsw)
721 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
722 mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
723 lmg %r0,%r11,SP_R0(%r15)
725 0: la %r12,__LC_RETURN_PSW
727 cleanup_sysc_leave_lpsw:
728 .quad sysc_leave + 12
735 .Lc_pactive: .long PREEMPT_ACTIVE
736 .Lnr_syscalls: .long NR_syscalls
737 .L0x0130: .short 0x130
738 .L0x0140: .short 0x140
739 .L0x0150: .short 0x150
740 .L0x0160: .short 0x160
741 .L0x0170: .short 0x170
743 .quad __critical_start
747 #define SYSCALL(esa,esame,emu) .long esame
748 .globl sys_call_table
750 #include "syscalls.S"
753 #ifdef CONFIG_S390_SUPPORT
755 #define SYSCALL(esa,esame,emu) .long emu
756 .globl sys_call_table_emu
758 #include "syscalls.S"