2 * linux/openpic.h -- OpenPIC definitions
4 * Copyright (C) 1997 Geert Uytterhoeven
6 * This file is based on the following documentation:
8 * The Open Programmable Interrupt Controller (PIC)
9 * Register Interface Specification Revision 1.2
11 * Issue Date: October 1995
13 * Issued jointly by Advanced Micro Devices and Cyrix Corporation
15 * AMD is a registered trademark of Advanced Micro Devices, Inc.
16 * Copyright (C) 1995, Advanced Micro Devices, Inc. and Cyrix, Inc.
17 * All Rights Reserved.
19 * To receive a copy of this documentation, send an email to openpic@amd.com.
21 * This file is subject to the terms and conditions of the GNU General Public
22 * License. See the file COPYING in the main directory of this archive
26 #ifndef _LINUX_OPENPIC_H
27 #define _LINUX_OPENPIC_H
31 #include <linux/config.h>
34 * OpenPIC supports up to 2048 interrupt sources and up to 32 processors
37 #define OPENPIC_MAX_SOURCES 2048
38 #define OPENPIC_MAX_PROCESSORS 32
39 #define OPENPIC_MAX_ISU 32
41 #define OPENPIC_NUM_TIMERS 4
42 #define OPENPIC_NUM_IPI 4
43 #define OPENPIC_NUM_PRI 16
44 #define OPENPIC_NUM_VECTORS OPENPIC_MAX_SOURCES
47 * OpenPIC Registers are 32 bits and aligned on 128 bit boundaries
50 typedef struct _OpenPIC_Reg
{
51 u_int Reg
; /* Little endian! */
57 * Per Processor Registers
60 typedef struct _OpenPIC_Processor
{
62 * Private Shadow Registers (for SLiC backwards compatibility)
64 u_int IPI0_Dispatch_Shadow
; /* Write Only */
66 u_int IPI0_Vector_Priority_Shadow
; /* Read/Write */
69 * Interprocessor Interrupt Command Ports
71 OpenPIC_Reg _IPI_Dispatch
[OPENPIC_NUM_IPI
]; /* Write Only */
73 * Current Task Priority Register
75 OpenPIC_Reg _Current_Task_Priority
; /* Read/Write */
78 * Interrupt Acknowledge Register
80 OpenPIC_Reg _Interrupt_Acknowledge
; /* Read Only */
82 * End of Interrupt (EOI) Register
84 OpenPIC_Reg _EOI
; /* Read/Write */
93 typedef struct _OpenPIC_Timer
{
94 OpenPIC_Reg _Current_Count
; /* Read Only */
95 OpenPIC_Reg _Base_Count
; /* Read/Write */
96 OpenPIC_Reg _Vector_Priority
; /* Read/Write */
97 OpenPIC_Reg _Destination
; /* Read/Write */
105 typedef struct _OpenPIC_Global
{
107 * Feature Reporting Registers
109 OpenPIC_Reg _Feature_Reporting0
; /* Read Only */
110 OpenPIC_Reg _Feature_Reporting1
; /* Future Expansion */
112 * Global Configuration Registers
114 OpenPIC_Reg _Global_Configuration0
; /* Read/Write */
115 OpenPIC_Reg _Global_Configuration1
; /* Future Expansion */
117 * Vendor Specific Registers
119 OpenPIC_Reg _Vendor_Specific
[4];
121 * Vendor Identification Register
123 OpenPIC_Reg _Vendor_Identification
; /* Read Only */
125 * Processor Initialization Register
127 OpenPIC_Reg _Processor_Initialization
; /* Read/Write */
129 * IPI Vector/Priority Registers
131 OpenPIC_Reg _IPI_Vector_Priority
[OPENPIC_NUM_IPI
]; /* Read/Write */
133 * Spurious Vector Register
135 OpenPIC_Reg _Spurious_Vector
; /* Read/Write */
137 * Global Timer Registers
139 OpenPIC_Reg _Timer_Frequency
; /* Read/Write */
140 OpenPIC_Timer Timer
[OPENPIC_NUM_TIMERS
];
146 * Interrupt Source Registers
149 typedef struct _OpenPIC_Source
{
150 OpenPIC_Reg _Vector_Priority
; /* Read/Write */
151 OpenPIC_Reg _Destination
; /* Read/Write */
152 } OpenPIC_Source
, *OpenPIC_SourcePtr
;
156 * OpenPIC Register Map
164 OpenPIC_Global Global
;
166 * Interrupt Source Configuration Registers
168 OpenPIC_Source Source
[OPENPIC_MAX_SOURCES
];
170 * Per Processor Registers
172 OpenPIC_Processor Processor
[OPENPIC_MAX_PROCESSORS
];
177 * Current Task Priority Register
180 #define OPENPIC_CURRENT_TASK_PRIORITY_MASK 0x0000000f
186 #define OPENPIC_WHO_AM_I_ID_MASK 0x0000001f
189 * Feature Reporting Register 0
192 #define OPENPIC_FEATURE_LAST_SOURCE_MASK 0x07ff0000
193 #define OPENPIC_FEATURE_LAST_SOURCE_SHIFT 16
194 #define OPENPIC_FEATURE_LAST_PROCESSOR_MASK 0x00001f00
195 #define OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT 8
196 #define OPENPIC_FEATURE_VERSION_MASK 0x000000ff
199 * Global Configuration Register 0
202 #define OPENPIC_CONFIG_RESET 0x80000000
203 #define OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE 0x20000000
204 #define OPENPIC_CONFIG_BASE_MASK 0x000fffff
207 * Vendor Identification Register
210 #define OPENPIC_VENDOR_ID_STEPPING_MASK 0x00ff0000
211 #define OPENPIC_VENDOR_ID_STEPPING_SHIFT 16
212 #define OPENPIC_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00
213 #define OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT 8
214 #define OPENPIC_VENDOR_ID_VENDOR_ID_MASK 0x000000ff
217 * Vector/Priority Registers
220 #define OPENPIC_MASK 0x80000000
221 #define OPENPIC_ACTIVITY 0x40000000 /* Read Only */
222 #define OPENPIC_PRIORITY_MASK 0x000f0000
223 #define OPENPIC_PRIORITY_SHIFT 16
224 #define OPENPIC_VECTOR_MASK 0x000007ff
228 * Interrupt Source Registers
231 #define OPENPIC_POLARITY_POSITIVE 0x00800000
232 #define OPENPIC_POLARITY_NEGATIVE 0x00000000
233 #define OPENPIC_POLARITY_MASK 0x00800000
234 #define OPENPIC_SENSE_LEVEL 0x00400000
235 #define OPENPIC_SENSE_EDGE 0x00000000
236 #define OPENPIC_SENSE_MASK 0x00400000
243 #define OPENPIC_COUNT_MASK 0x7fffffff
244 #define OPENPIC_TIMER_TOGGLE 0x80000000
245 #define OPENPIC_TIMER_COUNT_INHIBIT 0x80000000
249 * Aliases to make life simpler
252 /* Per Processor Registers */
253 #define IPI_Dispatch(i) _IPI_Dispatch[i].Reg
254 #define Current_Task_Priority _Current_Task_Priority.Reg
255 #define Interrupt_Acknowledge _Interrupt_Acknowledge.Reg
258 /* Global Registers */
259 #define Feature_Reporting0 _Feature_Reporting0.Reg
260 #define Feature_Reporting1 _Feature_Reporting1.Reg
261 #define Global_Configuration0 _Global_Configuration0.Reg
262 #define Global_Configuration1 _Global_Configuration1.Reg
263 #define Vendor_Specific(i) _Vendor_Specific[i].Reg
264 #define Vendor_Identification _Vendor_Identification.Reg
265 #define Processor_Initialization _Processor_Initialization.Reg
266 #define IPI_Vector_Priority(i) _IPI_Vector_Priority[i].Reg
267 #define Spurious_Vector _Spurious_Vector.Reg
268 #define Timer_Frequency _Timer_Frequency.Reg
270 /* Timer Registers */
271 #define Current_Count _Current_Count.Reg
272 #define Base_Count _Base_Count.Reg
273 #define Vector_Priority _Vector_Priority.Reg
274 #define Destination _Destination.Reg
276 /* Interrupt Source Registers */
277 #define Vector_Priority _Vector_Priority.Reg
278 #define Destination _Destination.Reg
281 #endif /* __KERNEL__ */
283 #endif /* _LINUX_OPENPIC_H */