arch/arm/mach-footbridge/netwinder-hw.c

   1 /*
   2  * linux/arch/arm/mach-footbridge/netwinder-hw.c
   3  *
   4  * Netwinder machine fixup
   5  *
   6  * Copyright (C) 1998, 1999 Russell King, Phil Blundell
   7  */
   8 #include <linux/config.h>
   9 #include <linux/module.h>
  10 #include <linux/ioport.h>
  11 #include <linux/kernel.h>
  12 #include <linux/delay.h>
  13 #include <linux/init.h>
  14
  15 #include <asm/io.h>
  16 #include <asm/leds.h>
  17 #include <asm/mach-types.h>
  18
  19 #define IRDA_IO_BASE            0x180
  20 #define GP1_IO_BASE             0x338
  21 #define GP2_IO_BASE             0x33a
  22
  23
  24 #ifdef CONFIG_LEDS
  25 #define DEFAULT_LEDS    0
  26 #else
  27 #define DEFAULT_LEDS    GPIO_GREEN_LED
  28 #endif
  29
  30 /*
  31  * Winbond WB83977F accessibility stuff
  32  */
  33 static inline void wb977_open(void)
  34 {
  35         outb(0x87, 0x370);
  36         outb(0x87, 0x370);
  37 }
  38
  39 static inline void wb977_close(void)
  40 {
  41         outb(0xaa, 0x370);
  42 }
  43
  44 static inline void wb977_wb(int reg, int val)
  45 {
  46         outb(reg, 0x370);
  47         outb(val, 0x371);
  48 }
  49
  50 static inline void wb977_ww(int reg, int val)
  51 {
  52         outb(reg, 0x370);
  53         outb(val >> 8, 0x371);
  54         outb(reg + 1, 0x370);
  55         outb(val, 0x371);
  56 }
  57
  58 #define wb977_device_select(dev)        wb977_wb(0x07, dev)
  59 #define wb977_device_disable()          wb977_wb(0x30, 0x00)
  60 #define wb977_device_enable()           wb977_wb(0x30, 0x01)
  61
  62 /*
  63  * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
  64  */
  65 spinlock_t gpio_lock = SPIN_LOCK_UNLOCKED;
  66
  67 static unsigned int current_gpio_op;
  68 static unsigned int current_gpio_io;
  69 static unsigned int current_cpld;
  70
  71 void gpio_modify_op(int mask, int set)
  72 {
  73         unsigned int new_gpio, changed;
  74
  75         new_gpio = (current_gpio_op & ~mask) | set;
  76         changed = new_gpio ^ current_gpio_op;
  77         current_gpio_op = new_gpio;
  78
  79         if (changed & 0xff)
  80                 outb(new_gpio, GP1_IO_BASE);
  81         if (changed & 0xff00)
  82                 outb(new_gpio >> 8, GP2_IO_BASE);
  83 }
  84
  85 static inline void __gpio_modify_io(int mask, int in)
  86 {
  87         unsigned int new_gpio, changed;
  88         int port;
  89
  90         new_gpio = (current_gpio_io & ~mask) | in;
  91         changed = new_gpio ^ current_gpio_io;
  92         current_gpio_io = new_gpio;
  93
  94         changed >>= 1;
  95         new_gpio >>= 1;
  96
  97         wb977_device_select(7);
  98
  99         for (port = 0xe1; changed && port < 0xe8; changed >>= 1) {
 100                 wb977_wb(port, new_gpio & 1);
 101
 102                 port += 1;
 103                 new_gpio >>= 1;
 104         }
 105
 106         wb977_device_select(8);
 107
 108         for (port = 0xe8; changed && port < 0xec; changed >>= 1) {
 109                 wb977_wb(port, new_gpio & 1);
 110
 111                 port += 1;
 112                 new_gpio >>= 1;
 113         }
 114 }
 115
 116 void gpio_modify_io(int mask, int in)
 117 {
 118         /* Open up the SuperIO chip */
 119         wb977_open();
 120
 121         __gpio_modify_io(mask, in);
 122
 123         /* Close up the EFER gate */
 124         wb977_close();
 125 }
 126
 127 int gpio_read(void)
 128 {
 129         return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
 130 }
 131
 132 /*
 133  * Initialise the Winbond W83977F global registers
 134  */
 135 static inline void wb977_init_global(void)
 136 {
 137         /*
 138          * Enable R/W config registers
 139          */
 140         wb977_wb(0x26, 0x40);
 141
 142         /*
 143          * Power down FDC (not used)
 144          */
 145         wb977_wb(0x22, 0xfe);
 146
 147         /*
 148          * GP12, GP11, CIRRX, IRRXH, GP10
 149          */
 150         wb977_wb(0x2a, 0xc1);
 151
 152         /*
 153          * GP23, GP22, GP21, GP20, GP13
 154          */
 155         wb977_wb(0x2b, 0x6b);
 156
 157         /*
 158          * GP17, GP16, GP15, GP14
 159          */
 160         wb977_wb(0x2c, 0x55);
 161 }
 162
 163 /*
 164  * Initialise the Winbond W83977F printer port
 165  */
 166 static inline void wb977_init_printer(void)
 167 {
 168         wb977_device_select(1);
 169
 170         /*
 171          * mode 1 == EPP
 172          */
 173         wb977_wb(0xf0, 0x01);
 174 }
 175
 176 /*
 177  * Initialise the Winbond W83977F keyboard controller
 178  */
 179 static inline void wb977_init_keyboard(void)
 180 {
 181         wb977_device_select(5);
 182
 183         /*
 184          * Keyboard controller address
 185          */
 186         wb977_ww(0x60, 0x0060);
 187         wb977_ww(0x62, 0x0064);
 188
 189         /*
 190          * Keyboard IRQ 1, active high, edge trigger
 191          */
 192         wb977_wb(0x70, 1);
 193         wb977_wb(0x71, 0x02);
 194
 195         /*
 196          * Mouse IRQ 5, active high, edge trigger
 197          */
 198         wb977_wb(0x72, 5);
 199         wb977_wb(0x73, 0x02);
 200
 201         /*
 202          * KBC 8MHz
 203          */
 204         wb977_wb(0xf0, 0x40);
 205
 206         /*
 207          * Enable device
 208          */
 209         wb977_device_enable();
 210 }
 211
 212 /*
 213  * Initialise the Winbond W83977F Infra-Red device
 214  */
 215 static inline void wb977_init_irda(void)
 216 {
 217         wb977_device_select(6);
 218
 219         /*
 220          * IR base address
 221          */
 222         wb977_ww(0x60, IRDA_IO_BASE);
 223
 224         /*
 225          * IRDA IRQ 6, active high, edge trigger
 226          */
 227         wb977_wb(0x70, 6);
 228         wb977_wb(0x71, 0x02);
 229
 230         /*
 231          * RX DMA - ISA DMA 0
 232          */
 233         wb977_wb(0x74, 0x00);
 234
 235         /*
 236          * TX DMA - Disable Tx DMA
 237          */
 238         wb977_wb(0x75, 0x04);
 239
 240         /*
 241          * Append CRC, Enable bank selection
 242          */
 243         wb977_wb(0xf0, 0x03);
 244
 245         /*
 246          * Enable device
 247          */
 248         wb977_device_enable();
 249 }
 250
 251 /*
 252  * Initialise Winbond W83977F general purpose IO
 253  */
 254 static inline void wb977_init_gpio(void)
 255 {
 256         unsigned long flags;
 257
 258         /*
 259          * Set up initial I/O definitions
 260          */
 261         current_gpio_io = -1;
 262         __gpio_modify_io(-1, GPIO_DONE | GPIO_WDTIMER);
 263
 264         wb977_device_select(7);
 265
 266         /*
 267          * Group1 base address
 268          */
 269         wb977_ww(0x60, GP1_IO_BASE);
 270         wb977_ww(0x62, 0);
 271         wb977_ww(0x64, 0);
 272
 273         /*
 274          * GP10 (Orage button) IRQ 10, active high, edge trigger
 275          */
 276         wb977_wb(0x70, 10);
 277         wb977_wb(0x71, 0x02);
 278
 279         /*
 280          * GP10: Debounce filter enabled, IRQ, input
 281          */
 282         wb977_wb(0xe0, 0x19);
 283
 284         /*
 285          * Enable Group1
 286          */
 287         wb977_device_enable();
 288
 289         wb977_device_select(8);
 290
 291         /*
 292          * Group2 base address
 293          */
 294         wb977_ww(0x60, GP2_IO_BASE);
 295
 296         /*
 297          * Clear watchdog timer regs
 298          *  - timer disable
 299          */
 300         wb977_wb(0xf2, 0x00);
 301
 302         /*
 303          *  - disable LED, no mouse nor keyboard IRQ
 304          */
 305         wb977_wb(0xf3, 0x00);
 306
 307         /*
 308          *  - timer counting, disable power LED, disable timeouot
 309          */
 310         wb977_wb(0xf4, 0x00);
 311
 312         /*
 313          * Enable group2
 314          */
 315         wb977_device_enable();
 316
 317         /*
 318          * Set Group1/Group2 outputs
 319          */
 320         spin_lock_irqsave(&gpio_lock, flags);
 321         gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
 322         spin_unlock_irqrestore(&gpio_lock, flags);
 323 }
 324
 325 /*
 326  * Initialise the Winbond W83977F chip.
 327  */
 328 static void __init wb977_init(void)
 329 {
 330         request_region(0x370, 2, "W83977AF configuration");
 331
 332         /*
 333          * Open up the SuperIO chip
 334          */
 335         wb977_open();
 336
 337         /*
 338          * Initialise the global registers
 339          */
 340         wb977_init_global();
 341
 342         /*
 343          * Initialise the various devices in
 344          * the multi-IO chip.
 345          */
 346         wb977_init_printer();
 347         wb977_init_keyboard();
 348         wb977_init_irda();
 349         wb977_init_gpio();
 350
 351         /*
 352          * Close up the EFER gate
 353          */
 354         wb977_close();
 355 }
 356
 357 void cpld_modify(int mask, int set)
 358 {
 359         int msk;
 360
 361         current_cpld = (current_cpld & ~mask) | set;
 362
 363         gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
 364         gpio_modify_op(GPIO_IOLOAD, 0);
 365
 366         for (msk = 8; msk; msk >>= 1) {
 367                 int bit = current_cpld & msk;
 368
 369                 gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
 370                 gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
 371         }
 372
 373         gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
 374         gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
 375         gpio_modify_op(GPIO_IOLOAD, 0);
 376 }
 377
 378 static void __init cpld_init(void)
 379 {
 380         unsigned long flags;
 381
 382         spin_lock_irqsave(&gpio_lock, flags);
 383         cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
 384         spin_unlock_irqrestore(&gpio_lock, flags);
 385 }
 386
 387 static unsigned char rwa_unlock[] __initdata =
 388 { 0x00, 0x00, 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b,
 389   0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74,
 390   0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 };
 391
 392 #ifndef DEBUG
 393 #define dprintk(x...)
 394 #else
 395 #define dprintk(x...) printk(x)
 396 #endif
 397
 398 #define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0)
 399
 400 static inline void rwa010_unlock(void)
 401 {
 402         int i;
 403
 404         WRITE_RWA(2, 2);
 405         mdelay(10);
 406
 407         for (i = 0; i < sizeof(rwa_unlock); i++) {
 408                 outb(rwa_unlock[i], 0x279);
 409                 udelay(10);
 410         }
 411 }
 412
 413 static inline void rwa010_read_ident(void)
 414 {
 415         unsigned char si[9];
 416         int i, j;
 417
 418         WRITE_RWA(3, 0);
 419         WRITE_RWA(0, 128);
 420
 421         outb(1, 0x279);
 422
 423         mdelay(1);
 424
 425         dprintk("Identifier: ");
 426         for (i = 0; i < 9; i++) {
 427                 si[i] = 0;
 428                 for (j = 0; j < 8; j++) {
 429                         int bit;
 430                         udelay(250);
 431                         inb(0x203);
 432                         udelay(250);
 433                         bit = inb(0x203);
 434                         dprintk("%02X ", bit);
 435                         bit = (bit == 0xaa) ? 1 : 0;
 436                         si[i] |= bit << j;
 437                 }
 438                 dprintk("(%02X) ", si[i]);
 439         }
 440         dprintk("\n");
 441 }
 442
 443 static inline void rwa010_global_init(void)
 444 {
 445         WRITE_RWA(6, 2);        // Assign a card no = 2
 446
 447         dprintk("Card no = %d\n", inb(0x203));
 448
 449         /* disable the modem section of the chip */
 450         WRITE_RWA(7, 3);
 451         WRITE_RWA(0x30, 0);
 452
 453         /* disable the cdrom section of the chip */
 454         WRITE_RWA(7, 4);
 455         WRITE_RWA(0x30, 0);
 456
 457         /* disable the MPU-401 section of the chip */
 458         WRITE_RWA(7, 2);
 459         WRITE_RWA(0x30, 0);
 460 }
 461
 462 static inline void rwa010_game_port_init(void)
 463 {
 464         int i;
 465
 466         WRITE_RWA(7, 5);
 467
 468         dprintk("Slider base: ");
 469         WRITE_RWA(0x61, 1);
 470         i = inb(0x203);
 471
 472         WRITE_RWA(0x60, 2);
 473         dprintk("%02X%02X (201)\n", inb(0x203), i);
 474
 475         WRITE_RWA(0x30, 1);
 476 }
 477
 478 static inline void rwa010_waveartist_init(int base, int irq, int dma)
 479 {
 480         int i;
 481
 482         WRITE_RWA(7, 0);
 483
 484         dprintk("WaveArtist base: ");
 485         WRITE_RWA(0x61, base);
 486         i = inb(0x203);
 487
 488         WRITE_RWA(0x60, base >> 8);
 489         dprintk("%02X%02X (%X),", inb(0x203), i, base);
 490
 491         WRITE_RWA(0x70, irq);
 492         dprintk(" irq: %d (%d),", inb(0x203), irq);
 493
 494         WRITE_RWA(0x74, dma);
 495         dprintk(" dma: %d (%d)\n", inb(0x203), dma);
 496
 497         WRITE_RWA(0x30, 1);
 498 }
 499
 500 static inline void rwa010_soundblaster_init(int sb_base, int al_base, int irq, int dma)
 501 {
 502         int i;
 503
 504         WRITE_RWA(7, 1);
 505
 506         dprintk("SoundBlaster base: ");
 507         WRITE_RWA(0x61, sb_base);
 508         i = inb(0x203);
 509
 510         WRITE_RWA(0x60, sb_base >> 8);
 511         dprintk("%02X%02X (%X),", inb(0x203), i, sb_base);
 512
 513         dprintk(" irq: ");
 514         WRITE_RWA(0x70, irq);
 515         dprintk("%d (%d),", inb(0x203), irq);
 516
 517         dprintk(" 8-bit DMA: ");
 518         WRITE_RWA(0x74, dma);
 519         dprintk("%d (%d)\n", inb(0x203), dma);
 520
 521         dprintk("AdLib base: ");
 522         WRITE_RWA(0x63, al_base);
 523         i = inb(0x203);
 524
 525         WRITE_RWA(0x62, al_base >> 8);
 526         dprintk("%02X%02X (%X)\n", inb(0x203), i, al_base);
 527
 528         WRITE_RWA(0x30, 1);
 529 }
 530
 531 static void rwa010_soundblaster_reset(void)
 532 {
 533         int i;
 534
 535         outb(1, 0x226);
 536         udelay(3);
 537         outb(0, 0x226);
 538
 539         for (i = 0; i < 5; i++) {
 540                 if (inb(0x22e) & 0x80)
 541                         break;
 542                 mdelay(1);
 543         }
 544         if (i == 5)
 545                 printk("SoundBlaster: DSP reset failed\n");
 546
 547         dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a));
 548
 549         for (i = 0; i < 5; i++) {
 550                 if ((inb(0x22c) & 0x80) == 0)
 551                         break;
 552                 mdelay(1);
 553         }
 554
 555         if (i == 5)
 556                 printk("SoundBlaster: DSP not ready\n");
 557         else {
 558                 outb(0xe1, 0x22c);
 559
 560                 dprintk("SoundBlaster DSP id: ");
 561                 i = inb(0x22a);
 562                 udelay(1);
 563                 i |= inb(0x22a) << 8;
 564                 dprintk("%04X\n", i);
 565
 566                 for (i = 0; i < 5; i++) {
 567                         if ((inb(0x22c) & 0x80) == 0)
 568                                 break;
 569                         mdelay(1);
 570                 }
 571
 572                 if (i == 5)
 573                         printk("SoundBlaster: could not turn speaker off\n");
 574
 575                 outb(0xd3, 0x22c);
 576         }
 577
 578         /* turn on OPL3 */
 579         outb(5, 0x38a);
 580         outb(1, 0x38b);
 581 }
 582
 583 static void __init rwa010_init(void)
 584 {
 585         rwa010_unlock();
 586         rwa010_read_ident();
 587         rwa010_global_init();
 588         rwa010_game_port_init();
 589         rwa010_waveartist_init(0x250, 3, 7);
 590         rwa010_soundblaster_init(0x220, 0x388, 3, 1);
 591         rwa010_soundblaster_reset();
 592 }
 593
 594 EXPORT_SYMBOL(gpio_lock);
 595 EXPORT_SYMBOL(gpio_modify_op);
 596 EXPORT_SYMBOL(gpio_modify_io);
 597 EXPORT_SYMBOL(cpld_modify);
 598
 599 /*
 600  * Initialise any other hardware after we've got the PCI bus
 601  * initialised.  We may need the PCI bus to talk to this other
 602  * hardware.
 603  */
 604 static int __init nw_hw_init(void)
 605 {
 606         if (machine_is_netwinder()) {
 607                 unsigned long flags;
 608
 609                 wb977_init();
 610                 cpld_init();
 611                 rwa010_init();
 612
 613                 spin_lock_irqsave(&gpio_lock, flags);
 614                 gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
 615                 spin_unlock_irqrestore(&gpio_lock, flags);
 616         }
 617         return 0;
 618 }
 619
 620 __initcall(nw_hw_init);