clean up old IOS handles on startup (dhewg)
[libogc.git] / libdb / debug_handler.S
blob8aab2b71707f5f8d2a09c17b17517dfdc0dc6da6
1 #include <asm.h>
3 #define EXCEPTION_PROLOG                        \
4         mfspr    r0,912;                                \
5         stw      r0,GQR0_OFFSET(sp);    \
6         mfspr    r0,913;                                \
7         stw      r0,GQR1_OFFSET(sp);    \
8         mfspr    r0,914;                                \
9         stw      r0,GQR2_OFFSET(sp);    \
10         mfspr    r0,915;                                \
11         stw      r0,GQR3_OFFSET(sp);    \
12         mfspr    r0,916;                                \
13         stw      r0,GQR4_OFFSET(sp);    \
14         mfspr    r0,917;                                \
15         stw      r0,GQR5_OFFSET(sp);    \
16         mfspr    r0,918;                                \
17         stw      r0,GQR6_OFFSET(sp);    \
18         mfspr    r0,919;                                \
19         stw      r0,GQR7_OFFSET(sp);    \
20         stmw     r6,GPR6_OFFSET(sp)
21         
22 #define EXCEPTION_EPILOG                        \
23         lwz             r4,GQR0_OFFSET(sp);             \
24         mtspr   912,r4;                                 \
25         lwz             r4,GQR1_OFFSET(sp);             \
26         mtspr   913,r4;                                 \
27         lwz             r4,GQR2_OFFSET(sp);             \
28         mtspr   914,r4;                                 \
29         lwz             r4,GQR3_OFFSET(sp);             \
30         mtspr   915,r4;                                 \
31         lwz             r4,GQR4_OFFSET(sp);             \
32         mtspr   916,r4;                                 \
33         lwz             r4,GQR5_OFFSET(sp);             \
34         mtspr   917,r4;                                 \
35         lwz             r4,GQR6_OFFSET(sp);             \
36         mtspr   918,r4;                                 \
37         lwz             r4,GQR7_OFFSET(sp);             \
38         mtspr   919,r4;                                 \
39         lmw             r5,GPR5_OFFSET(sp)
41         .extern c_debug_handler
42         .extern _cpu_context_save_fp
43         .globl dbg_exceptionhandler
44 dbg_exceptionhandler:
45         stwu    sp,-EXCEPTION_FRAME_END(sp)             //now we're able to adjust the stackpointer with it's cached address
47         EXCEPTION_PROLOG
49         addi    r14,sp,0
51         lis             r15,__debug_nestlevel@ha
52         lwz             r6,__debug_nestlevel@l(r15)
53         cmpwi   r6,0
54         bne             nested
56         lis             sp,__debugstack@h
57         ori             sp,sp,__debugstack@l
58         lis             r0,0
59         stwu    r0,-16(sp)
61 nested:
62         addi    r6,r6,1
63         stw             r6,__debug_nestlevel@l(r15)
64                 
65         addi    r3,r14,0x08
66         bl              _cpu_context_save_fp
67         bl              c_debug_handler
68         
69         lwz             r6,__debug_nestlevel@l(r15)
70         addi    r6,r6,-1
71         stw             r6,__debug_nestlevel@l(r15)
73         addi    sp,r14,0
75 exit:
76         lwz             r4,CR_OFFSET(sp)
77         mtcr    r4
78         lwz             r4,LR_OFFSET(sp)
79         mtlr    r4
80         lwz             r4,CTR_OFFSET(sp)
81         mtctr   r4
82         lwz             r4,XER_OFFSET(sp)
83         mtxer   r4
85         EXCEPTION_EPILOG
87         mfmsr   r4
88         rlwinm  r4,r4,0,19,17
89         mtmsr   r4
90         isync
92         lwz             toc,GPR2_OFFSET(sp)
93         lwz             r0,GPR0_OFFSET(sp)
95         lwz             r4,SRR0_OFFSET(sp)
96         mtsrr0  r4
97         lwz             r4,SRR1_OFFSET(sp)
98         mtsrr1  r4
100         lwz             r4,GPR4_OFFSET(sp)
101         lwz             r3,GPR3_OFFSET(sp)
102         addi    sp,sp,EXCEPTION_FRAME_END
103         rfi
105         .globl __set_iabr
106 __set_iabr:
107         mfmsr   r4
108         rlwinm  r5,r4,0,18,16
109         mtmsr   r5
110         clrrwi  r3,r3,2
111         mtspr   1010,r3
112         isync
113         sync
114         mtmsr   r4
115         blr
117         .globl __enable_iabr
118 __enable_iabr:
119         mfmsr   r4
120         rlwinm  r5,r4,0,18,16
121         mtmsr   r5
122         mfspr   r3,1010
123         ori             r3,r3,0x0003
124         mtspr   1010,r3
125         isync
126         sync
127         mtmsr   r4
128         blr
130         .globl __disable_iabr
131 __disable_iabr:
132         mfmsr   r4
133         rlwinm  r5,r4,0,18,16
134         mtmsr   r5
135         mfspr   r3,1010
136         clrrwi  r3,r3,2
137         mtspr   1010,r3
138         isync
139         sync
140         mtmsr   r4
141         blr
143         .globl __clr_iabr
144 __clr_iabr:
145         mfmsr   r4
146         rlwinm  r5,r4,0,18,16
147         mtmsr   r5
148         mtspr   1010,0
149         isync
150         sync
151         mtmsr   r4
152         blr
154         .section .bss
156         .balign 4
157 __debug_nestlevel:
158         .long   0
160         .balign 8
161         .globl __debugstack_end,__debugstack
162 __debugstack_end:
163         .space 0x4000
164 __debugstack: