firmware/target/arm/as3525/ata_sd_as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2006 Daniel Ankers
  11  * Copyright © 2008-2009 Rafaël Carré
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22
  23 /* Driver for the ARM PL180 SD/MMC controller inside AS3525 SoC */
  24
  25 /* TODO: Find the real capacity of >2GB models (will be useful for USB) */
  26
  27 #include "config.h" /* for HAVE_MULTIDRIVE & AMS_OF_SIZE */
  28 #include "fat.h"
  29 #include "thread.h"
  30 #include "led.h"
  31 #include "hotswap.h"
  32 #include "system.h"
  33 #include "cpu.h"
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <string.h>
  37 #include "as3525.h"
  38 #include "pl180.h"  /* SD controller */
  39 #include "pl081.h"  /* DMA controller */
  40 #include "dma-target.h" /* DMA request lines */
  41 #include "clock-target.h"
  42 #include "panic.h"
  43 #ifdef HAVE_BUTTON_LIGHT
  44 #include "backlight-target.h"
  45 #endif
  46 #include "stdbool.h"
  47 #include "ata_idle_notify.h"
  48 #include "sd.h"
  49 #include "usb.h"
  50
  51 #ifdef HAVE_HOTSWAP
  52 #include "disk.h"
  53 #endif
  54
  55 /* command flags */
  56 #define MCI_NO_FLAGS    (0<<0)
  57 #define MCI_RESP        (1<<0)
  58 #define MCI_LONG_RESP   (1<<1)
  59 #define MCI_ARG         (1<<2)
  60
  61 /* ARM PL180 registers */
  62 #define MCI_POWER(i)       (*(volatile unsigned char *) (pl180_base[i]+0x00))
  63 #define MCI_CLOCK(i)       (*(volatile unsigned long *) (pl180_base[i]+0x04))
  64 #define MCI_ARGUMENT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x08))
  65 #define MCI_COMMAND(i)     (*(volatile unsigned long *) (pl180_base[i]+0x0C))
  66 #define MCI_RESPCMD(i)     (*(volatile unsigned long *) (pl180_base[i]+0x10))
  67 #define MCI_RESP0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x14))
  68 #define MCI_RESP1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x18))
  69 #define MCI_RESP2(i)       (*(volatile unsigned long *) (pl180_base[i]+0x1C))
  70 #define MCI_RESP3(i)       (*(volatile unsigned long *) (pl180_base[i]+0x20))
  71 #define MCI_DATA_TIMER(i)  (*(volatile unsigned long *) (pl180_base[i]+0x24))
  72 #define MCI_DATA_LENGTH(i) (*(volatile unsigned short*) (pl180_base[i]+0x28))
  73 #define MCI_DATA_CTRL(i)   (*(volatile unsigned char *) (pl180_base[i]+0x2C))
  74 #define MCI_DATA_CNT(i)    (*(volatile unsigned short*) (pl180_base[i]+0x30))
  75 #define MCI_STATUS(i)      (*(volatile unsigned long *) (pl180_base[i]+0x34))
  76 #define MCI_CLEAR(i)       (*(volatile unsigned long *) (pl180_base[i]+0x38))
  77 #define MCI_MASK0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x3C))
  78 #define MCI_MASK1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x40))
  79 #define MCI_SELECT(i)      (*(volatile unsigned long *) (pl180_base[i]+0x44))
  80 #define MCI_FIFO_CNT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x48))
  81
  82 #define MCI_ERROR \
  83     (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_RX_OVERRUN | MCI_TX_UNDERRUN)
  84
  85 #define MCI_FIFO(i)        ((unsigned long *) (pl180_base[i]+0x80))
  86 /* volumes */
  87 #define     INTERNAL_AS3525 0   /* embedded SD card */
  88 #define     SD_SLOT_AS3525   1   /* SD slot if present */
  89
  90 static const int pl180_base[NUM_DRIVES] = {
  91             NAND_FLASH_BASE
  92 #ifdef HAVE_MULTIDRIVE
  93             , SD_MCI_BASE
  94 #endif
  95 };
  96
  97 static int sd_wait_for_state(const int drive, unsigned int state);
  98 static int sd_select_bank(signed char bank);
  99 static int sd_init_card(const int drive);
 100 static void init_pl180_controller(const int drive);
 101 #define SECTOR_SIZE     512 /* XXX: different sector sizes ? */
 102 #define BLOCKS_PER_BANK 0x7a7800
 103
 104 static tCardInfo card_info[NUM_DRIVES];
 105
 106 /* maximum timeouts recommanded in the SD Specification v2.00 */
 107 #define SD_MAX_READ_TIMEOUT     ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */
 108 #define SD_MAX_WRITE_TIMEOUT    ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */
 109
 110 /* for compatibility */
 111 static long last_disk_activity = -1;
 112
 113 #define MIN_YIELD_PERIOD 5  /* ticks */
 114 static long next_yield = 0;
 115
 116 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
 117 static const char         sd_thread_name[] = "ata/sd";
 118 static struct mutex       sd_mtx;
 119 static struct event_queue sd_queue;
 120 #ifndef BOOTLOADER
 121 static bool sd_enabled = false;
 122 #endif
 123
 124 static struct wakeup transfer_completion_signal;
 125 static volatile unsigned int transfer_error[NUM_VOLUMES];
 126 #define PL180_MAX_TRANSFER_ERRORS 10
 127
 128 #define UNALIGNED_NUM_SECTORS 10
 129 static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SECTOR_SIZE] __attribute__((aligned(32)));   /* align on cache line size */
 130 static unsigned char *uncached_buffer = UNCACHED_ADDR(&aligned_buffer[0]);
 131
 132 static inline void mci_delay(void)
 133 {
 134     int i = 0xffff;
 135     do {
 136         asm volatile("nop\n");
 137     } while (--i);
 138 }
 139
 140 #ifdef HAVE_HOTSWAP
 141 static int sd1_oneshot_callback(struct timeout *tmo)
 142 {
 143     (void)tmo;
 144
 145     /* This is called only if the state was stable for 300ms - check state
 146      * and post appropriate event. */
 147     if (card_detect_target())
 148     {
 149         queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
 150     }
 151     else
 152         queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
 153
 154     return 0;
 155 }
 156
 157 void INT_GPIOA(void)
 158 {
 159     static struct timeout sd1_oneshot;
 160     /* acknowledge interrupt */
 161     GPIOA_IC = (1<<2);
 162     timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
 163 }
 164 #endif  /* HAVE_HOTSWAP */
 165
 166 void INT_NAND(void)
 167 {
 168     const int status = MCI_STATUS(INTERNAL_AS3525);
 169
 170     transfer_error[INTERNAL_AS3525] = status & MCI_ERROR;
 171
 172     wakeup_signal(&transfer_completion_signal);
 173     MCI_CLEAR(INTERNAL_AS3525) = status;
 174 }
 175
 176 #ifdef HAVE_MULTIDRIVE
 177 void INT_MCI0(void)
 178 {
 179     const int status = MCI_STATUS(SD_SLOT_AS3525);
 180
 181     transfer_error[SD_SLOT_AS3525] = status & MCI_ERROR;
 182
 183     wakeup_signal(&transfer_completion_signal);
 184     MCI_CLEAR(SD_SLOT_AS3525) = status;
 185 }
 186 #endif
 187
 188 static bool send_cmd(const int drive, const int cmd, const int arg,
 189                      const int flags, long *response)
 190 {
 191     int status;
 192
 193     /* Clear old status flags */
 194     MCI_CLEAR(drive) = 0x7ff;
 195
 196     /* Load command argument or clear if none */
 197     MCI_ARGUMENT(drive) = (flags & MCI_ARG) ? arg : 0;
 198
 199     /* Construct MCI_COMMAND & enable CPSM */
 200     MCI_COMMAND(drive) =
 201        /*b0:5*/  cmd
 202        /* b6 */| ((flags & (MCI_RESP|MCI_LONG_RESP)) ? MCI_COMMAND_RESPONSE : 0)
 203        /* b7 */| ((flags & MCI_LONG_RESP) ? MCI_COMMAND_LONG_RESPONSE : 0)
 204        /* b8   | MCI_COMMAND_INTERRUPT */
 205        /* b9   | MCI_COMMAND_PENDING */  /*Only used with stream data transfer*/
 206        /* b10*/| MCI_COMMAND_ENABLE;     /* Enables CPSM */
 207
 208     /* Wait while cmd completes then disable CPSM */
 209     while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);
 210     MCI_COMMAND(drive) = 0;
 211
 212     status = MCI_STATUS(drive);
 213
 214     /*  Handle command responses */
 215     if(flags & MCI_RESP)                   /*  CMD expects response  */
 216     {
 217         response[0] = MCI_RESP0(drive);    /*  Always prepare short response  */
 218
 219         if(status & (MCI_CMD_TIMEOUT | MCI_CMD_CRC_FAIL))  /* failed response */
 220             return false;
 221
 222         if(status &  MCI_CMD_RESP_END)            /*Response passed CRC check */
 223         {
 224             if(flags & MCI_LONG_RESP)
 225             {   /* replace short response with long response */
 226                 /* store the response in reverse words order */
 227                 response[0] = MCI_RESP3(drive);
 228                 response[1] = MCI_RESP2(drive);
 229                 response[2] = MCI_RESP1(drive);
 230                 response[3] = MCI_RESP0(drive);
 231             }
 232             return true;
 233         }
 234     }
 235     else if(status & MCI_CMD_SENT)          /* CMD sent, no response required */
 236         return true;
 237
 238     return false;
 239 }
 240
 241 static int sd_init_card(const int drive)
 242 {
 243     unsigned long response;
 244     long init_timeout;
 245     bool sd_v2 = false;
 246     unsigned long temp_reg[4];
 247     int i;
 248
 249
 250     /* 100 - 400kHz clock required for Identification Mode  */
 251     MCI_CLOCK(drive) = (MCI_CLOCK(drive) & 0xf00) | AS3525_SD_IDENT_DIV;
 252
 253
 254     /*  Start of Card Identification Mode ************************************/
 255
 256
 257     /* CMD0 Go Idle  */
 258     if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL))
 259         return -1;
 260
 261     mci_delay();
 262
 263     /* CMD8 Check for v2 sd card.  Must be sent before using ACMD41
 264       Non v2 cards will not respond to this command*/
 265     if(send_cmd(drive, SD_SEND_IF_COND, 0x1AA, MCI_RESP|MCI_ARG, &response))
 266         if((response & 0xFFF) == 0x1AA)
 267             sd_v2 = true;
 268
 269     /* timeout for initialization is 1sec, from SD Specification 2.00 */
 270     init_timeout = current_tick + HZ;
 271
 272     do {
 273         /* this timeout is the only valid error for this loop*/
 274         if(TIME_AFTER(current_tick, init_timeout))
 275             return -2;
 276
 277         /* app_cmd */
 278         send_cmd(drive, SD_APP_CMD, 0, MCI_RESP|MCI_ARG, &response);
 279
 280         /* ACMD41 For v2 cards set HCS bit[30] & send host voltage range to all */
 281         send_cmd(drive, SD_APP_OP_COND, (0x00FF8000 | (sd_v2 ? 1<<30 : 0)),
 282                         MCI_RESP|MCI_ARG, &card_info[drive].ocr);
 283
 284     } while(!(card_info[drive].ocr & (1<<31)));
 285
 286     /* CMD2 send CID */
 287     if(!send_cmd(drive, SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP|MCI_ARG,
 288                             temp_reg))
 289         return -3;
 290
 291     for(i=0; i<4; i++)
 292         card_info[drive].cid[3-i] = temp_reg[i];
 293
 294     /* CMD3 send RCA */
 295     if(!send_cmd(drive, SD_SEND_RELATIVE_ADDR, 0, MCI_RESP|MCI_ARG,
 296                 &card_info[drive].rca))
 297         return -4;
 298
 299
 300     /*  End of Card Identification Mode   ************************************/
 301
 302
 303     /* full speed for controller clock  MCICLK = MCLK = PCLK = 62 MHz */
 304     MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS;   /*  FIXME: 50 MHz is spec limit  */
 305     mci_delay();
 306
 307 #ifdef HAVE_MULTIDRIVE
 308     /* Try to switch V2 cards to HS timings, non HS seem to ignore this */
 309     if(sd_v2)
 310     {
 311         /*  CMD7 w/rca: Select card to put it in TRAN state */
 312         if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 313             return -5;
 314
 315         if(sd_wait_for_state(drive, SD_TRAN))
 316             return -6;
 317         /* CMD6 */
 318         if(!send_cmd(drive, SD_SWITCH_FUNC, 0x80fffff1, MCI_ARG, NULL))
 319             return -7;
 320         mci_delay();
 321
 322         /*  go back to STBY state so we can read csd */
 323         /*  CMD7 w/rca=0:  Deselect card to put it in STBY state */
 324         if(!send_cmd(drive, SD_DESELECT_CARD, 0, MCI_ARG, NULL))
 325             return -8;
 326     }
 327 #endif /*  HAVE_MULTIDRIVE  */
 328
 329     /* CMD9 send CSD */
 330     if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
 331                  MCI_RESP|MCI_LONG_RESP|MCI_ARG, temp_reg))
 332         return -9;
 333
 334     for(i=0; i<4; i++)
 335         card_info[drive].csd[3-i] = temp_reg[i];
 336
 337     sd_parse_csd(&card_info[drive]);
 338
 339     /*  CMD7 w/rca: Select card to put it in TRAN state */
 340     if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 341         return -10;
 342
 343     /*
 344      * enable bank switching
 345      * without issuing this command, we only have access to 1/4 of the blocks
 346      * of the first bank (0x1E9E00 blocks, which is the size reported in the
 347      * CSD register)
 348      */
 349     if(drive == INTERNAL_AS3525)
 350     {
 351         const int ret = sd_select_bank(-1);
 352         if(ret < 0)
 353             return ret - 11;
 354     }
 355
 356     card_info[drive].initialized = 1;
 357
 358     return 0;
 359 }
 360
 361 static void sd_thread(void) __attribute__((noreturn));
 362 static void sd_thread(void)
 363 {
 364     struct queue_event ev;
 365     bool idle_notified = false;
 366
 367     while (1)
 368     {
 369         queue_wait_w_tmo(&sd_queue, &ev, HZ);
 370
 371         switch ( ev.id )
 372         {
 373 #ifdef HAVE_HOTSWAP
 374         case SYS_HOTSWAP_INSERTED:
 375         case SYS_HOTSWAP_EXTRACTED:
 376         {
 377             int microsd_init = 1;
 378             fat_lock();          /* lock-out FAT activity first -
 379                                     prevent deadlocking via disk_mount that
 380                                     would cause a reverse-order attempt with
 381                                     another thread */
 382             mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
 383                                     into driver that bypass the fat cache */
 384
 385             /* We now have exclusive control of fat cache and ata */
 386
 387             disk_unmount(SD_SLOT_AS3525);     /* release "by force", ensure file
 388                                     descriptors aren't leaked and any busy
 389                                     ones are invalid if mounting */
 390
 391             /* Force card init for new card, re-init for re-inserted one or
 392              * clear if the last attempt to init failed with an error. */
 393             card_info[SD_SLOT_AS3525].initialized = 0;
 394
 395             if (ev.id == SYS_HOTSWAP_INSERTED)
 396             {
 397                 sd_enable(true);
 398                 init_pl180_controller(SD_SLOT_AS3525);
 399                 microsd_init = sd_init_card(SD_SLOT_AS3525);
 400                 if (microsd_init < 0) /* initialisation failed */
 401                     panicf("microSD init failed : %d", microsd_init);
 402
 403                 microsd_init = disk_mount(SD_SLOT_AS3525); /* 0 if fail */
 404             }
 405
 406             /*
 407              * Mount succeeded, or this was an EXTRACTED event,
 408              * in both cases notify the system about the changed filesystems
 409              */
 410             if (microsd_init)
 411                 queue_broadcast(SYS_FS_CHANGED, 0);
 412
 413             /* Access is now safe */
 414             mutex_unlock(&sd_mtx);
 415             fat_unlock();
 416             sd_enable(false);
 417         }
 418             break;
 419 #endif
 420         case SYS_TIMEOUT:
 421             if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
 422             {
 423                 idle_notified = false;
 424             }
 425             else
 426             {
 427                 /* never let a timer wrap confuse us */
 428                 next_yield = current_tick;
 429
 430                 if (!idle_notified)
 431                 {
 432                     call_storage_idle_notifys(false);
 433                     idle_notified = true;
 434                 }
 435             }
 436             break;
 437
 438         case SYS_USB_CONNECTED:
 439             usb_acknowledge(SYS_USB_CONNECTED_ACK);
 440             /* Wait until the USB cable is extracted again */
 441             usb_wait_for_disconnect(&sd_queue);
 442
 443             break;
 444         case SYS_USB_DISCONNECTED:
 445             usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
 446             break;
 447         }
 448     }
 449 }
 450
 451 static void init_pl180_controller(const int drive)
 452 {
 453     MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0;
 454     MCI_CLEAR(drive) = 0x7ff;
 455
 456     MCI_MASK0(drive) = MCI_ERROR | MCI_DATA_END;
 457     MCI_MASK1(drive) = 0;
 458 #ifdef HAVE_MULTIDRIVE
 459     VIC_INT_ENABLE |=
 460         (drive == INTERNAL_AS3525) ? INTERRUPT_NAND : INTERRUPT_MCI0;
 461
 462     /* setup isr for microsd monitoring */
 463     VIC_INT_ENABLE |= (INTERRUPT_GPIOA);
 464     /* clear previous irq */
 465     GPIOA_IC = (1<<2);
 466     /* enable edge detecting */
 467     GPIOA_IS &= ~(1<<2);
 468     /* detect both raising and falling edges */
 469     GPIOA_IBE |= (1<<2);
 470
 471 #else
 472     VIC_INT_ENABLE |= INTERRUPT_NAND;
 473 #endif
 474
 475     MCI_POWER(drive) = MCI_POWER_UP | (MCI_VDD_3_0);  /*  OF Setting  */
 476     mci_delay();
 477
 478     MCI_POWER(drive) |= MCI_POWER_ON;
 479     mci_delay();
 480
 481     MCI_SELECT(drive) = 0;
 482
 483     MCI_CLOCK(drive) = MCI_CLOCK_ENABLE;
 484     mci_delay();
 485 }
 486
 487 int sd_init(void)
 488 {
 489     int ret;
 490     CGU_IDE =   (1<<7)  /* AHB interface enable */  |
 491                 (1<<6)  /* interface enable */      |
 492                 (AS3525_IDE_DIV << 2)               |
 493                 AS3525_CLK_PLLA;  /* clock source = PLLA */
 494
 495
 496     CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 497 #ifdef HAVE_MULTIDRIVE
 498     CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 499     CCU_IO &= ~(1<<3);           /* bits 3:2 = 01, xpd is SD interface */
 500     CCU_IO |= (1<<2);
 501 #endif
 502
 503     wakeup_init(&transfer_completion_signal);
 504
 505     init_pl180_controller(INTERNAL_AS3525);
 506     ret = sd_init_card(INTERNAL_AS3525);
 507     if(ret < 0)
 508         return ret;
 509 #ifdef HAVE_MULTIDRIVE
 510     init_pl180_controller(SD_SLOT_AS3525);
 511 #endif
 512
 513     /* init mutex */
 514     mutex_init(&sd_mtx);
 515
 516     queue_init(&sd_queue, true);
 517     create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
 518             sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
 519
 520 #ifndef BOOTLOADER
 521     sd_enabled = true;
 522     sd_enable(false);
 523 #endif
 524     return 0;
 525 }
 526
 527 #ifdef HAVE_HOTSWAP
 528 bool sd_removable(IF_MD_NONVOID(int drive))
 529 {
 530     return (drive==1);
 531 }
 532
 533 bool sd_present(IF_MD_NONVOID(int drive))
 534 {
 535     return (drive == 0) ? true : card_detect_target();
 536 }
 537 #endif /* HAVE_HOTSWAP */
 538
 539 static int sd_wait_for_state(const int drive, unsigned int state)
 540 {
 541     unsigned long response = 0;
 542     unsigned int timeout = 100; /* ticks */
 543     long t = current_tick;
 544
 545     while (1)
 546     {
 547         long tick;
 548
 549         if(!send_cmd(drive, SD_SEND_STATUS, card_info[drive].rca,
 550                     MCI_RESP|MCI_ARG, &response))
 551             return -1;
 552
 553         if (((response >> 9) & 0xf) == state)
 554             return 0;
 555
 556         if(TIME_AFTER(current_tick, t + timeout))
 557             return -2;
 558
 559         if (TIME_AFTER((tick = current_tick), next_yield))
 560         {
 561             yield();
 562             timeout += current_tick - tick;
 563             next_yield = tick + MIN_YIELD_PERIOD;
 564         }
 565     }
 566 }
 567
 568 static int sd_select_bank(signed char bank)
 569 {
 570     int ret;
 571     unsigned loops = 0;
 572
 573     do {
 574         if(loops++ > PL180_MAX_TRANSFER_ERRORS)
 575             panicf("SD bank %d error : 0x%x", bank,
 576                     transfer_error[INTERNAL_AS3525]);
 577
 578         ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
 579         if (ret < 0)
 580             return ret - 2;
 581
 582         if(!send_cmd(INTERNAL_AS3525, SD_SWITCH_FUNC, 0x80ffffef, MCI_ARG, NULL))
 583             return -1;
 584
 585         mci_delay();
 586
 587         if(!send_cmd(INTERNAL_AS3525, 35, 0, MCI_NO_FLAGS, NULL))
 588             return -2;
 589
 590         mci_delay();
 591
 592         memset(uncached_buffer, 0, 512);
 593         if(bank == -1)
 594         {   /* enable bank switching */
 595             uncached_buffer[0] = 16;
 596             uncached_buffer[1] = 1;
 597             uncached_buffer[2] = 10;
 598         }
 599         else
 600             uncached_buffer[0] = bank;
 601
 602         dma_retain();
 603         /* we don't use the uncached buffer here, because we need the
 604          * physical memory address for DMA transfers */
 605         dma_enable_channel(0, aligned_buffer, MCI_FIFO(INTERNAL_AS3525),
 606             DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8,
 607             NULL);
 608
 609         MCI_DATA_TIMER(INTERNAL_AS3525) = SD_MAX_WRITE_TIMEOUT;
 610         MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
 611         MCI_DATA_CTRL(INTERNAL_AS3525) =  (1<<0) /* enable */   |
 612                                 (0<<1) /* transfer direction */ |
 613                                 (1<<3) /* DMA */                |
 614                                 (9<<4) /* 2^9 = 512 */ ;
 615
 616         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 617
 618         /*  Wait for FIFO to empty, card may still be in PRG state  */
 619         while(MCI_STATUS(INTERNAL_AS3525) & MCI_TX_ACTIVE );
 620
 621         dma_release();
 622
 623     } while(transfer_error[INTERNAL_AS3525]);
 624
 625     card_info[INTERNAL_AS3525].current_bank = (bank == -1) ? 0 : bank;
 626
 627     return 0;
 628 }
 629
 630 static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
 631                                int count, void* buf, const bool write)
 632 {
 633 #ifndef HAVE_MULTIDRIVE
 634     const int drive = 0;
 635 #endif
 636     int ret = 0;
 637     unsigned loops = 0;
 638
 639     /* skip SanDisk OF */
 640     if (drive == INTERNAL_AS3525)
 641         start += AMS_OF_SIZE;
 642
 643     mutex_lock(&sd_mtx);
 644 #ifndef BOOTLOADER
 645     sd_enable(true);
 646     led(true);
 647 #endif
 648
 649     if (card_info[drive].initialized <= 0)
 650     {
 651         ret = sd_init_card(drive);
 652         if (!(card_info[drive].initialized))
 653             goto sd_transfer_error;
 654     }
 655
 656     last_disk_activity = current_tick;
 657
 658     dma_retain();
 659
 660     while(count)
 661     {
 662         /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
 663          * register, so we have to transfer maximum 127 sectors at a time. */
 664         unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
 665         void *dma_buf;
 666         const int cmd =
 667             write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
 668         unsigned long bank_start = start;
 669
 670         /* Only switch banks for internal storage */
 671         if(drive == INTERNAL_AS3525)
 672         {
 673             unsigned int bank = start / BLOCKS_PER_BANK; /* Current bank */
 674
 675             /* Switch bank if needed */
 676             if(card_info[INTERNAL_AS3525].current_bank != bank)
 677             {
 678                 ret = sd_select_bank(bank);
 679                 if (ret < 0)
 680                 {
 681                     ret -= 20;
 682                     goto sd_transfer_error;
 683                 }
 684             }
 685
 686             /* Adjust start block in current bank */
 687             bank_start -= bank * BLOCKS_PER_BANK;
 688
 689             /* Do not cross a bank boundary in a single transfer loop */
 690             if((transfer + bank_start) > BLOCKS_PER_BANK)
 691                 transfer = BLOCKS_PER_BANK - bank_start;
 692         }
 693
 694         dma_buf = aligned_buffer;
 695         if(transfer > UNALIGNED_NUM_SECTORS)
 696             transfer = UNALIGNED_NUM_SECTORS;
 697         if(write)
 698             memcpy(uncached_buffer, buf, transfer * SECTOR_SIZE);
 699
 700         /* Set bank_start to the correct unit (blocks or bytes) */
 701         if(!(card_info[drive].ocr & (1<<30)))   /* not SDHC */
 702             bank_start *= SD_BLOCK_SIZE;
 703
 704         ret = sd_wait_for_state(drive, SD_TRAN);
 705         if (ret < 0)
 706         {
 707             ret -= 2*20;
 708             goto sd_transfer_error;
 709         }
 710
 711         if(!send_cmd(drive, cmd, bank_start, MCI_ARG, NULL))
 712         {
 713             ret -= 3*20;
 714             goto sd_transfer_error;
 715         }
 716
 717         if(write)
 718             dma_enable_channel(0, dma_buf, MCI_FIFO(drive),
 719                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 720                 DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
 721         else
 722             dma_enable_channel(0, MCI_FIFO(drive), dma_buf,
 723                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 724                 DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
 725
 726         /* FIXME : we should check if the timeouts calculated from the card's
 727          * CSD are lower, and use them if it is the case
 728          * Note : the OF doesn't seem to use them anyway */
 729         MCI_DATA_TIMER(drive) = write ?
 730                 SD_MAX_WRITE_TIMEOUT : SD_MAX_READ_TIMEOUT;
 731         MCI_DATA_LENGTH(drive) = transfer * card_info[drive].blocksize;
 732         MCI_DATA_CTRL(drive) =  (1<<0) /* enable */                     |
 733                                 (!write<<1) /* transfer direction */    |
 734                                 (1<<3) /* DMA */                        |
 735                                 (9<<4) /* 2^9 = 512 */ ;
 736
 737
 738         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 739
 740         /*  Wait for FIFO to empty, card may still be in PRG state for writes */
 741         while(MCI_STATUS(drive) & MCI_TX_ACTIVE);
 742
 743         if(!transfer_error[drive])
 744         {
 745             if(!write)
 746                 memcpy(buf, uncached_buffer, transfer * SECTOR_SIZE);
 747             buf += transfer * SECTOR_SIZE;
 748             start += transfer;
 749             count -= transfer;
 750             loops = 0;  /* reset errors counter */
 751         }
 752         else if(loops++ > PL180_MAX_TRANSFER_ERRORS)
 753                 panicf("SD transfer error : 0x%x", transfer_error[drive]);
 754
 755         last_disk_activity = current_tick;
 756
 757         if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
 758         {
 759             ret = -4*20;
 760             goto sd_transfer_error;
 761         }
 762     }
 763
 764     ret = 0;    /* success */
 765
 766 sd_transfer_error:
 767
 768     dma_release();
 769
 770 #ifndef BOOTLOADER
 771     led(false);
 772     sd_enable(false);
 773 #endif
 774
 775     if (ret)    /* error */
 776         card_info[drive].initialized = 0;
 777
 778     mutex_unlock(&sd_mtx);
 779     return ret;
 780 }
 781
 782 int sd_read_sectors(IF_MD2(int drive,) unsigned long start, int count,
 783                      void* buf)
 784 {
 785     return sd_transfer_sectors(IF_MD2(drive,) start, count, buf, false);
 786 }
 787
 788 int sd_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
 789                      const void* buf)
 790 {
 791
 792 #ifdef BOOTLOADER /* we don't need write support in bootloader */
 793 #ifdef HAVE_MULTIDRIVE
 794     (void) drive;
 795 #endif
 796     (void) start;
 797     (void) count;
 798     (void) buf;
 799     return -1;
 800 #else
 801     return sd_transfer_sectors(IF_MD2(drive,) start, count, (void*)buf, true);
 802 #endif
 803 }
 804
 805 #ifndef BOOTLOADER
 806 long sd_last_disk_activity(void)
 807 {
 808     return last_disk_activity;
 809 }
 810
 811 void sd_enable(bool on)
 812 {
 813     /* buttonlight AMSes need a bit of special handling for the buttonlight here
 814      * due to the dual mapping of GPIOD and XPD */
 815 #if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE)
 816     extern int buttonlight_is_on;
 817 #endif
 818
 819 #ifdef HAVE_HOTSWAP
 820     static bool cpu_boosted = false;
 821 #endif
 822
 823     if (sd_enabled == on)
 824         return; /* nothing to do */
 825     if(on)
 826     {
 827         CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 828 #ifdef HAVE_MULTIDRIVE
 829         CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 830 #ifdef HAVE_BUTTON_LIGHT
 831         CCU_IO |= (1<<2);
 832         if (buttonlight_is_on)
 833             GPIOD_DIR &= ~(1<<7);
 834         else
 835             _buttonlight_off();
 836 #endif /* HAVE_BUTTON_LIGHT */
 837 #endif /* HAVE_MULTIDRIVE */
 838         CGU_IDE |= (1<<7)  /* AHB interface enable */  |
 839                    (1<<6)  /* interface enable */;
 840         sd_enabled = true;
 841
 842 #ifdef HAVE_HOTSWAP
 843         if(card_detect_target())  /* If SD card present Boost cpu for voltage */
 844         {
 845             cpu_boosted = true;
 846             cpu_boost(true);
 847         }
 848 #endif
 849     }
 850     else
 851     {
 852         CGU_PERI &= ~CGU_NAF_CLOCK_ENABLE;
 853 #ifdef HAVE_MULTIDRIVE
 854 #ifdef HAVE_BUTTON_LIGHT
 855         CCU_IO &= ~(1<<2);
 856         if (buttonlight_is_on)
 857             _buttonlight_on();
 858 #endif /* HAVE_BUTTON_LIGHT */
 859         CGU_PERI &= ~CGU_MCI_CLOCK_ENABLE;
 860 #endif /* HAVE_MULTIDRIVE */
 861         CGU_IDE &= ~((1<<7)|(1<<6));
 862         sd_enabled = false;
 863
 864 #ifdef HAVE_HOTSWAP
 865         if(cpu_boosted)
 866         {
 867             cpu_boost(false);
 868             cpu_boosted = false;
 869         }
 870 #endif
 871     }
 872 }
 873
 874 tCardInfo *card_get_info_target(int card_no)
 875 {
 876     return &card_info[card_no];
 877 }
 878
 879 bool card_detect_target(void)
 880 {
 881 #if defined(HAVE_MULTIDRIVE)
 882     return !(GPIOA_PIN(2));
 883 #else
 884     return false;
 885 #endif
 886 }
 887
 888 #ifdef HAVE_HOTSWAP
 889 void card_enable_monitoring_target(bool on)
 890 {
 891     if (on) /* enable interrupt */
 892         GPIOA_IE |= (1<<2);
 893     else    /* disable interrupt */
 894         GPIOA_IE &= ~(1<<2);
 895 }
 896 #endif /* HAVE_HOTSWAP */
 897
 898 #endif /* !BOOTLOADER */
 899
 900 #ifdef CONFIG_STORAGE_MULTI
 901 int sd_num_drives(int first_drive)
 902 {
 903     /* We don't care which logical drive number(s) we have been assigned */
 904     (void)first_drive;
 905
 906     return NUM_DRIVES;
 907 }
 908 #endif /* CONFIG_STORAGE_MULTI */