| commit | 821db0552922d1974a9ea19310181d9d437c10f9 | |
| author | Max Wang <mwang@fb.com> | |
| Fri, 11 Mar 2016 05:59:19 +0000 (10 21:59 -0800) | ||
| committer | Hhvm Bot <hhvm-bot-bot@fb.com> | |
| Fri, 11 Mar 2016 06:00:42 +0000 (10 22:00 -0800) | ||
| tree | 9b475cdd18803eb3dfa01058949c058a5068b80c | treesnapshot (tar.gz zip) |
| parent | d25b2bea4dc40dc13ad2407ba11826714c2048e5 | commitdiff |
Implement a x64-specific simplify pass for movzlq{}
Summary:On x64, we know that all l-width instructions zero the upper bits of a
64-bit dst register by default. We still have to emit movzlq{}'s after
such instructions for width-correctness, but we can reduce them down to
copies (and then copy-propagate them away).
Add a simplifier pass and a corresponding introspection routine for an
instruction's operand widths.
Reviewed By: swtaarrs
Differential Revision: D3011105
fb-gh-sync-id: d1d5c3ac76d8a12b4b19bf96531b95fcce1a4bea
shipit-source-id: d1d5c3ac76d8a12b4b19bf96531b95fcce1a4bea
Summary:On x64, we know that all l-width instructions zero the upper bits of a
64-bit dst register by default. We still have to emit movzlq{}'s after
such instructions for width-correctness, but we can reduce them down to
copies (and then copy-propagate them away).
Add a simplifier pass and a corresponding introspection routine for an
instruction's operand widths.
Reviewed By: swtaarrs
Differential Revision: D3011105
fb-gh-sync-id: d1d5c3ac76d8a12b4b19bf96531b95fcce1a4bea
shipit-source-id: d1d5c3ac76d8a12b4b19bf96531b95fcce1a4bea