ARM implementations of a few more IR opcodes

ARM implementations of a few more IR opcodes

I ran test/quick and found a whole bunch of failures due to repeated
codegen failure, meaning there are some IR opcodes that have to appear
even when everything is interp-one'd. This implements a few of those.

This entailed implementing a few core bits of infrastructure, including
smashable jumps, which you can read all about in jump-smash.cpp. I came
to this approach because the jump offsets that ARM allows are too small
for our purposes. The fact that this skirts around the delicate parts of
concurrent modification and execution is a side benefit.

I'm putting off the implementation of GuardRefs for this diff because
it's very complex and I want to investigate factoring out shared logic.
But I stopped it from punting in codegen just so execution would get a
bit further.

Reviewed By: @ottoni

Differential Revision: D1002619