| commit | cc0d77ba944cd4ce46c5f0e6d426af3057962ca5 | |
| author | Joe Ramsay <Joe.Ramsay@arm.com> | |
| Tue, 19 Dec 2023 16:44:01 +0000 (19 16:44 +0000) | ||
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | |
| Wed, 20 Dec 2023 08:41:25 +0000 (20 08:41 +0000) | ||
| tree | 840c09b10bcb0ad4f733e8cb4bce2acbd92e5945 | treesnapshot (tar.gz zip) |
| parent | 3150cc0c9019bf9da841419f86dda8e7f26d676d | commitdiff |
aarch64: Add half-width versions of AdvSIMD f32 libmvec routines
Compilers may emit calls to 'half-width' routines (two-lane
single-precision variants). These have been added in the form of
wrappers around the full-width versions, where the low half of the
vector is simply duplicated. This will perform poorly when one lane
triggers the special-case handler, as there will be a redundant call
to the scalar version, however this is expected to be rare at Ofast.
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Compilers may emit calls to 'half-width' routines (two-lane
single-precision variants). These have been added in the form of
wrappers around the full-width versions, where the low half of the
vector is simply duplicated. This will perform poorly when one lane
triggers the special-case handler, as there will be a redundant call
to the scalar version, however this is expected to be rare at Ofast.
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
20 files changed: