| commit | bd394d131c10c9ec22c6424197b79410042eed99 | |
| author | Wilco Dijkstra <wdijkstr@arm.com> | |
| Fri, 28 Aug 2020 16:51:40 +0000 (28 17:51 +0100) | ||
| committer | Wilco Dijkstra <wdijkstr@arm.com> | |
| Fri, 28 Aug 2020 16:51:40 +0000 (28 17:51 +0100) | ||
| tree | a50e1b4a3bd0a4cbc610c1f0ef7d7d8119f4ed6a | treesnapshot (tar.gz zip) |
| parent | 567b1705017a0876b1cf9661a20521ef1e4ddc54 | commitdiff |
AArch64: Improve backwards memmove performance
On some microarchitectures performance of the backwards memmove improves if
the stores use STR with decreasing addresses. So change the memmove loop
in memcpy_advsimd.S to use 2x STR rather than STP.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
On some microarchitectures performance of the backwards memmove improves if
the stores use STR with decreasing addresses. So change the memmove loop
in memcpy_advsimd.S to use 2x STR rather than STP.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
| sysdeps/aarch64/multiarch/memcpy_advsimd.S | diffblobblamehistory |