x86_64: Exclude SSE, AVX and FMA4 variants in libm multiarch
commit9f78a7c1d0963282608da836b840f0d5ae1c478e
authorSunil K Pandey <skpgkp2@gmail.com>
Tue, 13 Feb 2024 20:23:14 +0000 (13 12:23 -0800)
committerSunil K Pandey <skpgkp2@gmail.com>
Sun, 25 Feb 2024 21:20:51 +0000 (25 13:20 -0800)
treebb6e79f075d7fbc5b2b6e39d4551f8a8b0dda332
parentf31d677fd69fb68c8b7a3c4cdaa6e9a1bd46d6a4
x86_64: Exclude SSE, AVX and FMA4 variants in libm multiarch

When glibc is built with ISA level 3 or higher by default, the resulting
glibc binaries won't run on SSE or FMA4 processors.  Exclude SSE, AVX and
FMA4 variants in libm multiarch when ISA level 3 or higher is enabled by
default.

When glibc is built with ISA level 2 enabled by default, only keep SSE4.1
variant.

Fixes BZ 31335.

NB: elf/tst-valgrind-smoke test fails with ISA level 4, because valgrind
doesn't support AVX512 instructions:

https://bugs.kde.org/show_bug.cgi?id=383010

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
62 files changed:
sysdeps/x86/configure
sysdeps/x86/configure.ac
sysdeps/x86_64/fpu/multiarch/Makefile
sysdeps/x86_64/fpu/multiarch/e_asin.c
sysdeps/x86_64/fpu/multiarch/e_atan2.c
sysdeps/x86_64/fpu/multiarch/e_exp.c
sysdeps/x86_64/fpu/multiarch/e_exp2f.c
sysdeps/x86_64/fpu/multiarch/e_expf.c
sysdeps/x86_64/fpu/multiarch/e_log.c
sysdeps/x86_64/fpu/multiarch/e_log2.c
sysdeps/x86_64/fpu/multiarch/e_log2f.c
sysdeps/x86_64/fpu/multiarch/e_logf.c
sysdeps/x86_64/fpu/multiarch/e_pow.c
sysdeps/x86_64/fpu/multiarch/e_powf.c
sysdeps/x86_64/fpu/multiarch/s_atan.c
sysdeps/x86_64/fpu/multiarch/s_ceil-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S with 77% similarity]
sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_ceil.c
sysdeps/x86_64/fpu/multiarch/s_ceilf-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S with 76% similarity]
sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_ceilf.c
sysdeps/x86_64/fpu/multiarch/s_cosf.c
sysdeps/x86_64/fpu/multiarch/s_expm1.c
sysdeps/x86_64/fpu/multiarch/s_floor-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S with 76% similarity]
sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_floor.c
sysdeps/x86_64/fpu/multiarch/s_floorf-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S with 76% similarity]
sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_floorf.c
sysdeps/x86_64/fpu/multiarch/s_log1p.c
sysdeps/x86_64/fpu/multiarch/s_nearbyint-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S with 75% similarity]
sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_nearbyint.c
sysdeps/x86_64/fpu/multiarch/s_nearbyintf-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S with 75% similarity]
sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c
sysdeps/x86_64/fpu/multiarch/s_rint-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S with 77% similarity]
sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_rint.c
sysdeps/x86_64/fpu/multiarch/s_rintf-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S with 77% similarity]
sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_rintf.c
sysdeps/x86_64/fpu/multiarch/s_roundeven-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S with 75% similarity]
sysdeps/x86_64/fpu/multiarch/s_roundeven-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_roundeven.c
sysdeps/x86_64/fpu/multiarch/s_roundevenf-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S with 75% similarity]
sysdeps/x86_64/fpu/multiarch/s_roundevenf-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_roundevenf.c
sysdeps/x86_64/fpu/multiarch/s_sin.c
sysdeps/x86_64/fpu/multiarch/s_sincos.c
sysdeps/x86_64/fpu/multiarch/s_sincosf.c
sysdeps/x86_64/fpu/multiarch/s_sinf.c
sysdeps/x86_64/fpu/multiarch/s_tan.c
sysdeps/x86_64/fpu/multiarch/s_trunc-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S with 76% similarity]
sysdeps/x86_64/fpu/multiarch/s_trunc-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_trunc.c
sysdeps/x86_64/fpu/multiarch/s_truncf-avx.S [copied from sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S with 76% similarity]
sysdeps/x86_64/fpu/multiarch/s_truncf-sse4_1.S
sysdeps/x86_64/fpu/multiarch/s_truncf.c
sysdeps/x86_64/fpu/multiarch/w_exp.c
sysdeps/x86_64/fpu/multiarch/w_log.c
sysdeps/x86_64/fpu/multiarch/w_pow.c