| commit | 5a4b6f8e4b7e2a76c71b713200a80181d745c93d | |
| author | Joe Ramsay <Joe.Ramsay@arm.com> | |
| Wed, 4 Oct 2023 09:38:57 +0000 (4 10:38 +0100) | ||
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | |
| Thu, 5 Oct 2023 15:54:16 +0000 (5 16:54 +0100) | ||
| tree | 4d5e092d4e36c23497c9174531394c89342d32c4 | treesnapshot (tar.gz zip) |
| parent | 480a0dfe1acab3dbf1bdcfa37fdca992eb9c54a5 | commitdiff |
aarch64: Optimise vecmath logs
* Transpose table layout for improved memory access
* Use half-vector special comparisons for AdvSIMD
* Improve register use near special-case branches
- Due to the presence of a function call, return value would get
mov-d out of x0 in order to facilitate PCS. By moving the final
computation after the branch this can be avoided
Also change SVE routines to use overloaded intrinsics for readability.
* Transpose table layout for improved memory access
* Use half-vector special comparisons for AdvSIMD
* Improve register use near special-case branches
- Due to the presence of a function call, return value would get
mov-d out of x0 in order to facilitate PCS. By moving the final
computation after the branch this can be avoided
Also change SVE routines to use overloaded intrinsics for readability.