Correct cacheline size to 32-bytes for ppc405 memset.S (bug 14595).
commit09dec6c37e3cd967f62795320703647f24545e3e
authorRyan S. Arnold <rsa@linux.vnet.ibm.com>
Tue, 30 Oct 2012 22:07:18 +0000 (30 17:07 -0500)
committerRyan S. Arnold <rsa@linux.vnet.ibm.com>
Tue, 30 Oct 2012 22:07:18 +0000 (30 17:07 -0500)
tree78b5597c0aa457682a6215382022348ec87d07c5
parent9f45bfe790a59bfc072ef096b21dc701e03bccf9
Correct cacheline size to 32-bytes for ppc405 memset.S (bug 14595).

This patch also creates a version of memset.S for the ppc476 processor
which uses a 128-byte cacheline size for dcbz insns.
NEWS
ports/ChangeLog.powerpc
ports/sysdeps/powerpc/powerpc32/405/memset.S
ports/sysdeps/powerpc/powerpc32/476/memset.S [copied from ports/sysdeps/powerpc/powerpc32/405/memset.S with 98% similarity]