aarch64/fpu: Add vector variants of cosh
[glibc.git] / sysdeps / aarch64 / fpu / bits / math-vector.h
blob8ca55098706a54c2db75c48eaf264b696cff4e4a
1 /* Platform-specific SIMD declarations of math functions.
3 Copyright (C) 2023-2024 Free Software Foundation, Inc.
4 This file is part of the GNU C Library.
6 The GNU C Library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
16 You should have received a copy of the GNU Lesser General Public
17 License along with the GNU C Library; if not, see
18 <https://www.gnu.org/licenses/>. */
20 #ifndef _MATH_H
21 # error "Never include <bits/math-vector.h> directly;\
22 include <math.h> instead."
23 #endif
25 /* Get default empty definitions for simd declarations. */
26 #include <bits/libm-simd-decl-stubs.h>
28 #if defined __aarch64__ && defined __FAST_MATH__ && __GNUC_PREREQ (6, 0)
29 /* Requires GCC >= 6 for __attribute__ ((__simd__)). */
30 # define __DECL_SIMD_aarch64 __attribute__ ((__simd__ ("notinbranch"), const))
32 # undef __DECL_SIMD_acos
33 # define __DECL_SIMD_acos __DECL_SIMD_aarch64
34 # undef __DECL_SIMD_acosf
35 # define __DECL_SIMD_acosf __DECL_SIMD_aarch64
36 # undef __DECL_SIMD_asin
37 # define __DECL_SIMD_asin __DECL_SIMD_aarch64
38 # undef __DECL_SIMD_asinf
39 # define __DECL_SIMD_asinf __DECL_SIMD_aarch64
40 # undef __DECL_SIMD_atan
41 # define __DECL_SIMD_atan __DECL_SIMD_aarch64
42 # undef __DECL_SIMD_atanf
43 # define __DECL_SIMD_atanf __DECL_SIMD_aarch64
44 # undef __DECL_SIMD_atan2
45 # define __DECL_SIMD_atan2 __DECL_SIMD_aarch64
46 # undef __DECL_SIMD_atan2f
47 # define __DECL_SIMD_atan2f __DECL_SIMD_aarch64
48 # undef __DECL_SIMD_cos
49 # define __DECL_SIMD_cos __DECL_SIMD_aarch64
50 # undef __DECL_SIMD_cosf
51 # define __DECL_SIMD_cosf __DECL_SIMD_aarch64
52 # undef __DECL_SIMD_cosh
53 # define __DECL_SIMD_cosh __DECL_SIMD_aarch64
54 # undef __DECL_SIMD_coshf
55 # define __DECL_SIMD_coshf __DECL_SIMD_aarch64
56 # undef __DECL_SIMD_erf
57 # define __DECL_SIMD_erf __DECL_SIMD_aarch64
58 # undef __DECL_SIMD_erff
59 # define __DECL_SIMD_erff __DECL_SIMD_aarch64
60 # undef __DECL_SIMD_exp
61 # define __DECL_SIMD_exp __DECL_SIMD_aarch64
62 # undef __DECL_SIMD_expf
63 # define __DECL_SIMD_expf __DECL_SIMD_aarch64
64 # undef __DECL_SIMD_exp10
65 # define __DECL_SIMD_exp10 __DECL_SIMD_aarch64
66 # undef __DECL_SIMD_exp10f
67 # define __DECL_SIMD_exp10f __DECL_SIMD_aarch64
68 # undef __DECL_SIMD_exp2
69 # define __DECL_SIMD_exp2 __DECL_SIMD_aarch64
70 # undef __DECL_SIMD_exp2f
71 # define __DECL_SIMD_exp2f __DECL_SIMD_aarch64
72 # undef __DECL_SIMD_expm1
73 # define __DECL_SIMD_expm1 __DECL_SIMD_aarch64
74 # undef __DECL_SIMD_expm1f
75 # define __DECL_SIMD_expm1f __DECL_SIMD_aarch64
76 # undef __DECL_SIMD_log
77 # define __DECL_SIMD_log __DECL_SIMD_aarch64
78 # undef __DECL_SIMD_logf
79 # define __DECL_SIMD_logf __DECL_SIMD_aarch64
80 # undef __DECL_SIMD_log10
81 # define __DECL_SIMD_log10 __DECL_SIMD_aarch64
82 # undef __DECL_SIMD_log10f
83 # define __DECL_SIMD_log10f __DECL_SIMD_aarch64
84 # undef __DECL_SIMD_log1p
85 # define __DECL_SIMD_log1p __DECL_SIMD_aarch64
86 # undef __DECL_SIMD_log1pf
87 # define __DECL_SIMD_log1pf __DECL_SIMD_aarch64
88 # undef __DECL_SIMD_log2
89 # define __DECL_SIMD_log2 __DECL_SIMD_aarch64
90 # undef __DECL_SIMD_log2f
91 # define __DECL_SIMD_log2f __DECL_SIMD_aarch64
92 # undef __DECL_SIMD_sin
93 # define __DECL_SIMD_sin __DECL_SIMD_aarch64
94 # undef __DECL_SIMD_sinf
95 # define __DECL_SIMD_sinf __DECL_SIMD_aarch64
96 # undef __DECL_SIMD_tan
97 # define __DECL_SIMD_tan __DECL_SIMD_aarch64
98 # undef __DECL_SIMD_tanf
99 # define __DECL_SIMD_tanf __DECL_SIMD_aarch64
100 #endif
102 #if __GNUC_PREREQ(9, 0)
103 # define __ADVSIMD_VEC_MATH_SUPPORTED
104 typedef __Float32x4_t __f32x4_t;
105 typedef __Float64x2_t __f64x2_t;
106 #elif __glibc_clang_prereq(8, 0)
107 # define __ADVSIMD_VEC_MATH_SUPPORTED
108 typedef __attribute__ ((__neon_vector_type__ (4))) float __f32x4_t;
109 typedef __attribute__ ((__neon_vector_type__ (2))) double __f64x2_t;
110 #endif
112 #if __GNUC_PREREQ(10, 0) || __glibc_clang_prereq(11, 0)
113 # define __SVE_VEC_MATH_SUPPORTED
114 typedef __SVFloat32_t __sv_f32_t;
115 typedef __SVFloat64_t __sv_f64_t;
116 typedef __SVBool_t __sv_bool_t;
117 #endif
119 /* If vector types and vector PCS are unsupported in the working
120 compiler, no choice but to omit vector math declarations. */
122 #ifdef __ADVSIMD_VEC_MATH_SUPPORTED
124 # define __vpcs __attribute__ ((__aarch64_vector_pcs__))
126 __vpcs __f32x4_t _ZGVnN4vv_atan2f (__f32x4_t, __f32x4_t);
127 __vpcs __f32x4_t _ZGVnN4v_acosf (__f32x4_t);
128 __vpcs __f32x4_t _ZGVnN4v_asinf (__f32x4_t);
129 __vpcs __f32x4_t _ZGVnN4v_atanf (__f32x4_t);
130 __vpcs __f32x4_t _ZGVnN4v_cosf (__f32x4_t);
131 __vpcs __f32x4_t _ZGVnN4v_coshf (__f32x4_t);
132 __vpcs __f32x4_t _ZGVnN4v_erff (__f32x4_t);
133 __vpcs __f32x4_t _ZGVnN4v_expf (__f32x4_t);
134 __vpcs __f32x4_t _ZGVnN4v_exp10f (__f32x4_t);
135 __vpcs __f32x4_t _ZGVnN4v_exp2f (__f32x4_t);
136 __vpcs __f32x4_t _ZGVnN4v_expm1f (__f32x4_t);
137 __vpcs __f32x4_t _ZGVnN4v_logf (__f32x4_t);
138 __vpcs __f32x4_t _ZGVnN4v_log10f (__f32x4_t);
139 __vpcs __f32x4_t _ZGVnN4v_log1pf (__f32x4_t);
140 __vpcs __f32x4_t _ZGVnN4v_log2f (__f32x4_t);
141 __vpcs __f32x4_t _ZGVnN4v_sinf (__f32x4_t);
142 __vpcs __f32x4_t _ZGVnN4v_tanf (__f32x4_t);
144 __vpcs __f64x2_t _ZGVnN2vv_atan2 (__f64x2_t, __f64x2_t);
145 __vpcs __f64x2_t _ZGVnN2v_acos (__f64x2_t);
146 __vpcs __f64x2_t _ZGVnN2v_asin (__f64x2_t);
147 __vpcs __f64x2_t _ZGVnN2v_atan (__f64x2_t);
148 __vpcs __f64x2_t _ZGVnN2v_cos (__f64x2_t);
149 __vpcs __f64x2_t _ZGVnN2v_cosh (__f64x2_t);
150 __vpcs __f64x2_t _ZGVnN2v_erf (__f64x2_t);
151 __vpcs __f64x2_t _ZGVnN2v_exp (__f64x2_t);
152 __vpcs __f64x2_t _ZGVnN2v_exp10 (__f64x2_t);
153 __vpcs __f64x2_t _ZGVnN2v_exp2 (__f64x2_t);
154 __vpcs __f64x2_t _ZGVnN2v_expm1 (__f64x2_t);
155 __vpcs __f64x2_t _ZGVnN2v_log (__f64x2_t);
156 __vpcs __f64x2_t _ZGVnN2v_log10 (__f64x2_t);
157 __vpcs __f64x2_t _ZGVnN2v_log1p (__f64x2_t);
158 __vpcs __f64x2_t _ZGVnN2v_log2 (__f64x2_t);
159 __vpcs __f64x2_t _ZGVnN2v_sin (__f64x2_t);
160 __vpcs __f64x2_t _ZGVnN2v_tan (__f64x2_t);
162 # undef __ADVSIMD_VEC_MATH_SUPPORTED
163 #endif /* __ADVSIMD_VEC_MATH_SUPPORTED */
165 #ifdef __SVE_VEC_MATH_SUPPORTED
167 __sv_f32_t _ZGVsMxvv_atan2f (__sv_f32_t, __sv_f32_t, __sv_bool_t);
168 __sv_f32_t _ZGVsMxv_acosf (__sv_f32_t, __sv_bool_t);
169 __sv_f32_t _ZGVsMxv_asinf (__sv_f32_t, __sv_bool_t);
170 __sv_f32_t _ZGVsMxv_atanf (__sv_f32_t, __sv_bool_t);
171 __sv_f32_t _ZGVsMxv_cosf (__sv_f32_t, __sv_bool_t);
172 __sv_f32_t _ZGVsMxv_coshf (__sv_f32_t, __sv_bool_t);
173 __sv_f32_t _ZGVsMxv_erff (__sv_f32_t, __sv_bool_t);
174 __sv_f32_t _ZGVsMxv_expf (__sv_f32_t, __sv_bool_t);
175 __sv_f32_t _ZGVsMxv_exp10f (__sv_f32_t, __sv_bool_t);
176 __sv_f32_t _ZGVsMxv_exp2f (__sv_f32_t, __sv_bool_t);
177 __sv_f32_t _ZGVsMxv_expm1f (__sv_f32_t, __sv_bool_t);
178 __sv_f32_t _ZGVsMxv_logf (__sv_f32_t, __sv_bool_t);
179 __sv_f32_t _ZGVsMxv_log10f (__sv_f32_t, __sv_bool_t);
180 __sv_f32_t _ZGVsMxv_log1pf (__sv_f32_t, __sv_bool_t);
181 __sv_f32_t _ZGVsMxv_log2f (__sv_f32_t, __sv_bool_t);
182 __sv_f32_t _ZGVsMxv_sinf (__sv_f32_t, __sv_bool_t);
183 __sv_f32_t _ZGVsMxv_tanf (__sv_f32_t, __sv_bool_t);
185 __sv_f64_t _ZGVsMxvv_atan2 (__sv_f64_t, __sv_f64_t, __sv_bool_t);
186 __sv_f64_t _ZGVsMxv_acos (__sv_f64_t, __sv_bool_t);
187 __sv_f64_t _ZGVsMxv_asin (__sv_f64_t, __sv_bool_t);
188 __sv_f64_t _ZGVsMxv_atan (__sv_f64_t, __sv_bool_t);
189 __sv_f64_t _ZGVsMxv_cos (__sv_f64_t, __sv_bool_t);
190 __sv_f64_t _ZGVsMxv_cosh (__sv_f64_t, __sv_bool_t);
191 __sv_f64_t _ZGVsMxv_erf (__sv_f64_t, __sv_bool_t);
192 __sv_f64_t _ZGVsMxv_exp (__sv_f64_t, __sv_bool_t);
193 __sv_f64_t _ZGVsMxv_exp10 (__sv_f64_t, __sv_bool_t);
194 __sv_f64_t _ZGVsMxv_exp2 (__sv_f64_t, __sv_bool_t);
195 __sv_f64_t _ZGVsMxv_expm1 (__sv_f64_t, __sv_bool_t);
196 __sv_f64_t _ZGVsMxv_log (__sv_f64_t, __sv_bool_t);
197 __sv_f64_t _ZGVsMxv_log10 (__sv_f64_t, __sv_bool_t);
198 __sv_f64_t _ZGVsMxv_log1p (__sv_f64_t, __sv_bool_t);
199 __sv_f64_t _ZGVsMxv_log2 (__sv_f64_t, __sv_bool_t);
200 __sv_f64_t _ZGVsMxv_sin (__sv_f64_t, __sv_bool_t);
201 __sv_f64_t _ZGVsMxv_tan (__sv_f64_t, __sv_bool_t);
203 # undef __SVE_VEC_MATH_SUPPORTED
204 #endif /* __SVE_VEC_MATH_SUPPORTED */