Correct rendering and connectivity checks for zero clearance pads and pins
commitfaae5572e9742bd0a8a846a9c94963f486c37b5e
authorPeter Clifton <pcjc2@cam.ac.uk>
Thu, 12 Nov 2009 01:29:37 +0000 (12 01:29 +0000)
committerPeter Clifton <pcjc2@cam.ac.uk>
Thu, 12 Nov 2009 01:29:37 +0000 (12 01:29 +0000)
tree075419c457ea7233ce4130c114791ed79d87ef7c
parent086aa491fae18f1ec72da047b772fa3510f72d0b
Correct rendering and connectivity checks for zero clearance pads and pins

NB: These areren't technically allowed by PCB, but it is nice that when a
user hacks zero clearance in their PCB file, that we:

a) Draw polygons without any cleared gaps in the output
b) Correctly determine that these objects will be connected to the polygon
src/draw.c
src/find.c
src/polygon.c