ALSA: oxygen: support for period wakeup disabling
[firewire-audio.git] / drivers / block / cciss.c
blob2cc4dda462794a3b2f304b0590880237511505b6
1 /*
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/major.h>
31 #include <linux/fs.h>
32 #include <linux/bio.h>
33 #include <linux/blkpg.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/init.h>
38 #include <linux/jiffies.h>
39 #include <linux/hdreg.h>
40 #include <linux/spinlock.h>
41 #include <linux/compat.h>
42 #include <linux/mutex.h>
43 #include <asm/uaccess.h>
44 #include <asm/io.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/blkdev.h>
48 #include <linux/genhd.h>
49 #include <linux/completion.h>
50 #include <scsi/scsi.h>
51 #include <scsi/sg.h>
52 #include <scsi/scsi_ioctl.h>
53 #include <linux/cdrom.h>
54 #include <linux/scatterlist.h>
55 #include <linux/kthread.h>
57 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
58 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
61 /* Embedded module documentation macros - see modules.h */
62 MODULE_AUTHOR("Hewlett-Packard Company");
63 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
64 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65 MODULE_VERSION("3.6.26");
66 MODULE_LICENSE("GPL");
68 static DEFINE_MUTEX(cciss_mutex);
70 #include "cciss_cmd.h"
71 #include "cciss.h"
72 #include <linux/cciss_ioctl.h>
74 /* define the PCI info for the cards we can control */
75 static const struct pci_device_id cciss_pci_device_id[] = {
76 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
77 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
78 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
79 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
80 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
96 {0,}
99 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
101 /* board_id = Subsystem Device ID & Vendor ID
102 * product = Marketing Name for the board
103 * access = Address of the struct of function pointers
105 static struct board_type products[] = {
106 {0x40700E11, "Smart Array 5300", &SA5_access},
107 {0x40800E11, "Smart Array 5i", &SA5B_access},
108 {0x40820E11, "Smart Array 532", &SA5B_access},
109 {0x40830E11, "Smart Array 5312", &SA5B_access},
110 {0x409A0E11, "Smart Array 641", &SA5_access},
111 {0x409B0E11, "Smart Array 642", &SA5_access},
112 {0x409C0E11, "Smart Array 6400", &SA5_access},
113 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
114 {0x40910E11, "Smart Array 6i", &SA5_access},
115 {0x3225103C, "Smart Array P600", &SA5_access},
116 {0x3235103C, "Smart Array P400i", &SA5_access},
117 {0x3211103C, "Smart Array E200i", &SA5_access},
118 {0x3212103C, "Smart Array E200", &SA5_access},
119 {0x3213103C, "Smart Array E200i", &SA5_access},
120 {0x3214103C, "Smart Array E200i", &SA5_access},
121 {0x3215103C, "Smart Array E200i", &SA5_access},
122 {0x3237103C, "Smart Array E500", &SA5_access},
123 {0x3223103C, "Smart Array P800", &SA5_access},
124 {0x3234103C, "Smart Array P400", &SA5_access},
125 {0x323D103C, "Smart Array P700m", &SA5_access},
128 /* How long to wait (in milliseconds) for board to go into simple mode */
129 #define MAX_CONFIG_WAIT 30000
130 #define MAX_IOCTL_CONFIG_WAIT 1000
132 /*define how many times we will try a command because of bus resets */
133 #define MAX_CMD_RETRIES 3
135 #define MAX_CTLR 32
137 /* Originally cciss driver only supports 8 major numbers */
138 #define MAX_CTLR_ORIG 8
140 static ctlr_info_t *hba[MAX_CTLR];
142 static struct task_struct *cciss_scan_thread;
143 static DEFINE_MUTEX(scan_mutex);
144 static LIST_HEAD(scan_q);
146 static void do_cciss_request(struct request_queue *q);
147 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
148 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
149 static int cciss_open(struct block_device *bdev, fmode_t mode);
150 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
151 static int cciss_release(struct gendisk *disk, fmode_t mode);
152 static int do_ioctl(struct block_device *bdev, fmode_t mode,
153 unsigned int cmd, unsigned long arg);
154 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
155 unsigned int cmd, unsigned long arg);
156 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
158 static int cciss_revalidate(struct gendisk *disk);
159 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
160 static int deregister_disk(ctlr_info_t *h, int drv_index,
161 int clear_all, int via_ioctl);
163 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
164 sector_t *total_size, unsigned int *block_size);
165 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
166 sector_t *total_size, unsigned int *block_size);
167 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
168 sector_t total_size,
169 unsigned int block_size, InquiryData_struct *inq_buff,
170 drive_info_struct *drv);
171 static void __devinit cciss_interrupt_mode(ctlr_info_t *);
172 static void start_io(ctlr_info_t *h);
173 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
174 __u8 page_code, unsigned char scsi3addr[],
175 int cmd_type);
176 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
177 int attempt_retry);
178 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
180 static int add_to_scan_list(struct ctlr_info *h);
181 static int scan_thread(void *data);
182 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
183 static void cciss_hba_release(struct device *dev);
184 static void cciss_device_release(struct device *dev);
185 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
186 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
187 static inline u32 next_command(ctlr_info_t *h);
188 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
189 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
190 u64 *cfg_offset);
191 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
192 unsigned long *memory_bar);
195 /* performant mode helper functions */
196 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
197 int *bucket_map);
198 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
200 #ifdef CONFIG_PROC_FS
201 static void cciss_procinit(ctlr_info_t *h);
202 #else
203 static void cciss_procinit(ctlr_info_t *h)
206 #endif /* CONFIG_PROC_FS */
208 #ifdef CONFIG_COMPAT
209 static int cciss_compat_ioctl(struct block_device *, fmode_t,
210 unsigned, unsigned long);
211 #endif
213 static const struct block_device_operations cciss_fops = {
214 .owner = THIS_MODULE,
215 .open = cciss_unlocked_open,
216 .release = cciss_release,
217 .ioctl = do_ioctl,
218 .getgeo = cciss_getgeo,
219 #ifdef CONFIG_COMPAT
220 .compat_ioctl = cciss_compat_ioctl,
221 #endif
222 .revalidate_disk = cciss_revalidate,
225 /* set_performant_mode: Modify the tag for cciss performant
226 * set bit 0 for pull model, bits 3-1 for block fetch
227 * register number
229 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
231 if (likely(h->transMethod == CFGTBL_Trans_Performant))
232 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
236 * Enqueuing and dequeuing functions for cmdlists.
238 static inline void addQ(struct hlist_head *list, CommandList_struct *c)
240 hlist_add_head(&c->list, list);
243 static inline void removeQ(CommandList_struct *c)
246 * After kexec/dump some commands might still
247 * be in flight, which the firmware will try
248 * to complete. Resetting the firmware doesn't work
249 * with old fw revisions, so we have to mark
250 * them off as 'stale' to prevent the driver from
251 * falling over.
253 if (WARN_ON(hlist_unhashed(&c->list))) {
254 c->cmd_type = CMD_MSG_STALE;
255 return;
258 hlist_del_init(&c->list);
261 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
262 CommandList_struct *c)
264 unsigned long flags;
265 set_performant_mode(h, c);
266 spin_lock_irqsave(&h->lock, flags);
267 addQ(&h->reqQ, c);
268 h->Qdepth++;
269 if (h->Qdepth > h->maxQsinceinit)
270 h->maxQsinceinit = h->Qdepth;
271 start_io(h);
272 spin_unlock_irqrestore(&h->lock, flags);
275 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
276 int nr_cmds)
278 int i;
280 if (!cmd_sg_list)
281 return;
282 for (i = 0; i < nr_cmds; i++) {
283 kfree(cmd_sg_list[i]);
284 cmd_sg_list[i] = NULL;
286 kfree(cmd_sg_list);
289 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
290 ctlr_info_t *h, int chainsize, int nr_cmds)
292 int j;
293 SGDescriptor_struct **cmd_sg_list;
295 if (chainsize <= 0)
296 return NULL;
298 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
299 if (!cmd_sg_list)
300 return NULL;
302 /* Build up chain blocks for each command */
303 for (j = 0; j < nr_cmds; j++) {
304 /* Need a block of chainsized s/g elements. */
305 cmd_sg_list[j] = kmalloc((chainsize *
306 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
307 if (!cmd_sg_list[j]) {
308 dev_err(&h->pdev->dev, "Cannot get memory "
309 "for s/g chains.\n");
310 goto clean;
313 return cmd_sg_list;
314 clean:
315 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
316 return NULL;
319 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
321 SGDescriptor_struct *chain_sg;
322 u64bit temp64;
324 if (c->Header.SGTotal <= h->max_cmd_sgentries)
325 return;
327 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
328 temp64.val32.lower = chain_sg->Addr.lower;
329 temp64.val32.upper = chain_sg->Addr.upper;
330 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
333 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
334 SGDescriptor_struct *chain_block, int len)
336 SGDescriptor_struct *chain_sg;
337 u64bit temp64;
339 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
340 chain_sg->Ext = CCISS_SG_CHAIN;
341 chain_sg->Len = len;
342 temp64.val = pci_map_single(h->pdev, chain_block, len,
343 PCI_DMA_TODEVICE);
344 chain_sg->Addr.lower = temp64.val32.lower;
345 chain_sg->Addr.upper = temp64.val32.upper;
348 #include "cciss_scsi.c" /* For SCSI tape support */
350 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
351 "UNKNOWN"
353 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
355 #ifdef CONFIG_PROC_FS
358 * Report information about this controller.
360 #define ENG_GIG 1000000000
361 #define ENG_GIG_FACTOR (ENG_GIG/512)
362 #define ENGAGE_SCSI "engage scsi"
364 static struct proc_dir_entry *proc_cciss;
366 static void cciss_seq_show_header(struct seq_file *seq)
368 ctlr_info_t *h = seq->private;
370 seq_printf(seq, "%s: HP %s Controller\n"
371 "Board ID: 0x%08lx\n"
372 "Firmware Version: %c%c%c%c\n"
373 "IRQ: %d\n"
374 "Logical drives: %d\n"
375 "Current Q depth: %d\n"
376 "Current # commands on controller: %d\n"
377 "Max Q depth since init: %d\n"
378 "Max # commands on controller since init: %d\n"
379 "Max SG entries since init: %d\n",
380 h->devname,
381 h->product_name,
382 (unsigned long)h->board_id,
383 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
384 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
385 h->num_luns,
386 h->Qdepth, h->commands_outstanding,
387 h->maxQsinceinit, h->max_outstanding, h->maxSG);
389 #ifdef CONFIG_CISS_SCSI_TAPE
390 cciss_seq_tape_report(seq, h);
391 #endif /* CONFIG_CISS_SCSI_TAPE */
394 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
396 ctlr_info_t *h = seq->private;
397 unsigned long flags;
399 /* prevent displaying bogus info during configuration
400 * or deconfiguration of a logical volume
402 spin_lock_irqsave(&h->lock, flags);
403 if (h->busy_configuring) {
404 spin_unlock_irqrestore(&h->lock, flags);
405 return ERR_PTR(-EBUSY);
407 h->busy_configuring = 1;
408 spin_unlock_irqrestore(&h->lock, flags);
410 if (*pos == 0)
411 cciss_seq_show_header(seq);
413 return pos;
416 static int cciss_seq_show(struct seq_file *seq, void *v)
418 sector_t vol_sz, vol_sz_frac;
419 ctlr_info_t *h = seq->private;
420 unsigned ctlr = h->ctlr;
421 loff_t *pos = v;
422 drive_info_struct *drv = h->drv[*pos];
424 if (*pos > h->highest_lun)
425 return 0;
427 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
428 return 0;
430 if (drv->heads == 0)
431 return 0;
433 vol_sz = drv->nr_blocks;
434 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
435 vol_sz_frac *= 100;
436 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
438 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
439 drv->raid_level = RAID_UNKNOWN;
440 seq_printf(seq, "cciss/c%dd%d:"
441 "\t%4u.%02uGB\tRAID %s\n",
442 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
443 raid_label[drv->raid_level]);
444 return 0;
447 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
449 ctlr_info_t *h = seq->private;
451 if (*pos > h->highest_lun)
452 return NULL;
453 *pos += 1;
455 return pos;
458 static void cciss_seq_stop(struct seq_file *seq, void *v)
460 ctlr_info_t *h = seq->private;
462 /* Only reset h->busy_configuring if we succeeded in setting
463 * it during cciss_seq_start. */
464 if (v == ERR_PTR(-EBUSY))
465 return;
467 h->busy_configuring = 0;
470 static const struct seq_operations cciss_seq_ops = {
471 .start = cciss_seq_start,
472 .show = cciss_seq_show,
473 .next = cciss_seq_next,
474 .stop = cciss_seq_stop,
477 static int cciss_seq_open(struct inode *inode, struct file *file)
479 int ret = seq_open(file, &cciss_seq_ops);
480 struct seq_file *seq = file->private_data;
482 if (!ret)
483 seq->private = PDE(inode)->data;
485 return ret;
488 static ssize_t
489 cciss_proc_write(struct file *file, const char __user *buf,
490 size_t length, loff_t *ppos)
492 int err;
493 char *buffer;
495 #ifndef CONFIG_CISS_SCSI_TAPE
496 return -EINVAL;
497 #endif
499 if (!buf || length > PAGE_SIZE - 1)
500 return -EINVAL;
502 buffer = (char *)__get_free_page(GFP_KERNEL);
503 if (!buffer)
504 return -ENOMEM;
506 err = -EFAULT;
507 if (copy_from_user(buffer, buf, length))
508 goto out;
509 buffer[length] = '\0';
511 #ifdef CONFIG_CISS_SCSI_TAPE
512 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
513 struct seq_file *seq = file->private_data;
514 ctlr_info_t *h = seq->private;
516 err = cciss_engage_scsi(h);
517 if (err == 0)
518 err = length;
519 } else
520 #endif /* CONFIG_CISS_SCSI_TAPE */
521 err = -EINVAL;
522 /* might be nice to have "disengage" too, but it's not
523 safely possible. (only 1 module use count, lock issues.) */
525 out:
526 free_page((unsigned long)buffer);
527 return err;
530 static const struct file_operations cciss_proc_fops = {
531 .owner = THIS_MODULE,
532 .open = cciss_seq_open,
533 .read = seq_read,
534 .llseek = seq_lseek,
535 .release = seq_release,
536 .write = cciss_proc_write,
539 static void __devinit cciss_procinit(ctlr_info_t *h)
541 struct proc_dir_entry *pde;
543 if (proc_cciss == NULL)
544 proc_cciss = proc_mkdir("driver/cciss", NULL);
545 if (!proc_cciss)
546 return;
547 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
548 S_IROTH, proc_cciss,
549 &cciss_proc_fops, h);
551 #endif /* CONFIG_PROC_FS */
553 #define MAX_PRODUCT_NAME_LEN 19
555 #define to_hba(n) container_of(n, struct ctlr_info, dev)
556 #define to_drv(n) container_of(n, drive_info_struct, dev)
558 static ssize_t host_store_rescan(struct device *dev,
559 struct device_attribute *attr,
560 const char *buf, size_t count)
562 struct ctlr_info *h = to_hba(dev);
564 add_to_scan_list(h);
565 wake_up_process(cciss_scan_thread);
566 wait_for_completion_interruptible(&h->scan_wait);
568 return count;
570 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
572 static ssize_t dev_show_unique_id(struct device *dev,
573 struct device_attribute *attr,
574 char *buf)
576 drive_info_struct *drv = to_drv(dev);
577 struct ctlr_info *h = to_hba(drv->dev.parent);
578 __u8 sn[16];
579 unsigned long flags;
580 int ret = 0;
582 spin_lock_irqsave(&h->lock, flags);
583 if (h->busy_configuring)
584 ret = -EBUSY;
585 else
586 memcpy(sn, drv->serial_no, sizeof(sn));
587 spin_unlock_irqrestore(&h->lock, flags);
589 if (ret)
590 return ret;
591 else
592 return snprintf(buf, 16 * 2 + 2,
593 "%02X%02X%02X%02X%02X%02X%02X%02X"
594 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
595 sn[0], sn[1], sn[2], sn[3],
596 sn[4], sn[5], sn[6], sn[7],
597 sn[8], sn[9], sn[10], sn[11],
598 sn[12], sn[13], sn[14], sn[15]);
600 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
602 static ssize_t dev_show_vendor(struct device *dev,
603 struct device_attribute *attr,
604 char *buf)
606 drive_info_struct *drv = to_drv(dev);
607 struct ctlr_info *h = to_hba(drv->dev.parent);
608 char vendor[VENDOR_LEN + 1];
609 unsigned long flags;
610 int ret = 0;
612 spin_lock_irqsave(&h->lock, flags);
613 if (h->busy_configuring)
614 ret = -EBUSY;
615 else
616 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
617 spin_unlock_irqrestore(&h->lock, flags);
619 if (ret)
620 return ret;
621 else
622 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
624 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
626 static ssize_t dev_show_model(struct device *dev,
627 struct device_attribute *attr,
628 char *buf)
630 drive_info_struct *drv = to_drv(dev);
631 struct ctlr_info *h = to_hba(drv->dev.parent);
632 char model[MODEL_LEN + 1];
633 unsigned long flags;
634 int ret = 0;
636 spin_lock_irqsave(&h->lock, flags);
637 if (h->busy_configuring)
638 ret = -EBUSY;
639 else
640 memcpy(model, drv->model, MODEL_LEN + 1);
641 spin_unlock_irqrestore(&h->lock, flags);
643 if (ret)
644 return ret;
645 else
646 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
648 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
650 static ssize_t dev_show_rev(struct device *dev,
651 struct device_attribute *attr,
652 char *buf)
654 drive_info_struct *drv = to_drv(dev);
655 struct ctlr_info *h = to_hba(drv->dev.parent);
656 char rev[REV_LEN + 1];
657 unsigned long flags;
658 int ret = 0;
660 spin_lock_irqsave(&h->lock, flags);
661 if (h->busy_configuring)
662 ret = -EBUSY;
663 else
664 memcpy(rev, drv->rev, REV_LEN + 1);
665 spin_unlock_irqrestore(&h->lock, flags);
667 if (ret)
668 return ret;
669 else
670 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
672 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
674 static ssize_t cciss_show_lunid(struct device *dev,
675 struct device_attribute *attr, char *buf)
677 drive_info_struct *drv = to_drv(dev);
678 struct ctlr_info *h = to_hba(drv->dev.parent);
679 unsigned long flags;
680 unsigned char lunid[8];
682 spin_lock_irqsave(&h->lock, flags);
683 if (h->busy_configuring) {
684 spin_unlock_irqrestore(&h->lock, flags);
685 return -EBUSY;
687 if (!drv->heads) {
688 spin_unlock_irqrestore(&h->lock, flags);
689 return -ENOTTY;
691 memcpy(lunid, drv->LunID, sizeof(lunid));
692 spin_unlock_irqrestore(&h->lock, flags);
693 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
694 lunid[0], lunid[1], lunid[2], lunid[3],
695 lunid[4], lunid[5], lunid[6], lunid[7]);
697 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
699 static ssize_t cciss_show_raid_level(struct device *dev,
700 struct device_attribute *attr, char *buf)
702 drive_info_struct *drv = to_drv(dev);
703 struct ctlr_info *h = to_hba(drv->dev.parent);
704 int raid;
705 unsigned long flags;
707 spin_lock_irqsave(&h->lock, flags);
708 if (h->busy_configuring) {
709 spin_unlock_irqrestore(&h->lock, flags);
710 return -EBUSY;
712 raid = drv->raid_level;
713 spin_unlock_irqrestore(&h->lock, flags);
714 if (raid < 0 || raid > RAID_UNKNOWN)
715 raid = RAID_UNKNOWN;
717 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
718 raid_label[raid]);
720 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
722 static ssize_t cciss_show_usage_count(struct device *dev,
723 struct device_attribute *attr, char *buf)
725 drive_info_struct *drv = to_drv(dev);
726 struct ctlr_info *h = to_hba(drv->dev.parent);
727 unsigned long flags;
728 int count;
730 spin_lock_irqsave(&h->lock, flags);
731 if (h->busy_configuring) {
732 spin_unlock_irqrestore(&h->lock, flags);
733 return -EBUSY;
735 count = drv->usage_count;
736 spin_unlock_irqrestore(&h->lock, flags);
737 return snprintf(buf, 20, "%d\n", count);
739 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
741 static struct attribute *cciss_host_attrs[] = {
742 &dev_attr_rescan.attr,
743 NULL
746 static struct attribute_group cciss_host_attr_group = {
747 .attrs = cciss_host_attrs,
750 static const struct attribute_group *cciss_host_attr_groups[] = {
751 &cciss_host_attr_group,
752 NULL
755 static struct device_type cciss_host_type = {
756 .name = "cciss_host",
757 .groups = cciss_host_attr_groups,
758 .release = cciss_hba_release,
761 static struct attribute *cciss_dev_attrs[] = {
762 &dev_attr_unique_id.attr,
763 &dev_attr_model.attr,
764 &dev_attr_vendor.attr,
765 &dev_attr_rev.attr,
766 &dev_attr_lunid.attr,
767 &dev_attr_raid_level.attr,
768 &dev_attr_usage_count.attr,
769 NULL
772 static struct attribute_group cciss_dev_attr_group = {
773 .attrs = cciss_dev_attrs,
776 static const struct attribute_group *cciss_dev_attr_groups[] = {
777 &cciss_dev_attr_group,
778 NULL
781 static struct device_type cciss_dev_type = {
782 .name = "cciss_device",
783 .groups = cciss_dev_attr_groups,
784 .release = cciss_device_release,
787 static struct bus_type cciss_bus_type = {
788 .name = "cciss",
792 * cciss_hba_release is called when the reference count
793 * of h->dev goes to zero.
795 static void cciss_hba_release(struct device *dev)
798 * nothing to do, but need this to avoid a warning
799 * about not having a release handler from lib/kref.c.
804 * Initialize sysfs entry for each controller. This sets up and registers
805 * the 'cciss#' directory for each individual controller under
806 * /sys/bus/pci/devices/<dev>/.
808 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
810 device_initialize(&h->dev);
811 h->dev.type = &cciss_host_type;
812 h->dev.bus = &cciss_bus_type;
813 dev_set_name(&h->dev, "%s", h->devname);
814 h->dev.parent = &h->pdev->dev;
816 return device_add(&h->dev);
820 * Remove sysfs entries for an hba.
822 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
824 device_del(&h->dev);
825 put_device(&h->dev); /* final put. */
828 /* cciss_device_release is called when the reference count
829 * of h->drv[x]dev goes to zero.
831 static void cciss_device_release(struct device *dev)
833 drive_info_struct *drv = to_drv(dev);
834 kfree(drv);
838 * Initialize sysfs for each logical drive. This sets up and registers
839 * the 'c#d#' directory for each individual logical drive under
840 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
841 * /sys/block/cciss!c#d# to this entry.
843 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
844 int drv_index)
846 struct device *dev;
848 if (h->drv[drv_index]->device_initialized)
849 return 0;
851 dev = &h->drv[drv_index]->dev;
852 device_initialize(dev);
853 dev->type = &cciss_dev_type;
854 dev->bus = &cciss_bus_type;
855 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
856 dev->parent = &h->dev;
857 h->drv[drv_index]->device_initialized = 1;
858 return device_add(dev);
862 * Remove sysfs entries for a logical drive.
864 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
865 int ctlr_exiting)
867 struct device *dev = &h->drv[drv_index]->dev;
869 /* special case for c*d0, we only destroy it on controller exit */
870 if (drv_index == 0 && !ctlr_exiting)
871 return;
873 device_del(dev);
874 put_device(dev); /* the "final" put. */
875 h->drv[drv_index] = NULL;
879 * For operations that cannot sleep, a command block is allocated at init,
880 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
881 * which ones are free or in use.
883 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
885 CommandList_struct *c;
886 int i;
887 u64bit temp64;
888 dma_addr_t cmd_dma_handle, err_dma_handle;
890 do {
891 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
892 if (i == h->nr_cmds)
893 return NULL;
894 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
895 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
896 c = h->cmd_pool + i;
897 memset(c, 0, sizeof(CommandList_struct));
898 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
899 c->err_info = h->errinfo_pool + i;
900 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
901 err_dma_handle = h->errinfo_pool_dhandle
902 + i * sizeof(ErrorInfo_struct);
903 h->nr_allocs++;
905 c->cmdindex = i;
907 INIT_HLIST_NODE(&c->list);
908 c->busaddr = (__u32) cmd_dma_handle;
909 temp64.val = (__u64) err_dma_handle;
910 c->ErrDesc.Addr.lower = temp64.val32.lower;
911 c->ErrDesc.Addr.upper = temp64.val32.upper;
912 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
914 c->ctlr = h->ctlr;
915 return c;
918 /* allocate a command using pci_alloc_consistent, used for ioctls,
919 * etc., not for the main i/o path.
921 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
923 CommandList_struct *c;
924 u64bit temp64;
925 dma_addr_t cmd_dma_handle, err_dma_handle;
927 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
928 sizeof(CommandList_struct), &cmd_dma_handle);
929 if (c == NULL)
930 return NULL;
931 memset(c, 0, sizeof(CommandList_struct));
933 c->cmdindex = -1;
935 c->err_info = (ErrorInfo_struct *)
936 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
937 &err_dma_handle);
939 if (c->err_info == NULL) {
940 pci_free_consistent(h->pdev,
941 sizeof(CommandList_struct), c, cmd_dma_handle);
942 return NULL;
944 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
946 INIT_HLIST_NODE(&c->list);
947 c->busaddr = (__u32) cmd_dma_handle;
948 temp64.val = (__u64) err_dma_handle;
949 c->ErrDesc.Addr.lower = temp64.val32.lower;
950 c->ErrDesc.Addr.upper = temp64.val32.upper;
951 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
953 c->ctlr = h->ctlr;
954 return c;
957 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
959 int i;
961 i = c - h->cmd_pool;
962 clear_bit(i & (BITS_PER_LONG - 1),
963 h->cmd_pool_bits + (i / BITS_PER_LONG));
964 h->nr_frees++;
967 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
969 u64bit temp64;
971 temp64.val32.lower = c->ErrDesc.Addr.lower;
972 temp64.val32.upper = c->ErrDesc.Addr.upper;
973 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
974 c->err_info, (dma_addr_t) temp64.val);
975 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
976 c, (dma_addr_t) c->busaddr);
979 static inline ctlr_info_t *get_host(struct gendisk *disk)
981 return disk->queue->queuedata;
984 static inline drive_info_struct *get_drv(struct gendisk *disk)
986 return disk->private_data;
990 * Open. Make sure the device is really there.
992 static int cciss_open(struct block_device *bdev, fmode_t mode)
994 ctlr_info_t *h = get_host(bdev->bd_disk);
995 drive_info_struct *drv = get_drv(bdev->bd_disk);
997 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
998 if (drv->busy_configuring)
999 return -EBUSY;
1001 * Root is allowed to open raw volume zero even if it's not configured
1002 * so array config can still work. Root is also allowed to open any
1003 * volume that has a LUN ID, so it can issue IOCTL to reread the
1004 * disk information. I don't think I really like this
1005 * but I'm already using way to many device nodes to claim another one
1006 * for "raw controller".
1008 if (drv->heads == 0) {
1009 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1010 /* if not node 0 make sure it is a partition = 0 */
1011 if (MINOR(bdev->bd_dev) & 0x0f) {
1012 return -ENXIO;
1013 /* if it is, make sure we have a LUN ID */
1014 } else if (memcmp(drv->LunID, CTLR_LUNID,
1015 sizeof(drv->LunID))) {
1016 return -ENXIO;
1019 if (!capable(CAP_SYS_ADMIN))
1020 return -EPERM;
1022 drv->usage_count++;
1023 h->usage_count++;
1024 return 0;
1027 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1029 int ret;
1031 mutex_lock(&cciss_mutex);
1032 ret = cciss_open(bdev, mode);
1033 mutex_unlock(&cciss_mutex);
1035 return ret;
1039 * Close. Sync first.
1041 static int cciss_release(struct gendisk *disk, fmode_t mode)
1043 ctlr_info_t *h;
1044 drive_info_struct *drv;
1046 mutex_lock(&cciss_mutex);
1047 h = get_host(disk);
1048 drv = get_drv(disk);
1049 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1050 drv->usage_count--;
1051 h->usage_count--;
1052 mutex_unlock(&cciss_mutex);
1053 return 0;
1056 static int do_ioctl(struct block_device *bdev, fmode_t mode,
1057 unsigned cmd, unsigned long arg)
1059 int ret;
1060 mutex_lock(&cciss_mutex);
1061 ret = cciss_ioctl(bdev, mode, cmd, arg);
1062 mutex_unlock(&cciss_mutex);
1063 return ret;
1066 #ifdef CONFIG_COMPAT
1068 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1069 unsigned cmd, unsigned long arg);
1070 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1071 unsigned cmd, unsigned long arg);
1073 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1074 unsigned cmd, unsigned long arg)
1076 switch (cmd) {
1077 case CCISS_GETPCIINFO:
1078 case CCISS_GETINTINFO:
1079 case CCISS_SETINTINFO:
1080 case CCISS_GETNODENAME:
1081 case CCISS_SETNODENAME:
1082 case CCISS_GETHEARTBEAT:
1083 case CCISS_GETBUSTYPES:
1084 case CCISS_GETFIRMVER:
1085 case CCISS_GETDRIVVER:
1086 case CCISS_REVALIDVOLS:
1087 case CCISS_DEREGDISK:
1088 case CCISS_REGNEWDISK:
1089 case CCISS_REGNEWD:
1090 case CCISS_RESCANDISK:
1091 case CCISS_GETLUNINFO:
1092 return do_ioctl(bdev, mode, cmd, arg);
1094 case CCISS_PASSTHRU32:
1095 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1096 case CCISS_BIG_PASSTHRU32:
1097 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1099 default:
1100 return -ENOIOCTLCMD;
1104 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1105 unsigned cmd, unsigned long arg)
1107 IOCTL32_Command_struct __user *arg32 =
1108 (IOCTL32_Command_struct __user *) arg;
1109 IOCTL_Command_struct arg64;
1110 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1111 int err;
1112 u32 cp;
1114 err = 0;
1115 err |=
1116 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1117 sizeof(arg64.LUN_info));
1118 err |=
1119 copy_from_user(&arg64.Request, &arg32->Request,
1120 sizeof(arg64.Request));
1121 err |=
1122 copy_from_user(&arg64.error_info, &arg32->error_info,
1123 sizeof(arg64.error_info));
1124 err |= get_user(arg64.buf_size, &arg32->buf_size);
1125 err |= get_user(cp, &arg32->buf);
1126 arg64.buf = compat_ptr(cp);
1127 err |= copy_to_user(p, &arg64, sizeof(arg64));
1129 if (err)
1130 return -EFAULT;
1132 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1133 if (err)
1134 return err;
1135 err |=
1136 copy_in_user(&arg32->error_info, &p->error_info,
1137 sizeof(arg32->error_info));
1138 if (err)
1139 return -EFAULT;
1140 return err;
1143 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1144 unsigned cmd, unsigned long arg)
1146 BIG_IOCTL32_Command_struct __user *arg32 =
1147 (BIG_IOCTL32_Command_struct __user *) arg;
1148 BIG_IOCTL_Command_struct arg64;
1149 BIG_IOCTL_Command_struct __user *p =
1150 compat_alloc_user_space(sizeof(arg64));
1151 int err;
1152 u32 cp;
1154 memset(&arg64, 0, sizeof(arg64));
1155 err = 0;
1156 err |=
1157 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1158 sizeof(arg64.LUN_info));
1159 err |=
1160 copy_from_user(&arg64.Request, &arg32->Request,
1161 sizeof(arg64.Request));
1162 err |=
1163 copy_from_user(&arg64.error_info, &arg32->error_info,
1164 sizeof(arg64.error_info));
1165 err |= get_user(arg64.buf_size, &arg32->buf_size);
1166 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1167 err |= get_user(cp, &arg32->buf);
1168 arg64.buf = compat_ptr(cp);
1169 err |= copy_to_user(p, &arg64, sizeof(arg64));
1171 if (err)
1172 return -EFAULT;
1174 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1175 if (err)
1176 return err;
1177 err |=
1178 copy_in_user(&arg32->error_info, &p->error_info,
1179 sizeof(arg32->error_info));
1180 if (err)
1181 return -EFAULT;
1182 return err;
1184 #endif
1186 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1188 drive_info_struct *drv = get_drv(bdev->bd_disk);
1190 if (!drv->cylinders)
1191 return -ENXIO;
1193 geo->heads = drv->heads;
1194 geo->sectors = drv->sectors;
1195 geo->cylinders = drv->cylinders;
1196 return 0;
1199 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1201 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1202 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1203 (void)check_for_unit_attention(h, c);
1206 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1208 cciss_pci_info_struct pciinfo;
1210 if (!argp)
1211 return -EINVAL;
1212 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1213 pciinfo.bus = h->pdev->bus->number;
1214 pciinfo.dev_fn = h->pdev->devfn;
1215 pciinfo.board_id = h->board_id;
1216 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1217 return -EFAULT;
1218 return 0;
1221 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1223 cciss_coalint_struct intinfo;
1225 if (!argp)
1226 return -EINVAL;
1227 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1228 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1229 if (copy_to_user
1230 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1231 return -EFAULT;
1232 return 0;
1235 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1237 cciss_coalint_struct intinfo;
1238 unsigned long flags;
1239 int i;
1241 if (!argp)
1242 return -EINVAL;
1243 if (!capable(CAP_SYS_ADMIN))
1244 return -EPERM;
1245 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1246 return -EFAULT;
1247 if ((intinfo.delay == 0) && (intinfo.count == 0))
1248 return -EINVAL;
1249 spin_lock_irqsave(&h->lock, flags);
1250 /* Update the field, and then ring the doorbell */
1251 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1252 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1253 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1255 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1256 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1257 break;
1258 udelay(1000); /* delay and try again */
1260 spin_unlock_irqrestore(&h->lock, flags);
1261 if (i >= MAX_IOCTL_CONFIG_WAIT)
1262 return -EAGAIN;
1263 return 0;
1266 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1268 NodeName_type NodeName;
1269 int i;
1271 if (!argp)
1272 return -EINVAL;
1273 for (i = 0; i < 16; i++)
1274 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1275 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1276 return -EFAULT;
1277 return 0;
1280 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1282 NodeName_type NodeName;
1283 unsigned long flags;
1284 int i;
1286 if (!argp)
1287 return -EINVAL;
1288 if (!capable(CAP_SYS_ADMIN))
1289 return -EPERM;
1290 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1291 return -EFAULT;
1292 spin_lock_irqsave(&h->lock, flags);
1293 /* Update the field, and then ring the doorbell */
1294 for (i = 0; i < 16; i++)
1295 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1296 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1297 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1298 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1299 break;
1300 udelay(1000); /* delay and try again */
1302 spin_unlock_irqrestore(&h->lock, flags);
1303 if (i >= MAX_IOCTL_CONFIG_WAIT)
1304 return -EAGAIN;
1305 return 0;
1308 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1310 Heartbeat_type heartbeat;
1312 if (!argp)
1313 return -EINVAL;
1314 heartbeat = readl(&h->cfgtable->HeartBeat);
1315 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1316 return -EFAULT;
1317 return 0;
1320 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1322 BusTypes_type BusTypes;
1324 if (!argp)
1325 return -EINVAL;
1326 BusTypes = readl(&h->cfgtable->BusTypes);
1327 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1328 return -EFAULT;
1329 return 0;
1332 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1334 FirmwareVer_type firmware;
1336 if (!argp)
1337 return -EINVAL;
1338 memcpy(firmware, h->firm_ver, 4);
1340 if (copy_to_user
1341 (argp, firmware, sizeof(FirmwareVer_type)))
1342 return -EFAULT;
1343 return 0;
1346 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1348 DriverVer_type DriverVer = DRIVER_VERSION;
1350 if (!argp)
1351 return -EINVAL;
1352 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1353 return -EFAULT;
1354 return 0;
1357 static int cciss_getluninfo(ctlr_info_t *h,
1358 struct gendisk *disk, void __user *argp)
1360 LogvolInfo_struct luninfo;
1361 drive_info_struct *drv = get_drv(disk);
1363 if (!argp)
1364 return -EINVAL;
1365 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1366 luninfo.num_opens = drv->usage_count;
1367 luninfo.num_parts = 0;
1368 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1369 return -EFAULT;
1370 return 0;
1373 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1375 IOCTL_Command_struct iocommand;
1376 CommandList_struct *c;
1377 char *buff = NULL;
1378 u64bit temp64;
1379 DECLARE_COMPLETION_ONSTACK(wait);
1381 if (!argp)
1382 return -EINVAL;
1384 if (!capable(CAP_SYS_RAWIO))
1385 return -EPERM;
1387 if (copy_from_user
1388 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1389 return -EFAULT;
1390 if ((iocommand.buf_size < 1) &&
1391 (iocommand.Request.Type.Direction != XFER_NONE)) {
1392 return -EINVAL;
1394 if (iocommand.buf_size > 0) {
1395 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1396 if (buff == NULL)
1397 return -EFAULT;
1399 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1400 /* Copy the data into the buffer we created */
1401 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1402 kfree(buff);
1403 return -EFAULT;
1405 } else {
1406 memset(buff, 0, iocommand.buf_size);
1408 c = cmd_special_alloc(h);
1409 if (!c) {
1410 kfree(buff);
1411 return -ENOMEM;
1413 /* Fill in the command type */
1414 c->cmd_type = CMD_IOCTL_PEND;
1415 /* Fill in Command Header */
1416 c->Header.ReplyQueue = 0; /* unused in simple mode */
1417 if (iocommand.buf_size > 0) { /* buffer to fill */
1418 c->Header.SGList = 1;
1419 c->Header.SGTotal = 1;
1420 } else { /* no buffers to fill */
1421 c->Header.SGList = 0;
1422 c->Header.SGTotal = 0;
1424 c->Header.LUN = iocommand.LUN_info;
1425 /* use the kernel address the cmd block for tag */
1426 c->Header.Tag.lower = c->busaddr;
1428 /* Fill in Request block */
1429 c->Request = iocommand.Request;
1431 /* Fill in the scatter gather information */
1432 if (iocommand.buf_size > 0) {
1433 temp64.val = pci_map_single(h->pdev, buff,
1434 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1435 c->SG[0].Addr.lower = temp64.val32.lower;
1436 c->SG[0].Addr.upper = temp64.val32.upper;
1437 c->SG[0].Len = iocommand.buf_size;
1438 c->SG[0].Ext = 0; /* we are not chaining */
1440 c->waiting = &wait;
1442 enqueue_cmd_and_start_io(h, c);
1443 wait_for_completion(&wait);
1445 /* unlock the buffers from DMA */
1446 temp64.val32.lower = c->SG[0].Addr.lower;
1447 temp64.val32.upper = c->SG[0].Addr.upper;
1448 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1449 PCI_DMA_BIDIRECTIONAL);
1450 check_ioctl_unit_attention(h, c);
1452 /* Copy the error information out */
1453 iocommand.error_info = *(c->err_info);
1454 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1455 kfree(buff);
1456 cmd_special_free(h, c);
1457 return -EFAULT;
1460 if (iocommand.Request.Type.Direction == XFER_READ) {
1461 /* Copy the data out of the buffer we created */
1462 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1463 kfree(buff);
1464 cmd_special_free(h, c);
1465 return -EFAULT;
1468 kfree(buff);
1469 cmd_special_free(h, c);
1470 return 0;
1473 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1475 BIG_IOCTL_Command_struct *ioc;
1476 CommandList_struct *c;
1477 unsigned char **buff = NULL;
1478 int *buff_size = NULL;
1479 u64bit temp64;
1480 BYTE sg_used = 0;
1481 int status = 0;
1482 int i;
1483 DECLARE_COMPLETION_ONSTACK(wait);
1484 __u32 left;
1485 __u32 sz;
1486 BYTE __user *data_ptr;
1488 if (!argp)
1489 return -EINVAL;
1490 if (!capable(CAP_SYS_RAWIO))
1491 return -EPERM;
1492 ioc = (BIG_IOCTL_Command_struct *)
1493 kmalloc(sizeof(*ioc), GFP_KERNEL);
1494 if (!ioc) {
1495 status = -ENOMEM;
1496 goto cleanup1;
1498 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1499 status = -EFAULT;
1500 goto cleanup1;
1502 if ((ioc->buf_size < 1) &&
1503 (ioc->Request.Type.Direction != XFER_NONE)) {
1504 status = -EINVAL;
1505 goto cleanup1;
1507 /* Check kmalloc limits using all SGs */
1508 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1509 status = -EINVAL;
1510 goto cleanup1;
1512 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1513 status = -EINVAL;
1514 goto cleanup1;
1516 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1517 if (!buff) {
1518 status = -ENOMEM;
1519 goto cleanup1;
1521 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1522 if (!buff_size) {
1523 status = -ENOMEM;
1524 goto cleanup1;
1526 left = ioc->buf_size;
1527 data_ptr = ioc->buf;
1528 while (left) {
1529 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1530 buff_size[sg_used] = sz;
1531 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1532 if (buff[sg_used] == NULL) {
1533 status = -ENOMEM;
1534 goto cleanup1;
1536 if (ioc->Request.Type.Direction == XFER_WRITE) {
1537 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1538 status = -EFAULT;
1539 goto cleanup1;
1541 } else {
1542 memset(buff[sg_used], 0, sz);
1544 left -= sz;
1545 data_ptr += sz;
1546 sg_used++;
1548 c = cmd_special_alloc(h);
1549 if (!c) {
1550 status = -ENOMEM;
1551 goto cleanup1;
1553 c->cmd_type = CMD_IOCTL_PEND;
1554 c->Header.ReplyQueue = 0;
1555 c->Header.SGList = sg_used;
1556 c->Header.SGTotal = sg_used;
1557 c->Header.LUN = ioc->LUN_info;
1558 c->Header.Tag.lower = c->busaddr;
1560 c->Request = ioc->Request;
1561 for (i = 0; i < sg_used; i++) {
1562 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1563 PCI_DMA_BIDIRECTIONAL);
1564 c->SG[i].Addr.lower = temp64.val32.lower;
1565 c->SG[i].Addr.upper = temp64.val32.upper;
1566 c->SG[i].Len = buff_size[i];
1567 c->SG[i].Ext = 0; /* we are not chaining */
1569 c->waiting = &wait;
1570 enqueue_cmd_and_start_io(h, c);
1571 wait_for_completion(&wait);
1572 /* unlock the buffers from DMA */
1573 for (i = 0; i < sg_used; i++) {
1574 temp64.val32.lower = c->SG[i].Addr.lower;
1575 temp64.val32.upper = c->SG[i].Addr.upper;
1576 pci_unmap_single(h->pdev,
1577 (dma_addr_t) temp64.val, buff_size[i],
1578 PCI_DMA_BIDIRECTIONAL);
1580 check_ioctl_unit_attention(h, c);
1581 /* Copy the error information out */
1582 ioc->error_info = *(c->err_info);
1583 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1584 cmd_special_free(h, c);
1585 status = -EFAULT;
1586 goto cleanup1;
1588 if (ioc->Request.Type.Direction == XFER_READ) {
1589 /* Copy the data out of the buffer we created */
1590 BYTE __user *ptr = ioc->buf;
1591 for (i = 0; i < sg_used; i++) {
1592 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1593 cmd_special_free(h, c);
1594 status = -EFAULT;
1595 goto cleanup1;
1597 ptr += buff_size[i];
1600 cmd_special_free(h, c);
1601 status = 0;
1602 cleanup1:
1603 if (buff) {
1604 for (i = 0; i < sg_used; i++)
1605 kfree(buff[i]);
1606 kfree(buff);
1608 kfree(buff_size);
1609 kfree(ioc);
1610 return status;
1613 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1614 unsigned int cmd, unsigned long arg)
1616 struct gendisk *disk = bdev->bd_disk;
1617 ctlr_info_t *h = get_host(disk);
1618 void __user *argp = (void __user *)arg;
1620 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1621 cmd, arg);
1622 switch (cmd) {
1623 case CCISS_GETPCIINFO:
1624 return cciss_getpciinfo(h, argp);
1625 case CCISS_GETINTINFO:
1626 return cciss_getintinfo(h, argp);
1627 case CCISS_SETINTINFO:
1628 return cciss_setintinfo(h, argp);
1629 case CCISS_GETNODENAME:
1630 return cciss_getnodename(h, argp);
1631 case CCISS_SETNODENAME:
1632 return cciss_setnodename(h, argp);
1633 case CCISS_GETHEARTBEAT:
1634 return cciss_getheartbeat(h, argp);
1635 case CCISS_GETBUSTYPES:
1636 return cciss_getbustypes(h, argp);
1637 case CCISS_GETFIRMVER:
1638 return cciss_getfirmver(h, argp);
1639 case CCISS_GETDRIVVER:
1640 return cciss_getdrivver(h, argp);
1641 case CCISS_DEREGDISK:
1642 case CCISS_REGNEWD:
1643 case CCISS_REVALIDVOLS:
1644 return rebuild_lun_table(h, 0, 1);
1645 case CCISS_GETLUNINFO:
1646 return cciss_getluninfo(h, disk, argp);
1647 case CCISS_PASSTHRU:
1648 return cciss_passthru(h, argp);
1649 case CCISS_BIG_PASSTHRU:
1650 return cciss_bigpassthru(h, argp);
1652 /* scsi_cmd_ioctl handles these, below, though some are not */
1653 /* very meaningful for cciss. SG_IO is the main one people want. */
1655 case SG_GET_VERSION_NUM:
1656 case SG_SET_TIMEOUT:
1657 case SG_GET_TIMEOUT:
1658 case SG_GET_RESERVED_SIZE:
1659 case SG_SET_RESERVED_SIZE:
1660 case SG_EMULATED_HOST:
1661 case SG_IO:
1662 case SCSI_IOCTL_SEND_COMMAND:
1663 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
1665 /* scsi_cmd_ioctl would normally handle these, below, but */
1666 /* they aren't a good fit for cciss, as CD-ROMs are */
1667 /* not supported, and we don't have any bus/target/lun */
1668 /* which we present to the kernel. */
1670 case CDROM_SEND_PACKET:
1671 case CDROMCLOSETRAY:
1672 case CDROMEJECT:
1673 case SCSI_IOCTL_GET_IDLUN:
1674 case SCSI_IOCTL_GET_BUS_NUMBER:
1675 default:
1676 return -ENOTTY;
1680 static void cciss_check_queues(ctlr_info_t *h)
1682 int start_queue = h->next_to_run;
1683 int i;
1685 /* check to see if we have maxed out the number of commands that can
1686 * be placed on the queue. If so then exit. We do this check here
1687 * in case the interrupt we serviced was from an ioctl and did not
1688 * free any new commands.
1690 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1691 return;
1693 /* We have room on the queue for more commands. Now we need to queue
1694 * them up. We will also keep track of the next queue to run so
1695 * that every queue gets a chance to be started first.
1697 for (i = 0; i < h->highest_lun + 1; i++) {
1698 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1699 /* make sure the disk has been added and the drive is real
1700 * because this can be called from the middle of init_one.
1702 if (!h->drv[curr_queue])
1703 continue;
1704 if (!(h->drv[curr_queue]->queue) ||
1705 !(h->drv[curr_queue]->heads))
1706 continue;
1707 blk_start_queue(h->gendisk[curr_queue]->queue);
1709 /* check to see if we have maxed out the number of commands
1710 * that can be placed on the queue.
1712 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1713 if (curr_queue == start_queue) {
1714 h->next_to_run =
1715 (start_queue + 1) % (h->highest_lun + 1);
1716 break;
1717 } else {
1718 h->next_to_run = curr_queue;
1719 break;
1725 static void cciss_softirq_done(struct request *rq)
1727 CommandList_struct *c = rq->completion_data;
1728 ctlr_info_t *h = hba[c->ctlr];
1729 SGDescriptor_struct *curr_sg = c->SG;
1730 u64bit temp64;
1731 unsigned long flags;
1732 int i, ddir;
1733 int sg_index = 0;
1735 if (c->Request.Type.Direction == XFER_READ)
1736 ddir = PCI_DMA_FROMDEVICE;
1737 else
1738 ddir = PCI_DMA_TODEVICE;
1740 /* command did not need to be retried */
1741 /* unmap the DMA mapping for all the scatter gather elements */
1742 for (i = 0; i < c->Header.SGList; i++) {
1743 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1744 cciss_unmap_sg_chain_block(h, c);
1745 /* Point to the next block */
1746 curr_sg = h->cmd_sg_list[c->cmdindex];
1747 sg_index = 0;
1749 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1750 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1751 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1752 ddir);
1753 ++sg_index;
1756 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1758 /* set the residual count for pc requests */
1759 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1760 rq->resid_len = c->err_info->ResidualCnt;
1762 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1764 spin_lock_irqsave(&h->lock, flags);
1765 cmd_free(h, c);
1766 cciss_check_queues(h);
1767 spin_unlock_irqrestore(&h->lock, flags);
1770 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1771 unsigned char scsi3addr[], uint32_t log_unit)
1773 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1774 sizeof(h->drv[log_unit]->LunID));
1777 /* This function gets the SCSI vendor, model, and revision of a logical drive
1778 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1779 * they cannot be read.
1781 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1782 char *vendor, char *model, char *rev)
1784 int rc;
1785 InquiryData_struct *inq_buf;
1786 unsigned char scsi3addr[8];
1788 *vendor = '\0';
1789 *model = '\0';
1790 *rev = '\0';
1792 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1793 if (!inq_buf)
1794 return;
1796 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1797 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1798 scsi3addr, TYPE_CMD);
1799 if (rc == IO_OK) {
1800 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1801 vendor[VENDOR_LEN] = '\0';
1802 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1803 model[MODEL_LEN] = '\0';
1804 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1805 rev[REV_LEN] = '\0';
1808 kfree(inq_buf);
1809 return;
1812 /* This function gets the serial number of a logical drive via
1813 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1814 * number cannot be had, for whatever reason, 16 bytes of 0xff
1815 * are returned instead.
1817 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1818 unsigned char *serial_no, int buflen)
1820 #define PAGE_83_INQ_BYTES 64
1821 int rc;
1822 unsigned char *buf;
1823 unsigned char scsi3addr[8];
1825 if (buflen > 16)
1826 buflen = 16;
1827 memset(serial_no, 0xff, buflen);
1828 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1829 if (!buf)
1830 return;
1831 memset(serial_no, 0, buflen);
1832 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1833 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1834 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1835 if (rc == IO_OK)
1836 memcpy(serial_no, &buf[8], buflen);
1837 kfree(buf);
1838 return;
1842 * cciss_add_disk sets up the block device queue for a logical drive
1844 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1845 int drv_index)
1847 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1848 if (!disk->queue)
1849 goto init_queue_failure;
1850 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1851 disk->major = h->major;
1852 disk->first_minor = drv_index << NWD_SHIFT;
1853 disk->fops = &cciss_fops;
1854 if (cciss_create_ld_sysfs_entry(h, drv_index))
1855 goto cleanup_queue;
1856 disk->private_data = h->drv[drv_index];
1857 disk->driverfs_dev = &h->drv[drv_index]->dev;
1859 /* Set up queue information */
1860 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1862 /* This is a hardware imposed limit. */
1863 blk_queue_max_segments(disk->queue, h->maxsgentries);
1865 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1867 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1869 disk->queue->queuedata = h;
1871 blk_queue_logical_block_size(disk->queue,
1872 h->drv[drv_index]->block_size);
1874 /* Make sure all queue data is written out before */
1875 /* setting h->drv[drv_index]->queue, as setting this */
1876 /* allows the interrupt handler to start the queue */
1877 wmb();
1878 h->drv[drv_index]->queue = disk->queue;
1879 add_disk(disk);
1880 return 0;
1882 cleanup_queue:
1883 blk_cleanup_queue(disk->queue);
1884 disk->queue = NULL;
1885 init_queue_failure:
1886 return -1;
1889 /* This function will check the usage_count of the drive to be updated/added.
1890 * If the usage_count is zero and it is a heretofore unknown drive, or,
1891 * the drive's capacity, geometry, or serial number has changed,
1892 * then the drive information will be updated and the disk will be
1893 * re-registered with the kernel. If these conditions don't hold,
1894 * then it will be left alone for the next reboot. The exception to this
1895 * is disk 0 which will always be left registered with the kernel since it
1896 * is also the controller node. Any changes to disk 0 will show up on
1897 * the next reboot.
1899 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1900 int first_time, int via_ioctl)
1902 struct gendisk *disk;
1903 InquiryData_struct *inq_buff = NULL;
1904 unsigned int block_size;
1905 sector_t total_size;
1906 unsigned long flags = 0;
1907 int ret = 0;
1908 drive_info_struct *drvinfo;
1910 /* Get information about the disk and modify the driver structure */
1911 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1912 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
1913 if (inq_buff == NULL || drvinfo == NULL)
1914 goto mem_msg;
1916 /* testing to see if 16-byte CDBs are already being used */
1917 if (h->cciss_read == CCISS_READ_16) {
1918 cciss_read_capacity_16(h, drv_index,
1919 &total_size, &block_size);
1921 } else {
1922 cciss_read_capacity(h, drv_index, &total_size, &block_size);
1923 /* if read_capacity returns all F's this volume is >2TB */
1924 /* in size so we switch to 16-byte CDB's for all */
1925 /* read/write ops */
1926 if (total_size == 0xFFFFFFFFULL) {
1927 cciss_read_capacity_16(h, drv_index,
1928 &total_size, &block_size);
1929 h->cciss_read = CCISS_READ_16;
1930 h->cciss_write = CCISS_WRITE_16;
1931 } else {
1932 h->cciss_read = CCISS_READ_10;
1933 h->cciss_write = CCISS_WRITE_10;
1937 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
1938 inq_buff, drvinfo);
1939 drvinfo->block_size = block_size;
1940 drvinfo->nr_blocks = total_size + 1;
1942 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
1943 drvinfo->model, drvinfo->rev);
1944 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
1945 sizeof(drvinfo->serial_no));
1946 /* Save the lunid in case we deregister the disk, below. */
1947 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1948 sizeof(drvinfo->LunID));
1950 /* Is it the same disk we already know, and nothing's changed? */
1951 if (h->drv[drv_index]->raid_level != -1 &&
1952 ((memcmp(drvinfo->serial_no,
1953 h->drv[drv_index]->serial_no, 16) == 0) &&
1954 drvinfo->block_size == h->drv[drv_index]->block_size &&
1955 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1956 drvinfo->heads == h->drv[drv_index]->heads &&
1957 drvinfo->sectors == h->drv[drv_index]->sectors &&
1958 drvinfo->cylinders == h->drv[drv_index]->cylinders))
1959 /* The disk is unchanged, nothing to update */
1960 goto freeret;
1962 /* If we get here it's not the same disk, or something's changed,
1963 * so we need to * deregister it, and re-register it, if it's not
1964 * in use.
1965 * If the disk already exists then deregister it before proceeding
1966 * (unless it's the first disk (for the controller node).
1968 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
1969 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
1970 spin_lock_irqsave(&h->lock, flags);
1971 h->drv[drv_index]->busy_configuring = 1;
1972 spin_unlock_irqrestore(&h->lock, flags);
1974 /* deregister_disk sets h->drv[drv_index]->queue = NULL
1975 * which keeps the interrupt handler from starting
1976 * the queue.
1978 ret = deregister_disk(h, drv_index, 0, via_ioctl);
1981 /* If the disk is in use return */
1982 if (ret)
1983 goto freeret;
1985 /* Save the new information from cciss_geometry_inquiry
1986 * and serial number inquiry. If the disk was deregistered
1987 * above, then h->drv[drv_index] will be NULL.
1989 if (h->drv[drv_index] == NULL) {
1990 drvinfo->device_initialized = 0;
1991 h->drv[drv_index] = drvinfo;
1992 drvinfo = NULL; /* so it won't be freed below. */
1993 } else {
1994 /* special case for cxd0 */
1995 h->drv[drv_index]->block_size = drvinfo->block_size;
1996 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
1997 h->drv[drv_index]->heads = drvinfo->heads;
1998 h->drv[drv_index]->sectors = drvinfo->sectors;
1999 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2000 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2001 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2002 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2003 VENDOR_LEN + 1);
2004 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2005 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2008 ++h->num_luns;
2009 disk = h->gendisk[drv_index];
2010 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2012 /* If it's not disk 0 (drv_index != 0)
2013 * or if it was disk 0, but there was previously
2014 * no actual corresponding configured logical drive
2015 * (raid_leve == -1) then we want to update the
2016 * logical drive's information.
2018 if (drv_index || first_time) {
2019 if (cciss_add_disk(h, disk, drv_index) != 0) {
2020 cciss_free_gendisk(h, drv_index);
2021 cciss_free_drive_info(h, drv_index);
2022 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2023 drv_index);
2024 --h->num_luns;
2028 freeret:
2029 kfree(inq_buff);
2030 kfree(drvinfo);
2031 return;
2032 mem_msg:
2033 dev_err(&h->pdev->dev, "out of memory\n");
2034 goto freeret;
2037 /* This function will find the first index of the controllers drive array
2038 * that has a null drv pointer and allocate the drive info struct and
2039 * will return that index This is where new drives will be added.
2040 * If the index to be returned is greater than the highest_lun index for
2041 * the controller then highest_lun is set * to this new index.
2042 * If there are no available indexes or if tha allocation fails, then -1
2043 * is returned. * "controller_node" is used to know if this is a real
2044 * logical drive, or just the controller node, which determines if this
2045 * counts towards highest_lun.
2047 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2049 int i;
2050 drive_info_struct *drv;
2052 /* Search for an empty slot for our drive info */
2053 for (i = 0; i < CISS_MAX_LUN; i++) {
2055 /* if not cxd0 case, and it's occupied, skip it. */
2056 if (h->drv[i] && i != 0)
2057 continue;
2059 * If it's cxd0 case, and drv is alloc'ed already, and a
2060 * disk is configured there, skip it.
2062 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2063 continue;
2066 * We've found an empty slot. Update highest_lun
2067 * provided this isn't just the fake cxd0 controller node.
2069 if (i > h->highest_lun && !controller_node)
2070 h->highest_lun = i;
2072 /* If adding a real disk at cxd0, and it's already alloc'ed */
2073 if (i == 0 && h->drv[i] != NULL)
2074 return i;
2077 * Found an empty slot, not already alloc'ed. Allocate it.
2078 * Mark it with raid_level == -1, so we know it's new later on.
2080 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2081 if (!drv)
2082 return -1;
2083 drv->raid_level = -1; /* so we know it's new */
2084 h->drv[i] = drv;
2085 return i;
2087 return -1;
2090 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2092 kfree(h->drv[drv_index]);
2093 h->drv[drv_index] = NULL;
2096 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2098 put_disk(h->gendisk[drv_index]);
2099 h->gendisk[drv_index] = NULL;
2102 /* cciss_add_gendisk finds a free hba[]->drv structure
2103 * and allocates a gendisk if needed, and sets the lunid
2104 * in the drvinfo structure. It returns the index into
2105 * the ->drv[] array, or -1 if none are free.
2106 * is_controller_node indicates whether highest_lun should
2107 * count this disk, or if it's only being added to provide
2108 * a means to talk to the controller in case no logical
2109 * drives have yet been configured.
2111 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2112 int controller_node)
2114 int drv_index;
2116 drv_index = cciss_alloc_drive_info(h, controller_node);
2117 if (drv_index == -1)
2118 return -1;
2120 /*Check if the gendisk needs to be allocated */
2121 if (!h->gendisk[drv_index]) {
2122 h->gendisk[drv_index] =
2123 alloc_disk(1 << NWD_SHIFT);
2124 if (!h->gendisk[drv_index]) {
2125 dev_err(&h->pdev->dev,
2126 "could not allocate a new disk %d\n",
2127 drv_index);
2128 goto err_free_drive_info;
2131 memcpy(h->drv[drv_index]->LunID, lunid,
2132 sizeof(h->drv[drv_index]->LunID));
2133 if (cciss_create_ld_sysfs_entry(h, drv_index))
2134 goto err_free_disk;
2135 /* Don't need to mark this busy because nobody */
2136 /* else knows about this disk yet to contend */
2137 /* for access to it. */
2138 h->drv[drv_index]->busy_configuring = 0;
2139 wmb();
2140 return drv_index;
2142 err_free_disk:
2143 cciss_free_gendisk(h, drv_index);
2144 err_free_drive_info:
2145 cciss_free_drive_info(h, drv_index);
2146 return -1;
2149 /* This is for the special case of a controller which
2150 * has no logical drives. In this case, we still need
2151 * to register a disk so the controller can be accessed
2152 * by the Array Config Utility.
2154 static void cciss_add_controller_node(ctlr_info_t *h)
2156 struct gendisk *disk;
2157 int drv_index;
2159 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2160 return;
2162 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2163 if (drv_index == -1)
2164 goto error;
2165 h->drv[drv_index]->block_size = 512;
2166 h->drv[drv_index]->nr_blocks = 0;
2167 h->drv[drv_index]->heads = 0;
2168 h->drv[drv_index]->sectors = 0;
2169 h->drv[drv_index]->cylinders = 0;
2170 h->drv[drv_index]->raid_level = -1;
2171 memset(h->drv[drv_index]->serial_no, 0, 16);
2172 disk = h->gendisk[drv_index];
2173 if (cciss_add_disk(h, disk, drv_index) == 0)
2174 return;
2175 cciss_free_gendisk(h, drv_index);
2176 cciss_free_drive_info(h, drv_index);
2177 error:
2178 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2179 return;
2182 /* This function will add and remove logical drives from the Logical
2183 * drive array of the controller and maintain persistency of ordering
2184 * so that mount points are preserved until the next reboot. This allows
2185 * for the removal of logical drives in the middle of the drive array
2186 * without a re-ordering of those drives.
2187 * INPUT
2188 * h = The controller to perform the operations on
2190 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2191 int via_ioctl)
2193 int num_luns;
2194 ReportLunData_struct *ld_buff = NULL;
2195 int return_code;
2196 int listlength = 0;
2197 int i;
2198 int drv_found;
2199 int drv_index = 0;
2200 unsigned char lunid[8] = CTLR_LUNID;
2201 unsigned long flags;
2203 if (!capable(CAP_SYS_RAWIO))
2204 return -EPERM;
2206 /* Set busy_configuring flag for this operation */
2207 spin_lock_irqsave(&h->lock, flags);
2208 if (h->busy_configuring) {
2209 spin_unlock_irqrestore(&h->lock, flags);
2210 return -EBUSY;
2212 h->busy_configuring = 1;
2213 spin_unlock_irqrestore(&h->lock, flags);
2215 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2216 if (ld_buff == NULL)
2217 goto mem_msg;
2219 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2220 sizeof(ReportLunData_struct),
2221 0, CTLR_LUNID, TYPE_CMD);
2223 if (return_code == IO_OK)
2224 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2225 else { /* reading number of logical volumes failed */
2226 dev_warn(&h->pdev->dev,
2227 "report logical volume command failed\n");
2228 listlength = 0;
2229 goto freeret;
2232 num_luns = listlength / 8; /* 8 bytes per entry */
2233 if (num_luns > CISS_MAX_LUN) {
2234 num_luns = CISS_MAX_LUN;
2235 dev_warn(&h->pdev->dev, "more luns configured"
2236 " on controller than can be handled by"
2237 " this driver.\n");
2240 if (num_luns == 0)
2241 cciss_add_controller_node(h);
2243 /* Compare controller drive array to driver's drive array
2244 * to see if any drives are missing on the controller due
2245 * to action of Array Config Utility (user deletes drive)
2246 * and deregister logical drives which have disappeared.
2248 for (i = 0; i <= h->highest_lun; i++) {
2249 int j;
2250 drv_found = 0;
2252 /* skip holes in the array from already deleted drives */
2253 if (h->drv[i] == NULL)
2254 continue;
2256 for (j = 0; j < num_luns; j++) {
2257 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2258 if (memcmp(h->drv[i]->LunID, lunid,
2259 sizeof(lunid)) == 0) {
2260 drv_found = 1;
2261 break;
2264 if (!drv_found) {
2265 /* Deregister it from the OS, it's gone. */
2266 spin_lock_irqsave(&h->lock, flags);
2267 h->drv[i]->busy_configuring = 1;
2268 spin_unlock_irqrestore(&h->lock, flags);
2269 return_code = deregister_disk(h, i, 1, via_ioctl);
2270 if (h->drv[i] != NULL)
2271 h->drv[i]->busy_configuring = 0;
2275 /* Compare controller drive array to driver's drive array.
2276 * Check for updates in the drive information and any new drives
2277 * on the controller due to ACU adding logical drives, or changing
2278 * a logical drive's size, etc. Reregister any new/changed drives
2280 for (i = 0; i < num_luns; i++) {
2281 int j;
2283 drv_found = 0;
2285 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2286 /* Find if the LUN is already in the drive array
2287 * of the driver. If so then update its info
2288 * if not in use. If it does not exist then find
2289 * the first free index and add it.
2291 for (j = 0; j <= h->highest_lun; j++) {
2292 if (h->drv[j] != NULL &&
2293 memcmp(h->drv[j]->LunID, lunid,
2294 sizeof(h->drv[j]->LunID)) == 0) {
2295 drv_index = j;
2296 drv_found = 1;
2297 break;
2301 /* check if the drive was found already in the array */
2302 if (!drv_found) {
2303 drv_index = cciss_add_gendisk(h, lunid, 0);
2304 if (drv_index == -1)
2305 goto freeret;
2307 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2308 } /* end for */
2310 freeret:
2311 kfree(ld_buff);
2312 h->busy_configuring = 0;
2313 /* We return -1 here to tell the ACU that we have registered/updated
2314 * all of the drives that we can and to keep it from calling us
2315 * additional times.
2317 return -1;
2318 mem_msg:
2319 dev_err(&h->pdev->dev, "out of memory\n");
2320 h->busy_configuring = 0;
2321 goto freeret;
2324 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2326 /* zero out the disk size info */
2327 drive_info->nr_blocks = 0;
2328 drive_info->block_size = 0;
2329 drive_info->heads = 0;
2330 drive_info->sectors = 0;
2331 drive_info->cylinders = 0;
2332 drive_info->raid_level = -1;
2333 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2334 memset(drive_info->model, 0, sizeof(drive_info->model));
2335 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2336 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2338 * don't clear the LUNID though, we need to remember which
2339 * one this one is.
2343 /* This function will deregister the disk and it's queue from the
2344 * kernel. It must be called with the controller lock held and the
2345 * drv structures busy_configuring flag set. It's parameters are:
2347 * disk = This is the disk to be deregistered
2348 * drv = This is the drive_info_struct associated with the disk to be
2349 * deregistered. It contains information about the disk used
2350 * by the driver.
2351 * clear_all = This flag determines whether or not the disk information
2352 * is going to be completely cleared out and the highest_lun
2353 * reset. Sometimes we want to clear out information about
2354 * the disk in preparation for re-adding it. In this case
2355 * the highest_lun should be left unchanged and the LunID
2356 * should not be cleared.
2357 * via_ioctl
2358 * This indicates whether we've reached this path via ioctl.
2359 * This affects the maximum usage count allowed for c0d0 to be messed with.
2360 * If this path is reached via ioctl(), then the max_usage_count will
2361 * be 1, as the process calling ioctl() has got to have the device open.
2362 * If we get here via sysfs, then the max usage count will be zero.
2364 static int deregister_disk(ctlr_info_t *h, int drv_index,
2365 int clear_all, int via_ioctl)
2367 int i;
2368 struct gendisk *disk;
2369 drive_info_struct *drv;
2370 int recalculate_highest_lun;
2372 if (!capable(CAP_SYS_RAWIO))
2373 return -EPERM;
2375 drv = h->drv[drv_index];
2376 disk = h->gendisk[drv_index];
2378 /* make sure logical volume is NOT is use */
2379 if (clear_all || (h->gendisk[0] == disk)) {
2380 if (drv->usage_count > via_ioctl)
2381 return -EBUSY;
2382 } else if (drv->usage_count > 0)
2383 return -EBUSY;
2385 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2387 /* invalidate the devices and deregister the disk. If it is disk
2388 * zero do not deregister it but just zero out it's values. This
2389 * allows us to delete disk zero but keep the controller registered.
2391 if (h->gendisk[0] != disk) {
2392 struct request_queue *q = disk->queue;
2393 if (disk->flags & GENHD_FL_UP) {
2394 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2395 del_gendisk(disk);
2397 if (q)
2398 blk_cleanup_queue(q);
2399 /* If clear_all is set then we are deleting the logical
2400 * drive, not just refreshing its info. For drives
2401 * other than disk 0 we will call put_disk. We do not
2402 * do this for disk 0 as we need it to be able to
2403 * configure the controller.
2405 if (clear_all){
2406 /* This isn't pretty, but we need to find the
2407 * disk in our array and NULL our the pointer.
2408 * This is so that we will call alloc_disk if
2409 * this index is used again later.
2411 for (i=0; i < CISS_MAX_LUN; i++){
2412 if (h->gendisk[i] == disk) {
2413 h->gendisk[i] = NULL;
2414 break;
2417 put_disk(disk);
2419 } else {
2420 set_capacity(disk, 0);
2421 cciss_clear_drive_info(drv);
2424 --h->num_luns;
2426 /* if it was the last disk, find the new hightest lun */
2427 if (clear_all && recalculate_highest_lun) {
2428 int newhighest = -1;
2429 for (i = 0; i <= h->highest_lun; i++) {
2430 /* if the disk has size > 0, it is available */
2431 if (h->drv[i] && h->drv[i]->heads)
2432 newhighest = i;
2434 h->highest_lun = newhighest;
2436 return 0;
2439 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2440 size_t size, __u8 page_code, unsigned char *scsi3addr,
2441 int cmd_type)
2443 u64bit buff_dma_handle;
2444 int status = IO_OK;
2446 c->cmd_type = CMD_IOCTL_PEND;
2447 c->Header.ReplyQueue = 0;
2448 if (buff != NULL) {
2449 c->Header.SGList = 1;
2450 c->Header.SGTotal = 1;
2451 } else {
2452 c->Header.SGList = 0;
2453 c->Header.SGTotal = 0;
2455 c->Header.Tag.lower = c->busaddr;
2456 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2458 c->Request.Type.Type = cmd_type;
2459 if (cmd_type == TYPE_CMD) {
2460 switch (cmd) {
2461 case CISS_INQUIRY:
2462 /* are we trying to read a vital product page */
2463 if (page_code != 0) {
2464 c->Request.CDB[1] = 0x01;
2465 c->Request.CDB[2] = page_code;
2467 c->Request.CDBLen = 6;
2468 c->Request.Type.Attribute = ATTR_SIMPLE;
2469 c->Request.Type.Direction = XFER_READ;
2470 c->Request.Timeout = 0;
2471 c->Request.CDB[0] = CISS_INQUIRY;
2472 c->Request.CDB[4] = size & 0xFF;
2473 break;
2474 case CISS_REPORT_LOG:
2475 case CISS_REPORT_PHYS:
2476 /* Talking to controller so It's a physical command
2477 mode = 00 target = 0. Nothing to write.
2479 c->Request.CDBLen = 12;
2480 c->Request.Type.Attribute = ATTR_SIMPLE;
2481 c->Request.Type.Direction = XFER_READ;
2482 c->Request.Timeout = 0;
2483 c->Request.CDB[0] = cmd;
2484 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2485 c->Request.CDB[7] = (size >> 16) & 0xFF;
2486 c->Request.CDB[8] = (size >> 8) & 0xFF;
2487 c->Request.CDB[9] = size & 0xFF;
2488 break;
2490 case CCISS_READ_CAPACITY:
2491 c->Request.CDBLen = 10;
2492 c->Request.Type.Attribute = ATTR_SIMPLE;
2493 c->Request.Type.Direction = XFER_READ;
2494 c->Request.Timeout = 0;
2495 c->Request.CDB[0] = cmd;
2496 break;
2497 case CCISS_READ_CAPACITY_16:
2498 c->Request.CDBLen = 16;
2499 c->Request.Type.Attribute = ATTR_SIMPLE;
2500 c->Request.Type.Direction = XFER_READ;
2501 c->Request.Timeout = 0;
2502 c->Request.CDB[0] = cmd;
2503 c->Request.CDB[1] = 0x10;
2504 c->Request.CDB[10] = (size >> 24) & 0xFF;
2505 c->Request.CDB[11] = (size >> 16) & 0xFF;
2506 c->Request.CDB[12] = (size >> 8) & 0xFF;
2507 c->Request.CDB[13] = size & 0xFF;
2508 c->Request.Timeout = 0;
2509 c->Request.CDB[0] = cmd;
2510 break;
2511 case CCISS_CACHE_FLUSH:
2512 c->Request.CDBLen = 12;
2513 c->Request.Type.Attribute = ATTR_SIMPLE;
2514 c->Request.Type.Direction = XFER_WRITE;
2515 c->Request.Timeout = 0;
2516 c->Request.CDB[0] = BMIC_WRITE;
2517 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2518 break;
2519 case TEST_UNIT_READY:
2520 c->Request.CDBLen = 6;
2521 c->Request.Type.Attribute = ATTR_SIMPLE;
2522 c->Request.Type.Direction = XFER_NONE;
2523 c->Request.Timeout = 0;
2524 break;
2525 default:
2526 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2527 return IO_ERROR;
2529 } else if (cmd_type == TYPE_MSG) {
2530 switch (cmd) {
2531 case 0: /* ABORT message */
2532 c->Request.CDBLen = 12;
2533 c->Request.Type.Attribute = ATTR_SIMPLE;
2534 c->Request.Type.Direction = XFER_WRITE;
2535 c->Request.Timeout = 0;
2536 c->Request.CDB[0] = cmd; /* abort */
2537 c->Request.CDB[1] = 0; /* abort a command */
2538 /* buff contains the tag of the command to abort */
2539 memcpy(&c->Request.CDB[4], buff, 8);
2540 break;
2541 case 1: /* RESET message */
2542 c->Request.CDBLen = 16;
2543 c->Request.Type.Attribute = ATTR_SIMPLE;
2544 c->Request.Type.Direction = XFER_NONE;
2545 c->Request.Timeout = 0;
2546 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2547 c->Request.CDB[0] = cmd; /* reset */
2548 c->Request.CDB[1] = 0x03; /* reset a target */
2549 break;
2550 case 3: /* No-Op message */
2551 c->Request.CDBLen = 1;
2552 c->Request.Type.Attribute = ATTR_SIMPLE;
2553 c->Request.Type.Direction = XFER_WRITE;
2554 c->Request.Timeout = 0;
2555 c->Request.CDB[0] = cmd;
2556 break;
2557 default:
2558 dev_warn(&h->pdev->dev,
2559 "unknown message type %d\n", cmd);
2560 return IO_ERROR;
2562 } else {
2563 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2564 return IO_ERROR;
2566 /* Fill in the scatter gather information */
2567 if (size > 0) {
2568 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2569 buff, size,
2570 PCI_DMA_BIDIRECTIONAL);
2571 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2572 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2573 c->SG[0].Len = size;
2574 c->SG[0].Ext = 0; /* we are not chaining */
2576 return status;
2579 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2581 switch (c->err_info->ScsiStatus) {
2582 case SAM_STAT_GOOD:
2583 return IO_OK;
2584 case SAM_STAT_CHECK_CONDITION:
2585 switch (0xf & c->err_info->SenseInfo[2]) {
2586 case 0: return IO_OK; /* no sense */
2587 case 1: return IO_OK; /* recovered error */
2588 default:
2589 if (check_for_unit_attention(h, c))
2590 return IO_NEEDS_RETRY;
2591 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2592 "check condition, sense key = 0x%02x\n",
2593 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2595 break;
2596 default:
2597 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2598 "scsi status = 0x%02x\n",
2599 c->Request.CDB[0], c->err_info->ScsiStatus);
2600 break;
2602 return IO_ERROR;
2605 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2607 int return_status = IO_OK;
2609 if (c->err_info->CommandStatus == CMD_SUCCESS)
2610 return IO_OK;
2612 switch (c->err_info->CommandStatus) {
2613 case CMD_TARGET_STATUS:
2614 return_status = check_target_status(h, c);
2615 break;
2616 case CMD_DATA_UNDERRUN:
2617 case CMD_DATA_OVERRUN:
2618 /* expected for inquiry and report lun commands */
2619 break;
2620 case CMD_INVALID:
2621 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2622 "reported invalid\n", c->Request.CDB[0]);
2623 return_status = IO_ERROR;
2624 break;
2625 case CMD_PROTOCOL_ERR:
2626 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2627 "protocol error\n", c->Request.CDB[0]);
2628 return_status = IO_ERROR;
2629 break;
2630 case CMD_HARDWARE_ERR:
2631 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2632 " hardware error\n", c->Request.CDB[0]);
2633 return_status = IO_ERROR;
2634 break;
2635 case CMD_CONNECTION_LOST:
2636 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2637 "connection lost\n", c->Request.CDB[0]);
2638 return_status = IO_ERROR;
2639 break;
2640 case CMD_ABORTED:
2641 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2642 "aborted\n", c->Request.CDB[0]);
2643 return_status = IO_ERROR;
2644 break;
2645 case CMD_ABORT_FAILED:
2646 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2647 "abort failed\n", c->Request.CDB[0]);
2648 return_status = IO_ERROR;
2649 break;
2650 case CMD_UNSOLICITED_ABORT:
2651 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2652 c->Request.CDB[0]);
2653 return_status = IO_NEEDS_RETRY;
2654 break;
2655 default:
2656 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2657 "unknown status %x\n", c->Request.CDB[0],
2658 c->err_info->CommandStatus);
2659 return_status = IO_ERROR;
2661 return return_status;
2664 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2665 int attempt_retry)
2667 DECLARE_COMPLETION_ONSTACK(wait);
2668 u64bit buff_dma_handle;
2669 int return_status = IO_OK;
2671 resend_cmd2:
2672 c->waiting = &wait;
2673 enqueue_cmd_and_start_io(h, c);
2675 wait_for_completion(&wait);
2677 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2678 goto command_done;
2680 return_status = process_sendcmd_error(h, c);
2682 if (return_status == IO_NEEDS_RETRY &&
2683 c->retry_count < MAX_CMD_RETRIES) {
2684 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2685 c->Request.CDB[0]);
2686 c->retry_count++;
2687 /* erase the old error information */
2688 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2689 return_status = IO_OK;
2690 INIT_COMPLETION(wait);
2691 goto resend_cmd2;
2694 command_done:
2695 /* unlock the buffers from DMA */
2696 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2697 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2698 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2699 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2700 return return_status;
2703 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2704 __u8 page_code, unsigned char scsi3addr[],
2705 int cmd_type)
2707 CommandList_struct *c;
2708 int return_status;
2710 c = cmd_special_alloc(h);
2711 if (!c)
2712 return -ENOMEM;
2713 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2714 scsi3addr, cmd_type);
2715 if (return_status == IO_OK)
2716 return_status = sendcmd_withirq_core(h, c, 1);
2718 cmd_special_free(h, c);
2719 return return_status;
2722 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2723 sector_t total_size,
2724 unsigned int block_size,
2725 InquiryData_struct *inq_buff,
2726 drive_info_struct *drv)
2728 int return_code;
2729 unsigned long t;
2730 unsigned char scsi3addr[8];
2732 memset(inq_buff, 0, sizeof(InquiryData_struct));
2733 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2734 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2735 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2736 if (return_code == IO_OK) {
2737 if (inq_buff->data_byte[8] == 0xFF) {
2738 dev_warn(&h->pdev->dev,
2739 "reading geometry failed, volume "
2740 "does not support reading geometry\n");
2741 drv->heads = 255;
2742 drv->sectors = 32; /* Sectors per track */
2743 drv->cylinders = total_size + 1;
2744 drv->raid_level = RAID_UNKNOWN;
2745 } else {
2746 drv->heads = inq_buff->data_byte[6];
2747 drv->sectors = inq_buff->data_byte[7];
2748 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2749 drv->cylinders += inq_buff->data_byte[5];
2750 drv->raid_level = inq_buff->data_byte[8];
2752 drv->block_size = block_size;
2753 drv->nr_blocks = total_size + 1;
2754 t = drv->heads * drv->sectors;
2755 if (t > 1) {
2756 sector_t real_size = total_size + 1;
2757 unsigned long rem = sector_div(real_size, t);
2758 if (rem)
2759 real_size++;
2760 drv->cylinders = real_size;
2762 } else { /* Get geometry failed */
2763 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2767 static void
2768 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2769 unsigned int *block_size)
2771 ReadCapdata_struct *buf;
2772 int return_code;
2773 unsigned char scsi3addr[8];
2775 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2776 if (!buf) {
2777 dev_warn(&h->pdev->dev, "out of memory\n");
2778 return;
2781 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2782 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2783 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2784 if (return_code == IO_OK) {
2785 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2786 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2787 } else { /* read capacity command failed */
2788 dev_warn(&h->pdev->dev, "read capacity failed\n");
2789 *total_size = 0;
2790 *block_size = BLOCK_SIZE;
2792 kfree(buf);
2795 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2796 sector_t *total_size, unsigned int *block_size)
2798 ReadCapdata_struct_16 *buf;
2799 int return_code;
2800 unsigned char scsi3addr[8];
2802 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2803 if (!buf) {
2804 dev_warn(&h->pdev->dev, "out of memory\n");
2805 return;
2808 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2809 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2810 buf, sizeof(ReadCapdata_struct_16),
2811 0, scsi3addr, TYPE_CMD);
2812 if (return_code == IO_OK) {
2813 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2814 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2815 } else { /* read capacity command failed */
2816 dev_warn(&h->pdev->dev, "read capacity failed\n");
2817 *total_size = 0;
2818 *block_size = BLOCK_SIZE;
2820 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2821 (unsigned long long)*total_size+1, *block_size);
2822 kfree(buf);
2825 static int cciss_revalidate(struct gendisk *disk)
2827 ctlr_info_t *h = get_host(disk);
2828 drive_info_struct *drv = get_drv(disk);
2829 int logvol;
2830 int FOUND = 0;
2831 unsigned int block_size;
2832 sector_t total_size;
2833 InquiryData_struct *inq_buff = NULL;
2835 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
2836 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2837 sizeof(drv->LunID)) == 0) {
2838 FOUND = 1;
2839 break;
2843 if (!FOUND)
2844 return 1;
2846 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2847 if (inq_buff == NULL) {
2848 dev_warn(&h->pdev->dev, "out of memory\n");
2849 return 1;
2851 if (h->cciss_read == CCISS_READ_10) {
2852 cciss_read_capacity(h, logvol,
2853 &total_size, &block_size);
2854 } else {
2855 cciss_read_capacity_16(h, logvol,
2856 &total_size, &block_size);
2858 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2859 inq_buff, drv);
2861 blk_queue_logical_block_size(drv->queue, drv->block_size);
2862 set_capacity(disk, drv->nr_blocks);
2864 kfree(inq_buff);
2865 return 0;
2869 * Map (physical) PCI mem into (virtual) kernel space
2871 static void __iomem *remap_pci_mem(ulong base, ulong size)
2873 ulong page_base = ((ulong) base) & PAGE_MASK;
2874 ulong page_offs = ((ulong) base) - page_base;
2875 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2877 return page_remapped ? (page_remapped + page_offs) : NULL;
2881 * Takes jobs of the Q and sends them to the hardware, then puts it on
2882 * the Q to wait for completion.
2884 static void start_io(ctlr_info_t *h)
2886 CommandList_struct *c;
2888 while (!hlist_empty(&h->reqQ)) {
2889 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
2890 /* can't do anything if fifo is full */
2891 if ((h->access.fifo_full(h))) {
2892 dev_warn(&h->pdev->dev, "fifo full\n");
2893 break;
2896 /* Get the first entry from the Request Q */
2897 removeQ(c);
2898 h->Qdepth--;
2900 /* Tell the controller execute command */
2901 h->access.submit_command(h, c);
2903 /* Put job onto the completed Q */
2904 addQ(&h->cmpQ, c);
2908 /* Assumes that h->lock is held. */
2909 /* Zeros out the error record and then resends the command back */
2910 /* to the controller */
2911 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
2913 /* erase the old error information */
2914 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2916 /* add it to software queue and then send it to the controller */
2917 addQ(&h->reqQ, c);
2918 h->Qdepth++;
2919 if (h->Qdepth > h->maxQsinceinit)
2920 h->maxQsinceinit = h->Qdepth;
2922 start_io(h);
2925 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2926 unsigned int msg_byte, unsigned int host_byte,
2927 unsigned int driver_byte)
2929 /* inverse of macros in scsi.h */
2930 return (scsi_status_byte & 0xff) |
2931 ((msg_byte & 0xff) << 8) |
2932 ((host_byte & 0xff) << 16) |
2933 ((driver_byte & 0xff) << 24);
2936 static inline int evaluate_target_status(ctlr_info_t *h,
2937 CommandList_struct *cmd, int *retry_cmd)
2939 unsigned char sense_key;
2940 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2941 int error_value;
2943 *retry_cmd = 0;
2944 /* If we get in here, it means we got "target status", that is, scsi status */
2945 status_byte = cmd->err_info->ScsiStatus;
2946 driver_byte = DRIVER_OK;
2947 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2949 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
2950 host_byte = DID_PASSTHROUGH;
2951 else
2952 host_byte = DID_OK;
2954 error_value = make_status_bytes(status_byte, msg_byte,
2955 host_byte, driver_byte);
2957 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
2958 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
2959 dev_warn(&h->pdev->dev, "cmd %p "
2960 "has SCSI Status 0x%x\n",
2961 cmd, cmd->err_info->ScsiStatus);
2962 return error_value;
2965 /* check the sense key */
2966 sense_key = 0xf & cmd->err_info->SenseInfo[2];
2967 /* no status or recovered error */
2968 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
2969 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
2970 error_value = 0;
2972 if (check_for_unit_attention(h, cmd)) {
2973 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
2974 return 0;
2977 /* Not SG_IO or similar? */
2978 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
2979 if (error_value != 0)
2980 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
2981 " sense key = 0x%x\n", cmd, sense_key);
2982 return error_value;
2985 /* SG_IO or similar, copy sense data back */
2986 if (cmd->rq->sense) {
2987 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
2988 cmd->rq->sense_len = cmd->err_info->SenseLen;
2989 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
2990 cmd->rq->sense_len);
2991 } else
2992 cmd->rq->sense_len = 0;
2994 return error_value;
2997 /* checks the status of the job and calls complete buffers to mark all
2998 * buffers for the completed job. Note that this function does not need
2999 * to hold the hba/queue lock.
3001 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3002 int timeout)
3004 int retry_cmd = 0;
3005 struct request *rq = cmd->rq;
3007 rq->errors = 0;
3009 if (timeout)
3010 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3012 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3013 goto after_error_processing;
3015 switch (cmd->err_info->CommandStatus) {
3016 case CMD_TARGET_STATUS:
3017 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3018 break;
3019 case CMD_DATA_UNDERRUN:
3020 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3021 dev_warn(&h->pdev->dev, "cmd %p has"
3022 " completed with data underrun "
3023 "reported\n", cmd);
3024 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3026 break;
3027 case CMD_DATA_OVERRUN:
3028 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3029 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3030 " completed with data overrun "
3031 "reported\n", cmd);
3032 break;
3033 case CMD_INVALID:
3034 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3035 "reported invalid\n", cmd);
3036 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3037 cmd->err_info->CommandStatus, DRIVER_OK,
3038 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3039 DID_PASSTHROUGH : DID_ERROR);
3040 break;
3041 case CMD_PROTOCOL_ERR:
3042 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3043 "protocol error\n", cmd);
3044 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3045 cmd->err_info->CommandStatus, DRIVER_OK,
3046 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3047 DID_PASSTHROUGH : DID_ERROR);
3048 break;
3049 case CMD_HARDWARE_ERR:
3050 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3051 " hardware error\n", cmd);
3052 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3053 cmd->err_info->CommandStatus, DRIVER_OK,
3054 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3055 DID_PASSTHROUGH : DID_ERROR);
3056 break;
3057 case CMD_CONNECTION_LOST:
3058 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3059 "connection lost\n", cmd);
3060 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3061 cmd->err_info->CommandStatus, DRIVER_OK,
3062 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3063 DID_PASSTHROUGH : DID_ERROR);
3064 break;
3065 case CMD_ABORTED:
3066 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3067 "aborted\n", cmd);
3068 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3069 cmd->err_info->CommandStatus, DRIVER_OK,
3070 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3071 DID_PASSTHROUGH : DID_ABORT);
3072 break;
3073 case CMD_ABORT_FAILED:
3074 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3075 "abort failed\n", cmd);
3076 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3077 cmd->err_info->CommandStatus, DRIVER_OK,
3078 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3079 DID_PASSTHROUGH : DID_ERROR);
3080 break;
3081 case CMD_UNSOLICITED_ABORT:
3082 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3083 "abort %p\n", h->ctlr, cmd);
3084 if (cmd->retry_count < MAX_CMD_RETRIES) {
3085 retry_cmd = 1;
3086 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3087 cmd->retry_count++;
3088 } else
3089 dev_warn(&h->pdev->dev,
3090 "%p retried too many times\n", cmd);
3091 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3092 cmd->err_info->CommandStatus, DRIVER_OK,
3093 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3094 DID_PASSTHROUGH : DID_ABORT);
3095 break;
3096 case CMD_TIMEOUT:
3097 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3098 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3099 cmd->err_info->CommandStatus, DRIVER_OK,
3100 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3101 DID_PASSTHROUGH : DID_ERROR);
3102 break;
3103 default:
3104 dev_warn(&h->pdev->dev, "cmd %p returned "
3105 "unknown status %x\n", cmd,
3106 cmd->err_info->CommandStatus);
3107 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3108 cmd->err_info->CommandStatus, DRIVER_OK,
3109 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3110 DID_PASSTHROUGH : DID_ERROR);
3113 after_error_processing:
3115 /* We need to return this command */
3116 if (retry_cmd) {
3117 resend_cciss_cmd(h, cmd);
3118 return;
3120 cmd->rq->completion_data = cmd;
3121 blk_complete_request(cmd->rq);
3124 static inline u32 cciss_tag_contains_index(u32 tag)
3126 #define DIRECT_LOOKUP_BIT 0x10
3127 return tag & DIRECT_LOOKUP_BIT;
3130 static inline u32 cciss_tag_to_index(u32 tag)
3132 #define DIRECT_LOOKUP_SHIFT 5
3133 return tag >> DIRECT_LOOKUP_SHIFT;
3136 static inline u32 cciss_tag_discard_error_bits(u32 tag)
3138 #define CCISS_ERROR_BITS 0x03
3139 return tag & ~CCISS_ERROR_BITS;
3142 static inline void cciss_mark_tag_indexed(u32 *tag)
3144 *tag |= DIRECT_LOOKUP_BIT;
3147 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3149 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3153 * Get a request and submit it to the controller.
3155 static void do_cciss_request(struct request_queue *q)
3157 ctlr_info_t *h = q->queuedata;
3158 CommandList_struct *c;
3159 sector_t start_blk;
3160 int seg;
3161 struct request *creq;
3162 u64bit temp64;
3163 struct scatterlist *tmp_sg;
3164 SGDescriptor_struct *curr_sg;
3165 drive_info_struct *drv;
3166 int i, dir;
3167 int sg_index = 0;
3168 int chained = 0;
3170 /* We call start_io here in case there is a command waiting on the
3171 * queue that has not been sent.
3173 if (blk_queue_plugged(q))
3174 goto startio;
3176 queue:
3177 creq = blk_peek_request(q);
3178 if (!creq)
3179 goto startio;
3181 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3183 c = cmd_alloc(h);
3184 if (!c)
3185 goto full;
3187 blk_start_request(creq);
3189 tmp_sg = h->scatter_list[c->cmdindex];
3190 spin_unlock_irq(q->queue_lock);
3192 c->cmd_type = CMD_RWREQ;
3193 c->rq = creq;
3195 /* fill in the request */
3196 drv = creq->rq_disk->private_data;
3197 c->Header.ReplyQueue = 0; /* unused in simple mode */
3198 /* got command from pool, so use the command block index instead */
3199 /* for direct lookups. */
3200 /* The first 2 bits are reserved for controller error reporting. */
3201 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3202 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3203 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3204 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3205 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3206 c->Request.Type.Attribute = ATTR_SIMPLE;
3207 c->Request.Type.Direction =
3208 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3209 c->Request.Timeout = 0; /* Don't time out */
3210 c->Request.CDB[0] =
3211 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3212 start_blk = blk_rq_pos(creq);
3213 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3214 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3215 sg_init_table(tmp_sg, h->maxsgentries);
3216 seg = blk_rq_map_sg(q, creq, tmp_sg);
3218 /* get the DMA records for the setup */
3219 if (c->Request.Type.Direction == XFER_READ)
3220 dir = PCI_DMA_FROMDEVICE;
3221 else
3222 dir = PCI_DMA_TODEVICE;
3224 curr_sg = c->SG;
3225 sg_index = 0;
3226 chained = 0;
3228 for (i = 0; i < seg; i++) {
3229 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3230 !chained && ((seg - i) > 1)) {
3231 /* Point to next chain block. */
3232 curr_sg = h->cmd_sg_list[c->cmdindex];
3233 sg_index = 0;
3234 chained = 1;
3236 curr_sg[sg_index].Len = tmp_sg[i].length;
3237 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3238 tmp_sg[i].offset,
3239 tmp_sg[i].length, dir);
3240 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3241 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3242 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3243 ++sg_index;
3245 if (chained)
3246 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3247 (seg - (h->max_cmd_sgentries - 1)) *
3248 sizeof(SGDescriptor_struct));
3250 /* track how many SG entries we are using */
3251 if (seg > h->maxSG)
3252 h->maxSG = seg;
3254 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3255 "chained[%d]\n",
3256 blk_rq_sectors(creq), seg, chained);
3258 c->Header.SGTotal = seg + chained;
3259 if (seg <= h->max_cmd_sgentries)
3260 c->Header.SGList = c->Header.SGTotal;
3261 else
3262 c->Header.SGList = h->max_cmd_sgentries;
3263 set_performant_mode(h, c);
3265 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3266 if(h->cciss_read == CCISS_READ_10) {
3267 c->Request.CDB[1] = 0;
3268 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3269 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3270 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3271 c->Request.CDB[5] = start_blk & 0xff;
3272 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3273 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3274 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3275 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3276 } else {
3277 u32 upper32 = upper_32_bits(start_blk);
3279 c->Request.CDBLen = 16;
3280 c->Request.CDB[1]= 0;
3281 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3282 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3283 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3284 c->Request.CDB[5]= upper32 & 0xff;
3285 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3286 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3287 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3288 c->Request.CDB[9]= start_blk & 0xff;
3289 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3290 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3291 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3292 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3293 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3295 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3296 c->Request.CDBLen = creq->cmd_len;
3297 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3298 } else {
3299 dev_warn(&h->pdev->dev, "bad request type %d\n",
3300 creq->cmd_type);
3301 BUG();
3304 spin_lock_irq(q->queue_lock);
3306 addQ(&h->reqQ, c);
3307 h->Qdepth++;
3308 if (h->Qdepth > h->maxQsinceinit)
3309 h->maxQsinceinit = h->Qdepth;
3311 goto queue;
3312 full:
3313 blk_stop_queue(q);
3314 startio:
3315 /* We will already have the driver lock here so not need
3316 * to lock it.
3318 start_io(h);
3321 static inline unsigned long get_next_completion(ctlr_info_t *h)
3323 return h->access.command_completed(h);
3326 static inline int interrupt_pending(ctlr_info_t *h)
3328 return h->access.intr_pending(h);
3331 static inline long interrupt_not_for_us(ctlr_info_t *h)
3333 return ((h->access.intr_pending(h) == 0) ||
3334 (h->interrupts_enabled == 0));
3337 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3338 u32 raw_tag)
3340 if (unlikely(tag_index >= h->nr_cmds)) {
3341 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3342 return 1;
3344 return 0;
3347 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3348 u32 raw_tag)
3350 removeQ(c);
3351 if (likely(c->cmd_type == CMD_RWREQ))
3352 complete_command(h, c, 0);
3353 else if (c->cmd_type == CMD_IOCTL_PEND)
3354 complete(c->waiting);
3355 #ifdef CONFIG_CISS_SCSI_TAPE
3356 else if (c->cmd_type == CMD_SCSI)
3357 complete_scsi_command(c, 0, raw_tag);
3358 #endif
3361 static inline u32 next_command(ctlr_info_t *h)
3363 u32 a;
3365 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3366 return h->access.command_completed(h);
3368 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3369 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3370 (h->reply_pool_head)++;
3371 h->commands_outstanding--;
3372 } else {
3373 a = FIFO_EMPTY;
3375 /* Check for wraparound */
3376 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3377 h->reply_pool_head = h->reply_pool;
3378 h->reply_pool_wraparound ^= 1;
3380 return a;
3383 /* process completion of an indexed ("direct lookup") command */
3384 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3386 u32 tag_index;
3387 CommandList_struct *c;
3389 tag_index = cciss_tag_to_index(raw_tag);
3390 if (bad_tag(h, tag_index, raw_tag))
3391 return next_command(h);
3392 c = h->cmd_pool + tag_index;
3393 finish_cmd(h, c, raw_tag);
3394 return next_command(h);
3397 /* process completion of a non-indexed command */
3398 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3400 u32 tag;
3401 CommandList_struct *c = NULL;
3402 struct hlist_node *tmp;
3403 __u32 busaddr_masked, tag_masked;
3405 tag = cciss_tag_discard_error_bits(raw_tag);
3406 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3407 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3408 tag_masked = cciss_tag_discard_error_bits(tag);
3409 if (busaddr_masked == tag_masked) {
3410 finish_cmd(h, c, raw_tag);
3411 return next_command(h);
3414 bad_tag(h, h->nr_cmds + 1, raw_tag);
3415 return next_command(h);
3418 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3420 ctlr_info_t *h = dev_id;
3421 unsigned long flags;
3422 u32 raw_tag;
3424 if (interrupt_not_for_us(h))
3425 return IRQ_NONE;
3426 spin_lock_irqsave(&h->lock, flags);
3427 while (interrupt_pending(h)) {
3428 raw_tag = get_next_completion(h);
3429 while (raw_tag != FIFO_EMPTY) {
3430 if (cciss_tag_contains_index(raw_tag))
3431 raw_tag = process_indexed_cmd(h, raw_tag);
3432 else
3433 raw_tag = process_nonindexed_cmd(h, raw_tag);
3436 spin_unlock_irqrestore(&h->lock, flags);
3437 return IRQ_HANDLED;
3440 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3441 * check the interrupt pending register because it is not set.
3443 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3445 ctlr_info_t *h = dev_id;
3446 unsigned long flags;
3447 u32 raw_tag;
3449 spin_lock_irqsave(&h->lock, flags);
3450 raw_tag = get_next_completion(h);
3451 while (raw_tag != FIFO_EMPTY) {
3452 if (cciss_tag_contains_index(raw_tag))
3453 raw_tag = process_indexed_cmd(h, raw_tag);
3454 else
3455 raw_tag = process_nonindexed_cmd(h, raw_tag);
3457 spin_unlock_irqrestore(&h->lock, flags);
3458 return IRQ_HANDLED;
3462 * add_to_scan_list() - add controller to rescan queue
3463 * @h: Pointer to the controller.
3465 * Adds the controller to the rescan queue if not already on the queue.
3467 * returns 1 if added to the queue, 0 if skipped (could be on the
3468 * queue already, or the controller could be initializing or shutting
3469 * down).
3471 static int add_to_scan_list(struct ctlr_info *h)
3473 struct ctlr_info *test_h;
3474 int found = 0;
3475 int ret = 0;
3477 if (h->busy_initializing)
3478 return 0;
3480 if (!mutex_trylock(&h->busy_shutting_down))
3481 return 0;
3483 mutex_lock(&scan_mutex);
3484 list_for_each_entry(test_h, &scan_q, scan_list) {
3485 if (test_h == h) {
3486 found = 1;
3487 break;
3490 if (!found && !h->busy_scanning) {
3491 INIT_COMPLETION(h->scan_wait);
3492 list_add_tail(&h->scan_list, &scan_q);
3493 ret = 1;
3495 mutex_unlock(&scan_mutex);
3496 mutex_unlock(&h->busy_shutting_down);
3498 return ret;
3502 * remove_from_scan_list() - remove controller from rescan queue
3503 * @h: Pointer to the controller.
3505 * Removes the controller from the rescan queue if present. Blocks if
3506 * the controller is currently conducting a rescan. The controller
3507 * can be in one of three states:
3508 * 1. Doesn't need a scan
3509 * 2. On the scan list, but not scanning yet (we remove it)
3510 * 3. Busy scanning (and not on the list). In this case we want to wait for
3511 * the scan to complete to make sure the scanning thread for this
3512 * controller is completely idle.
3514 static void remove_from_scan_list(struct ctlr_info *h)
3516 struct ctlr_info *test_h, *tmp_h;
3518 mutex_lock(&scan_mutex);
3519 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3520 if (test_h == h) { /* state 2. */
3521 list_del(&h->scan_list);
3522 complete_all(&h->scan_wait);
3523 mutex_unlock(&scan_mutex);
3524 return;
3527 if (h->busy_scanning) { /* state 3. */
3528 mutex_unlock(&scan_mutex);
3529 wait_for_completion(&h->scan_wait);
3530 } else { /* state 1, nothing to do. */
3531 mutex_unlock(&scan_mutex);
3536 * scan_thread() - kernel thread used to rescan controllers
3537 * @data: Ignored.
3539 * A kernel thread used scan for drive topology changes on
3540 * controllers. The thread processes only one controller at a time
3541 * using a queue. Controllers are added to the queue using
3542 * add_to_scan_list() and removed from the queue either after done
3543 * processing or using remove_from_scan_list().
3545 * returns 0.
3547 static int scan_thread(void *data)
3549 struct ctlr_info *h;
3551 while (1) {
3552 set_current_state(TASK_INTERRUPTIBLE);
3553 schedule();
3554 if (kthread_should_stop())
3555 break;
3557 while (1) {
3558 mutex_lock(&scan_mutex);
3559 if (list_empty(&scan_q)) {
3560 mutex_unlock(&scan_mutex);
3561 break;
3564 h = list_entry(scan_q.next,
3565 struct ctlr_info,
3566 scan_list);
3567 list_del(&h->scan_list);
3568 h->busy_scanning = 1;
3569 mutex_unlock(&scan_mutex);
3571 rebuild_lun_table(h, 0, 0);
3572 complete_all(&h->scan_wait);
3573 mutex_lock(&scan_mutex);
3574 h->busy_scanning = 0;
3575 mutex_unlock(&scan_mutex);
3579 return 0;
3582 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3584 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3585 return 0;
3587 switch (c->err_info->SenseInfo[12]) {
3588 case STATE_CHANGED:
3589 dev_warn(&h->pdev->dev, "a state change "
3590 "detected, command retried\n");
3591 return 1;
3592 break;
3593 case LUN_FAILED:
3594 dev_warn(&h->pdev->dev, "LUN failure "
3595 "detected, action required\n");
3596 return 1;
3597 break;
3598 case REPORT_LUNS_CHANGED:
3599 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3601 * Here, we could call add_to_scan_list and wake up the scan thread,
3602 * except that it's quite likely that we will get more than one
3603 * REPORT_LUNS_CHANGED condition in quick succession, which means
3604 * that those which occur after the first one will likely happen
3605 * *during* the scan_thread's rescan. And the rescan code is not
3606 * robust enough to restart in the middle, undoing what it has already
3607 * done, and it's not clear that it's even possible to do this, since
3608 * part of what it does is notify the block layer, which starts
3609 * doing it's own i/o to read partition tables and so on, and the
3610 * driver doesn't have visibility to know what might need undoing.
3611 * In any event, if possible, it is horribly complicated to get right
3612 * so we just don't do it for now.
3614 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3616 return 1;
3617 break;
3618 case POWER_OR_RESET:
3619 dev_warn(&h->pdev->dev,
3620 "a power on or device reset detected\n");
3621 return 1;
3622 break;
3623 case UNIT_ATTENTION_CLEARED:
3624 dev_warn(&h->pdev->dev,
3625 "unit attention cleared by another initiator\n");
3626 return 1;
3627 break;
3628 default:
3629 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3630 return 1;
3635 * We cannot read the structure directly, for portability we must use
3636 * the io functions.
3637 * This is for debug only.
3639 static void print_cfg_table(ctlr_info_t *h)
3641 int i;
3642 char temp_name[17];
3643 CfgTable_struct *tb = h->cfgtable;
3645 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3646 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3647 for (i = 0; i < 4; i++)
3648 temp_name[i] = readb(&(tb->Signature[i]));
3649 temp_name[4] = '\0';
3650 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3651 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3652 readl(&(tb->SpecValence)));
3653 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3654 readl(&(tb->TransportSupport)));
3655 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3656 readl(&(tb->TransportActive)));
3657 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3658 readl(&(tb->HostWrite.TransportRequest)));
3659 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3660 readl(&(tb->HostWrite.CoalIntDelay)));
3661 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3662 readl(&(tb->HostWrite.CoalIntCount)));
3663 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3664 readl(&(tb->CmdsOutMax)));
3665 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3666 readl(&(tb->BusTypes)));
3667 for (i = 0; i < 16; i++)
3668 temp_name[i] = readb(&(tb->ServerName[i]));
3669 temp_name[16] = '\0';
3670 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3671 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3672 readl(&(tb->HeartBeat)));
3675 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3677 int i, offset, mem_type, bar_type;
3678 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3679 return 0;
3680 offset = 0;
3681 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3682 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3683 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3684 offset += 4;
3685 else {
3686 mem_type = pci_resource_flags(pdev, i) &
3687 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3688 switch (mem_type) {
3689 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3690 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3691 offset += 4; /* 32 bit */
3692 break;
3693 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3694 offset += 8;
3695 break;
3696 default: /* reserved in PCI 2.2 */
3697 dev_warn(&pdev->dev,
3698 "Base address is invalid\n");
3699 return -1;
3700 break;
3703 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3704 return i + 1;
3706 return -1;
3709 /* Fill in bucket_map[], given nsgs (the max number of
3710 * scatter gather elements supported) and bucket[],
3711 * which is an array of 8 integers. The bucket[] array
3712 * contains 8 different DMA transfer sizes (in 16
3713 * byte increments) which the controller uses to fetch
3714 * commands. This function fills in bucket_map[], which
3715 * maps a given number of scatter gather elements to one of
3716 * the 8 DMA transfer sizes. The point of it is to allow the
3717 * controller to only do as much DMA as needed to fetch the
3718 * command, with the DMA transfer size encoded in the lower
3719 * bits of the command address.
3721 static void calc_bucket_map(int bucket[], int num_buckets,
3722 int nsgs, int *bucket_map)
3724 int i, j, b, size;
3726 /* even a command with 0 SGs requires 4 blocks */
3727 #define MINIMUM_TRANSFER_BLOCKS 4
3728 #define NUM_BUCKETS 8
3729 /* Note, bucket_map must have nsgs+1 entries. */
3730 for (i = 0; i <= nsgs; i++) {
3731 /* Compute size of a command with i SG entries */
3732 size = i + MINIMUM_TRANSFER_BLOCKS;
3733 b = num_buckets; /* Assume the biggest bucket */
3734 /* Find the bucket that is just big enough */
3735 for (j = 0; j < 8; j++) {
3736 if (bucket[j] >= size) {
3737 b = j;
3738 break;
3741 /* for a command with i SG entries, use bucket b. */
3742 bucket_map[i] = b;
3746 static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3748 int i;
3750 /* under certain very rare conditions, this can take awhile.
3751 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3752 * as we enter this code.) */
3753 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3754 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3755 break;
3756 msleep(10);
3760 static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3762 /* This is a bit complicated. There are 8 registers on
3763 * the controller which we write to to tell it 8 different
3764 * sizes of commands which there may be. It's a way of
3765 * reducing the DMA done to fetch each command. Encoded into
3766 * each command's tag are 3 bits which communicate to the controller
3767 * which of the eight sizes that command fits within. The size of
3768 * each command depends on how many scatter gather entries there are.
3769 * Each SG entry requires 16 bytes. The eight registers are programmed
3770 * with the number of 16-byte blocks a command of that size requires.
3771 * The smallest command possible requires 5 such 16 byte blocks.
3772 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3773 * blocks. Note, this only extends to the SG entries contained
3774 * within the command block, and does not extend to chained blocks
3775 * of SG elements. bft[] contains the eight values we write to
3776 * the registers. They are not evenly distributed, but have more
3777 * sizes for small commands, and fewer sizes for larger commands.
3779 __u32 trans_offset;
3780 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3782 * 5 = 1 s/g entry or 4k
3783 * 6 = 2 s/g entry or 8k
3784 * 8 = 4 s/g entry or 16k
3785 * 10 = 6 s/g entry or 24k
3787 unsigned long register_value;
3788 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3790 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3792 /* Controller spec: zero out this buffer. */
3793 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3794 h->reply_pool_head = h->reply_pool;
3796 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3797 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3798 h->blockFetchTable);
3799 writel(bft[0], &h->transtable->BlockFetch0);
3800 writel(bft[1], &h->transtable->BlockFetch1);
3801 writel(bft[2], &h->transtable->BlockFetch2);
3802 writel(bft[3], &h->transtable->BlockFetch3);
3803 writel(bft[4], &h->transtable->BlockFetch4);
3804 writel(bft[5], &h->transtable->BlockFetch5);
3805 writel(bft[6], &h->transtable->BlockFetch6);
3806 writel(bft[7], &h->transtable->BlockFetch7);
3808 /* size of controller ring buffer */
3809 writel(h->max_commands, &h->transtable->RepQSize);
3810 writel(1, &h->transtable->RepQCount);
3811 writel(0, &h->transtable->RepQCtrAddrLow32);
3812 writel(0, &h->transtable->RepQCtrAddrHigh32);
3813 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3814 writel(0, &h->transtable->RepQAddr0High32);
3815 writel(CFGTBL_Trans_Performant,
3816 &(h->cfgtable->HostWrite.TransportRequest));
3818 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3819 cciss_wait_for_mode_change_ack(h);
3820 register_value = readl(&(h->cfgtable->TransportActive));
3821 if (!(register_value & CFGTBL_Trans_Performant))
3822 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
3823 " performant mode\n");
3826 static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3828 __u32 trans_support;
3830 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3831 /* Attempt to put controller into performant mode if supported */
3832 /* Does board support performant mode? */
3833 trans_support = readl(&(h->cfgtable->TransportSupport));
3834 if (!(trans_support & PERFORMANT_MODE))
3835 return;
3837 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
3838 /* Performant mode demands commands on a 32 byte boundary
3839 * pci_alloc_consistent aligns on page boundarys already.
3840 * Just need to check if divisible by 32
3842 if ((sizeof(CommandList_struct) % 32) != 0) {
3843 dev_warn(&h->pdev->dev, "%s %d %s\n",
3844 "cciss info: command size[",
3845 (int)sizeof(CommandList_struct),
3846 "] not divisible by 32, no performant mode..\n");
3847 return;
3850 /* Performant mode ring buffer and supporting data structures */
3851 h->reply_pool = (__u64 *)pci_alloc_consistent(
3852 h->pdev, h->max_commands * sizeof(__u64),
3853 &(h->reply_pool_dhandle));
3855 /* Need a block fetch table for performant mode */
3856 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3857 sizeof(__u32)), GFP_KERNEL);
3859 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3860 goto clean_up;
3862 cciss_enter_performant_mode(h);
3864 /* Change the access methods to the performant access methods */
3865 h->access = SA5_performant_access;
3866 h->transMethod = CFGTBL_Trans_Performant;
3868 return;
3869 clean_up:
3870 kfree(h->blockFetchTable);
3871 if (h->reply_pool)
3872 pci_free_consistent(h->pdev,
3873 h->max_commands * sizeof(__u64),
3874 h->reply_pool,
3875 h->reply_pool_dhandle);
3876 return;
3878 } /* cciss_put_controller_into_performant_mode */
3880 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3881 * controllers that are capable. If not, we use IO-APIC mode.
3884 static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
3886 #ifdef CONFIG_PCI_MSI
3887 int err;
3888 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3889 {0, 2}, {0, 3}
3892 /* Some boards advertise MSI but don't really support it */
3893 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3894 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3895 goto default_int_mode;
3897 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3898 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
3899 if (!err) {
3900 h->intr[0] = cciss_msix_entries[0].vector;
3901 h->intr[1] = cciss_msix_entries[1].vector;
3902 h->intr[2] = cciss_msix_entries[2].vector;
3903 h->intr[3] = cciss_msix_entries[3].vector;
3904 h->msix_vector = 1;
3905 return;
3907 if (err > 0) {
3908 dev_warn(&h->pdev->dev,
3909 "only %d MSI-X vectors available\n", err);
3910 goto default_int_mode;
3911 } else {
3912 dev_warn(&h->pdev->dev,
3913 "MSI-X init failed %d\n", err);
3914 goto default_int_mode;
3917 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3918 if (!pci_enable_msi(h->pdev))
3919 h->msi_vector = 1;
3920 else
3921 dev_warn(&h->pdev->dev, "MSI init failed\n");
3923 default_int_mode:
3924 #endif /* CONFIG_PCI_MSI */
3925 /* if we get here we're going to use the default interrupt mode */
3926 h->intr[PERF_MODE_INT] = h->pdev->irq;
3927 return;
3930 static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3932 int i;
3933 u32 subsystem_vendor_id, subsystem_device_id;
3935 subsystem_vendor_id = pdev->subsystem_vendor;
3936 subsystem_device_id = pdev->subsystem_device;
3937 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3938 subsystem_vendor_id;
3940 for (i = 0; i < ARRAY_SIZE(products); i++) {
3941 if (*board_id == products[i].board_id)
3942 return i;
3944 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3945 *board_id);
3946 return -ENODEV;
3949 static inline bool cciss_board_disabled(ctlr_info_t *h)
3951 u16 command;
3953 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
3954 return ((command & PCI_COMMAND_MEMORY) == 0);
3957 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
3958 unsigned long *memory_bar)
3960 int i;
3962 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3963 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3964 /* addressing mode bits already removed */
3965 *memory_bar = pci_resource_start(pdev, i);
3966 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3967 *memory_bar);
3968 return 0;
3970 dev_warn(&pdev->dev, "no memory BAR found\n");
3971 return -ENODEV;
3974 static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
3976 int i;
3977 u32 scratchpad;
3979 for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
3980 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
3981 if (scratchpad == CCISS_FIRMWARE_READY)
3982 return 0;
3983 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
3985 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
3986 return -ENODEV;
3989 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
3990 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3991 u64 *cfg_offset)
3993 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3994 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3995 *cfg_base_addr &= (u32) 0x0000ffff;
3996 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3997 if (*cfg_base_addr_index == -1) {
3998 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
3999 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4000 return -ENODEV;
4002 return 0;
4005 static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4007 u64 cfg_offset;
4008 u32 cfg_base_addr;
4009 u64 cfg_base_addr_index;
4010 u32 trans_offset;
4011 int rc;
4013 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4014 &cfg_base_addr_index, &cfg_offset);
4015 if (rc)
4016 return rc;
4017 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4018 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4019 if (!h->cfgtable)
4020 return -ENOMEM;
4021 /* Find performant mode table. */
4022 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4023 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4024 cfg_base_addr_index)+cfg_offset+trans_offset,
4025 sizeof(*h->transtable));
4026 if (!h->transtable)
4027 return -ENOMEM;
4028 return 0;
4031 static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4033 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4034 if (h->max_commands < 16) {
4035 dev_warn(&h->pdev->dev, "Controller reports "
4036 "max supported commands of %d, an obvious lie. "
4037 "Using 16. Ensure that firmware is up to date.\n",
4038 h->max_commands);
4039 h->max_commands = 16;
4043 /* Interrogate the hardware for some limits:
4044 * max commands, max SG elements without chaining, and with chaining,
4045 * SG chain block size, etc.
4047 static void __devinit cciss_find_board_params(ctlr_info_t *h)
4049 cciss_get_max_perf_mode_cmds(h);
4050 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4051 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4053 * Limit in-command s/g elements to 32 save dma'able memory.
4054 * Howvever spec says if 0, use 31
4056 h->max_cmd_sgentries = 31;
4057 if (h->maxsgentries > 512) {
4058 h->max_cmd_sgentries = 32;
4059 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4060 h->maxsgentries--; /* save one for chain pointer */
4061 } else {
4062 h->maxsgentries = 31; /* default to traditional values */
4063 h->chainsize = 0;
4067 static inline bool CISS_signature_present(ctlr_info_t *h)
4069 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4070 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4071 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4072 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4073 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4074 return false;
4076 return true;
4079 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4080 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4082 #ifdef CONFIG_X86
4083 u32 prefetch;
4085 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4086 prefetch |= 0x100;
4087 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4088 #endif
4091 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4092 * in a prefetch beyond physical memory.
4094 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4096 u32 dma_prefetch;
4097 __u32 dma_refetch;
4099 if (h->board_id != 0x3225103C)
4100 return;
4101 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4102 dma_prefetch |= 0x8000;
4103 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4104 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4105 dma_refetch |= 0x1;
4106 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4109 static int __devinit cciss_pci_init(ctlr_info_t *h)
4111 int prod_index, err;
4113 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4114 if (prod_index < 0)
4115 return -ENODEV;
4116 h->product_name = products[prod_index].product_name;
4117 h->access = *(products[prod_index].access);
4119 if (cciss_board_disabled(h)) {
4120 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4121 return -ENODEV;
4123 err = pci_enable_device(h->pdev);
4124 if (err) {
4125 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4126 return err;
4129 err = pci_request_regions(h->pdev, "cciss");
4130 if (err) {
4131 dev_warn(&h->pdev->dev,
4132 "Cannot obtain PCI resources, aborting\n");
4133 return err;
4136 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4137 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4139 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4140 * else we use the IO-APIC interrupt assigned to us by system ROM.
4142 cciss_interrupt_mode(h);
4143 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4144 if (err)
4145 goto err_out_free_res;
4146 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4147 if (!h->vaddr) {
4148 err = -ENOMEM;
4149 goto err_out_free_res;
4151 err = cciss_wait_for_board_ready(h);
4152 if (err)
4153 goto err_out_free_res;
4154 err = cciss_find_cfgtables(h);
4155 if (err)
4156 goto err_out_free_res;
4157 print_cfg_table(h);
4158 cciss_find_board_params(h);
4160 if (!CISS_signature_present(h)) {
4161 err = -ENODEV;
4162 goto err_out_free_res;
4164 cciss_enable_scsi_prefetch(h);
4165 cciss_p600_dma_prefetch_quirk(h);
4166 cciss_put_controller_into_performant_mode(h);
4167 return 0;
4169 err_out_free_res:
4171 * Deliberately omit pci_disable_device(): it does something nasty to
4172 * Smart Array controllers that pci_enable_device does not undo
4174 if (h->transtable)
4175 iounmap(h->transtable);
4176 if (h->cfgtable)
4177 iounmap(h->cfgtable);
4178 if (h->vaddr)
4179 iounmap(h->vaddr);
4180 pci_release_regions(h->pdev);
4181 return err;
4184 /* Function to find the first free pointer into our hba[] array
4185 * Returns -1 if no free entries are left.
4187 static int alloc_cciss_hba(struct pci_dev *pdev)
4189 int i;
4191 for (i = 0; i < MAX_CTLR; i++) {
4192 if (!hba[i]) {
4193 ctlr_info_t *h;
4195 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4196 if (!h)
4197 goto Enomem;
4198 hba[i] = h;
4199 return i;
4202 dev_warn(&pdev->dev, "This driver supports a maximum"
4203 " of %d controllers.\n", MAX_CTLR);
4204 return -1;
4205 Enomem:
4206 dev_warn(&pdev->dev, "out of memory.\n");
4207 return -1;
4210 static void free_hba(ctlr_info_t *h)
4212 int i;
4214 hba[h->ctlr] = NULL;
4215 for (i = 0; i < h->highest_lun + 1; i++)
4216 if (h->gendisk[i] != NULL)
4217 put_disk(h->gendisk[i]);
4218 kfree(h);
4221 /* Send a message CDB to the firmware. */
4222 static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4224 typedef struct {
4225 CommandListHeader_struct CommandHeader;
4226 RequestBlock_struct Request;
4227 ErrDescriptor_struct ErrorDescriptor;
4228 } Command;
4229 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4230 Command *cmd;
4231 dma_addr_t paddr64;
4232 uint32_t paddr32, tag;
4233 void __iomem *vaddr;
4234 int i, err;
4236 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4237 if (vaddr == NULL)
4238 return -ENOMEM;
4240 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4241 CCISS commands, so they must be allocated from the lower 4GiB of
4242 memory. */
4243 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4244 if (err) {
4245 iounmap(vaddr);
4246 return -ENOMEM;
4249 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4250 if (cmd == NULL) {
4251 iounmap(vaddr);
4252 return -ENOMEM;
4255 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4256 although there's no guarantee, we assume that the address is at
4257 least 4-byte aligned (most likely, it's page-aligned). */
4258 paddr32 = paddr64;
4260 cmd->CommandHeader.ReplyQueue = 0;
4261 cmd->CommandHeader.SGList = 0;
4262 cmd->CommandHeader.SGTotal = 0;
4263 cmd->CommandHeader.Tag.lower = paddr32;
4264 cmd->CommandHeader.Tag.upper = 0;
4265 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4267 cmd->Request.CDBLen = 16;
4268 cmd->Request.Type.Type = TYPE_MSG;
4269 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4270 cmd->Request.Type.Direction = XFER_NONE;
4271 cmd->Request.Timeout = 0; /* Don't time out */
4272 cmd->Request.CDB[0] = opcode;
4273 cmd->Request.CDB[1] = type;
4274 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4276 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4277 cmd->ErrorDescriptor.Addr.upper = 0;
4278 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4280 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4282 for (i = 0; i < 10; i++) {
4283 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4284 if ((tag & ~3) == paddr32)
4285 break;
4286 schedule_timeout_uninterruptible(HZ);
4289 iounmap(vaddr);
4291 /* we leak the DMA buffer here ... no choice since the controller could
4292 still complete the command. */
4293 if (i == 10) {
4294 dev_err(&pdev->dev,
4295 "controller message %02x:%02x timed out\n",
4296 opcode, type);
4297 return -ETIMEDOUT;
4300 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4302 if (tag & 2) {
4303 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4304 opcode, type);
4305 return -EIO;
4308 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4309 opcode, type);
4310 return 0;
4313 #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4314 #define cciss_noop(p) cciss_message(p, 3, 0)
4316 static __devinit int cciss_reset_msi(struct pci_dev *pdev)
4318 /* the #defines are stolen from drivers/pci/msi.h. */
4319 #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
4320 #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
4322 int pos;
4323 u16 control = 0;
4325 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
4326 if (pos) {
4327 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4328 if (control & PCI_MSI_FLAGS_ENABLE) {
4329 dev_info(&pdev->dev, "resetting MSI\n");
4330 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
4334 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
4335 if (pos) {
4336 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4337 if (control & PCI_MSIX_FLAGS_ENABLE) {
4338 dev_info(&pdev->dev, "resetting MSI-X\n");
4339 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
4343 return 0;
4346 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4347 void * __iomem vaddr, bool use_doorbell)
4349 u16 pmcsr;
4350 int pos;
4352 if (use_doorbell) {
4353 /* For everything after the P600, the PCI power state method
4354 * of resetting the controller doesn't work, so we have this
4355 * other way using the doorbell register.
4357 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4358 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4359 msleep(1000);
4360 } else { /* Try to do it the PCI power state way */
4362 /* Quoting from the Open CISS Specification: "The Power
4363 * Management Control/Status Register (CSR) controls the power
4364 * state of the device. The normal operating state is D0,
4365 * CSR=00h. The software off state is D3, CSR=03h. To reset
4366 * the controller, place the interface device in D3 then to D0,
4367 * this causes a secondary PCI reset which will reset the
4368 * controller." */
4370 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4371 if (pos == 0) {
4372 dev_err(&pdev->dev,
4373 "cciss_controller_hard_reset: "
4374 "PCI PM not supported\n");
4375 return -ENODEV;
4377 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4378 /* enter the D3hot power management state */
4379 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4380 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4381 pmcsr |= PCI_D3hot;
4382 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4384 msleep(500);
4386 /* enter the D0 power management state */
4387 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4388 pmcsr |= PCI_D0;
4389 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4391 msleep(500);
4393 return 0;
4396 /* This does a hard reset of the controller using PCI power management
4397 * states or using the doorbell register. */
4398 static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4400 u16 saved_config_space[32];
4401 u64 cfg_offset;
4402 u32 cfg_base_addr;
4403 u64 cfg_base_addr_index;
4404 void __iomem *vaddr;
4405 unsigned long paddr;
4406 u32 misc_fw_support, active_transport;
4407 int rc, i;
4408 CfgTable_struct __iomem *cfgtable;
4409 bool use_doorbell;
4410 u32 board_id;
4412 /* For controllers as old a the p600, this is very nearly
4413 * the same thing as
4415 * pci_save_state(pci_dev);
4416 * pci_set_power_state(pci_dev, PCI_D3hot);
4417 * pci_set_power_state(pci_dev, PCI_D0);
4418 * pci_restore_state(pci_dev);
4420 * but we can't use these nice canned kernel routines on
4421 * kexec, because they also check the MSI/MSI-X state in PCI
4422 * configuration space and do the wrong thing when it is
4423 * set/cleared. Also, the pci_save/restore_state functions
4424 * violate the ordering requirements for restoring the
4425 * configuration space from the CCISS document (see the
4426 * comment below). So we roll our own ....
4428 * For controllers newer than the P600, the pci power state
4429 * method of resetting doesn't work so we have another way
4430 * using the doorbell register.
4433 /* Exclude 640x boards. These are two pci devices in one slot
4434 * which share a battery backed cache module. One controls the
4435 * cache, the other accesses the cache through the one that controls
4436 * it. If we reset the one controlling the cache, the other will
4437 * likely not be happy. Just forbid resetting this conjoined mess.
4439 cciss_lookup_board_id(pdev, &board_id);
4440 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4441 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4442 "due to shared cache module.");
4443 return -ENODEV;
4446 for (i = 0; i < 32; i++)
4447 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
4449 /* find the first memory BAR, so we can find the cfg table */
4450 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4451 if (rc)
4452 return rc;
4453 vaddr = remap_pci_mem(paddr, 0x250);
4454 if (!vaddr)
4455 return -ENOMEM;
4457 /* find cfgtable in order to check if reset via doorbell is supported */
4458 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4459 &cfg_base_addr_index, &cfg_offset);
4460 if (rc)
4461 goto unmap_vaddr;
4462 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4463 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4464 if (!cfgtable) {
4465 rc = -ENOMEM;
4466 goto unmap_vaddr;
4469 /* If reset via doorbell register is supported, use that. */
4470 misc_fw_support = readl(&cfgtable->misc_fw_support);
4471 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4473 /* The doorbell reset seems to cause lockups on some Smart
4474 * Arrays (e.g. P410, P410i, maybe others). Until this is
4475 * fixed or at least isolated, avoid the doorbell reset.
4477 use_doorbell = 0;
4479 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4480 if (rc)
4481 goto unmap_cfgtable;
4483 /* Restore the PCI configuration space. The Open CISS
4484 * Specification says, "Restore the PCI Configuration
4485 * Registers, offsets 00h through 60h. It is important to
4486 * restore the command register, 16-bits at offset 04h,
4487 * last. Do not restore the configuration status register,
4488 * 16-bits at offset 06h." Note that the offset is 2*i.
4490 for (i = 0; i < 32; i++) {
4491 if (i == 2 || i == 3)
4492 continue;
4493 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
4495 wmb();
4496 pci_write_config_word(pdev, 4, saved_config_space[2]);
4498 /* Some devices (notably the HP Smart Array 5i Controller)
4499 need a little pause here */
4500 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4502 /* Controller should be in simple mode at this point. If it's not,
4503 * It means we're on one of those controllers which doesn't support
4504 * the doorbell reset method and on which the PCI power management reset
4505 * method doesn't work (P800, for example.)
4506 * In those cases, don't try to proceed, as it generally doesn't work.
4508 active_transport = readl(&cfgtable->TransportActive);
4509 if (active_transport & PERFORMANT_MODE) {
4510 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4511 " Ignoring controller.\n");
4512 rc = -ENODEV;
4515 unmap_cfgtable:
4516 iounmap(cfgtable);
4518 unmap_vaddr:
4519 iounmap(vaddr);
4520 return rc;
4523 static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4525 int rc, i;
4527 if (!reset_devices)
4528 return 0;
4530 /* Reset the controller with a PCI power-cycle or via doorbell */
4531 rc = cciss_kdump_hard_reset_controller(pdev);
4533 /* -ENOTSUPP here means we cannot reset the controller
4534 * but it's already (and still) up and running in
4535 * "performant mode". Or, it might be 640x, which can't reset
4536 * due to concerns about shared bbwc between 6402/6404 pair.
4538 if (rc == -ENOTSUPP)
4539 return 0; /* just try to do the kdump anyhow. */
4540 if (rc)
4541 return -ENODEV;
4542 if (cciss_reset_msi(pdev))
4543 return -ENODEV;
4545 /* Now try to get the controller to respond to a no-op */
4546 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4547 if (cciss_noop(pdev) == 0)
4548 break;
4549 else
4550 dev_warn(&pdev->dev, "no-op failed%s\n",
4551 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4552 "; re-trying" : ""));
4553 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4555 return 0;
4559 * This is it. Find all the controllers and register them. I really hate
4560 * stealing all these major device numbers.
4561 * returns the number of block devices registered.
4563 static int __devinit cciss_init_one(struct pci_dev *pdev,
4564 const struct pci_device_id *ent)
4566 int i;
4567 int j = 0;
4568 int k = 0;
4569 int rc;
4570 int dac, return_code;
4571 InquiryData_struct *inq_buff;
4572 ctlr_info_t *h;
4574 rc = cciss_init_reset_devices(pdev);
4575 if (rc)
4576 return rc;
4577 i = alloc_cciss_hba(pdev);
4578 if (i < 0)
4579 return -1;
4581 h = hba[i];
4582 h->pdev = pdev;
4583 h->busy_initializing = 1;
4584 INIT_HLIST_HEAD(&h->cmpQ);
4585 INIT_HLIST_HEAD(&h->reqQ);
4586 mutex_init(&h->busy_shutting_down);
4588 if (cciss_pci_init(h) != 0)
4589 goto clean_no_release_regions;
4591 sprintf(h->devname, "cciss%d", i);
4592 h->ctlr = i;
4594 init_completion(&h->scan_wait);
4596 if (cciss_create_hba_sysfs_entry(h))
4597 goto clean0;
4599 /* configure PCI DMA stuff */
4600 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
4601 dac = 1;
4602 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
4603 dac = 0;
4604 else {
4605 dev_err(&h->pdev->dev, "no suitable DMA available\n");
4606 goto clean1;
4610 * register with the major number, or get a dynamic major number
4611 * by passing 0 as argument. This is done for greater than
4612 * 8 controller support.
4614 if (i < MAX_CTLR_ORIG)
4615 h->major = COMPAQ_CISS_MAJOR + i;
4616 rc = register_blkdev(h->major, h->devname);
4617 if (rc == -EBUSY || rc == -EINVAL) {
4618 dev_err(&h->pdev->dev,
4619 "Unable to get major number %d for %s "
4620 "on hba %d\n", h->major, h->devname, i);
4621 goto clean1;
4622 } else {
4623 if (i >= MAX_CTLR_ORIG)
4624 h->major = rc;
4627 /* make sure the board interrupts are off */
4628 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4629 if (h->msi_vector || h->msix_vector) {
4630 if (request_irq(h->intr[PERF_MODE_INT],
4631 do_cciss_msix_intr,
4632 IRQF_DISABLED, h->devname, h)) {
4633 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4634 h->intr[PERF_MODE_INT], h->devname);
4635 goto clean2;
4637 } else {
4638 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4639 IRQF_DISABLED, h->devname, h)) {
4640 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4641 h->intr[PERF_MODE_INT], h->devname);
4642 goto clean2;
4646 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
4647 h->devname, pdev->device, pci_name(pdev),
4648 h->intr[PERF_MODE_INT], dac ? "" : " not");
4650 h->cmd_pool_bits =
4651 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4652 * sizeof(unsigned long), GFP_KERNEL);
4653 h->cmd_pool = (CommandList_struct *)
4654 pci_alloc_consistent(h->pdev,
4655 h->nr_cmds * sizeof(CommandList_struct),
4656 &(h->cmd_pool_dhandle));
4657 h->errinfo_pool = (ErrorInfo_struct *)
4658 pci_alloc_consistent(h->pdev,
4659 h->nr_cmds * sizeof(ErrorInfo_struct),
4660 &(h->errinfo_pool_dhandle));
4661 if ((h->cmd_pool_bits == NULL)
4662 || (h->cmd_pool == NULL)
4663 || (h->errinfo_pool == NULL)) {
4664 dev_err(&h->pdev->dev, "out of memory");
4665 goto clean4;
4668 /* Need space for temp scatter list */
4669 h->scatter_list = kmalloc(h->max_commands *
4670 sizeof(struct scatterlist *),
4671 GFP_KERNEL);
4672 if (!h->scatter_list)
4673 goto clean4;
4675 for (k = 0; k < h->nr_cmds; k++) {
4676 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4677 h->maxsgentries,
4678 GFP_KERNEL);
4679 if (h->scatter_list[k] == NULL) {
4680 dev_err(&h->pdev->dev,
4681 "could not allocate s/g lists\n");
4682 goto clean4;
4685 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4686 h->chainsize, h->nr_cmds);
4687 if (!h->cmd_sg_list && h->chainsize > 0)
4688 goto clean4;
4690 spin_lock_init(&h->lock);
4692 /* Initialize the pdev driver private data.
4693 have it point to h. */
4694 pci_set_drvdata(pdev, h);
4695 /* command and error info recs zeroed out before
4696 they are used */
4697 memset(h->cmd_pool_bits, 0,
4698 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
4699 * sizeof(unsigned long));
4701 h->num_luns = 0;
4702 h->highest_lun = -1;
4703 for (j = 0; j < CISS_MAX_LUN; j++) {
4704 h->drv[j] = NULL;
4705 h->gendisk[j] = NULL;
4708 cciss_scsi_setup(h);
4710 /* Turn the interrupts on so we can service requests */
4711 h->access.set_intr_mask(h, CCISS_INTR_ON);
4713 /* Get the firmware version */
4714 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4715 if (inq_buff == NULL) {
4716 dev_err(&h->pdev->dev, "out of memory\n");
4717 goto clean4;
4720 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
4721 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
4722 if (return_code == IO_OK) {
4723 h->firm_ver[0] = inq_buff->data_byte[32];
4724 h->firm_ver[1] = inq_buff->data_byte[33];
4725 h->firm_ver[2] = inq_buff->data_byte[34];
4726 h->firm_ver[3] = inq_buff->data_byte[35];
4727 } else { /* send command failed */
4728 dev_warn(&h->pdev->dev, "unable to determine firmware"
4729 " version of controller\n");
4731 kfree(inq_buff);
4733 cciss_procinit(h);
4735 h->cciss_max_sectors = 8192;
4737 rebuild_lun_table(h, 1, 0);
4738 h->busy_initializing = 0;
4739 return 1;
4741 clean4:
4742 kfree(h->cmd_pool_bits);
4743 /* Free up sg elements */
4744 for (k-- ; k >= 0; k--)
4745 kfree(h->scatter_list[k]);
4746 kfree(h->scatter_list);
4747 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4748 if (h->cmd_pool)
4749 pci_free_consistent(h->pdev,
4750 h->nr_cmds * sizeof(CommandList_struct),
4751 h->cmd_pool, h->cmd_pool_dhandle);
4752 if (h->errinfo_pool)
4753 pci_free_consistent(h->pdev,
4754 h->nr_cmds * sizeof(ErrorInfo_struct),
4755 h->errinfo_pool,
4756 h->errinfo_pool_dhandle);
4757 free_irq(h->intr[PERF_MODE_INT], h);
4758 clean2:
4759 unregister_blkdev(h->major, h->devname);
4760 clean1:
4761 cciss_destroy_hba_sysfs_entry(h);
4762 clean0:
4763 pci_release_regions(pdev);
4764 clean_no_release_regions:
4765 h->busy_initializing = 0;
4768 * Deliberately omit pci_disable_device(): it does something nasty to
4769 * Smart Array controllers that pci_enable_device does not undo
4771 pci_set_drvdata(pdev, NULL);
4772 free_hba(h);
4773 return -1;
4776 static void cciss_shutdown(struct pci_dev *pdev)
4778 ctlr_info_t *h;
4779 char *flush_buf;
4780 int return_code;
4782 h = pci_get_drvdata(pdev);
4783 flush_buf = kzalloc(4, GFP_KERNEL);
4784 if (!flush_buf) {
4785 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
4786 return;
4788 /* write all data in the battery backed cache to disk */
4789 memset(flush_buf, 0, 4);
4790 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
4791 4, 0, CTLR_LUNID, TYPE_CMD);
4792 kfree(flush_buf);
4793 if (return_code != IO_OK)
4794 dev_warn(&h->pdev->dev, "Error flushing cache\n");
4795 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4796 free_irq(h->intr[PERF_MODE_INT], h);
4799 static void __devexit cciss_remove_one(struct pci_dev *pdev)
4801 ctlr_info_t *h;
4802 int i, j;
4804 if (pci_get_drvdata(pdev) == NULL) {
4805 dev_err(&pdev->dev, "Unable to remove device\n");
4806 return;
4809 h = pci_get_drvdata(pdev);
4810 i = h->ctlr;
4811 if (hba[i] == NULL) {
4812 dev_err(&pdev->dev, "device appears to already be removed\n");
4813 return;
4816 mutex_lock(&h->busy_shutting_down);
4818 remove_from_scan_list(h);
4819 remove_proc_entry(h->devname, proc_cciss);
4820 unregister_blkdev(h->major, h->devname);
4822 /* remove it from the disk list */
4823 for (j = 0; j < CISS_MAX_LUN; j++) {
4824 struct gendisk *disk = h->gendisk[j];
4825 if (disk) {
4826 struct request_queue *q = disk->queue;
4828 if (disk->flags & GENHD_FL_UP) {
4829 cciss_destroy_ld_sysfs_entry(h, j, 1);
4830 del_gendisk(disk);
4832 if (q)
4833 blk_cleanup_queue(q);
4837 #ifdef CONFIG_CISS_SCSI_TAPE
4838 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
4839 #endif
4841 cciss_shutdown(pdev);
4843 #ifdef CONFIG_PCI_MSI
4844 if (h->msix_vector)
4845 pci_disable_msix(h->pdev);
4846 else if (h->msi_vector)
4847 pci_disable_msi(h->pdev);
4848 #endif /* CONFIG_PCI_MSI */
4850 iounmap(h->transtable);
4851 iounmap(h->cfgtable);
4852 iounmap(h->vaddr);
4854 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4855 h->cmd_pool, h->cmd_pool_dhandle);
4856 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4857 h->errinfo_pool, h->errinfo_pool_dhandle);
4858 kfree(h->cmd_pool_bits);
4859 /* Free up sg elements */
4860 for (j = 0; j < h->nr_cmds; j++)
4861 kfree(h->scatter_list[j]);
4862 kfree(h->scatter_list);
4863 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4865 * Deliberately omit pci_disable_device(): it does something nasty to
4866 * Smart Array controllers that pci_enable_device does not undo
4868 pci_release_regions(pdev);
4869 pci_set_drvdata(pdev, NULL);
4870 cciss_destroy_hba_sysfs_entry(h);
4871 mutex_unlock(&h->busy_shutting_down);
4872 free_hba(h);
4875 static struct pci_driver cciss_pci_driver = {
4876 .name = "cciss",
4877 .probe = cciss_init_one,
4878 .remove = __devexit_p(cciss_remove_one),
4879 .id_table = cciss_pci_device_id, /* id_table */
4880 .shutdown = cciss_shutdown,
4884 * This is it. Register the PCI driver information for the cards we control
4885 * the OS will call our registered routines when it finds one of our cards.
4887 static int __init cciss_init(void)
4889 int err;
4892 * The hardware requires that commands are aligned on a 64-bit
4893 * boundary. Given that we use pci_alloc_consistent() to allocate an
4894 * array of them, the size must be a multiple of 8 bytes.
4896 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
4897 printk(KERN_INFO DRIVER_NAME "\n");
4899 err = bus_register(&cciss_bus_type);
4900 if (err)
4901 return err;
4903 /* Start the scan thread */
4904 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4905 if (IS_ERR(cciss_scan_thread)) {
4906 err = PTR_ERR(cciss_scan_thread);
4907 goto err_bus_unregister;
4910 /* Register for our PCI devices */
4911 err = pci_register_driver(&cciss_pci_driver);
4912 if (err)
4913 goto err_thread_stop;
4915 return err;
4917 err_thread_stop:
4918 kthread_stop(cciss_scan_thread);
4919 err_bus_unregister:
4920 bus_unregister(&cciss_bus_type);
4922 return err;
4925 static void __exit cciss_cleanup(void)
4927 int i;
4929 pci_unregister_driver(&cciss_pci_driver);
4930 /* double check that all controller entrys have been removed */
4931 for (i = 0; i < MAX_CTLR; i++) {
4932 if (hba[i] != NULL) {
4933 dev_warn(&hba[i]->pdev->dev,
4934 "had to remove controller\n");
4935 cciss_remove_one(hba[i]->pdev);
4938 kthread_stop(cciss_scan_thread);
4939 remove_proc_entry("driver/cciss", NULL);
4940 bus_unregister(&cciss_bus_type);
4943 module_init(cciss_init);
4944 module_exit(cciss_cleanup);