From ea689d1c5f57b6c79947344f715a9d920756eb8a Mon Sep 17 00:00:00 2001 From: Sepherosa Ziehau Date: Thu, 9 Jul 2009 10:15:34 +0800 Subject: [PATCH] IO APIC: Get rid of apic_imen Add IOAPIC_IM_FLAG_MASKED to apic_intmapinfo, which indicates the IRQ is currently masked. Use it instead of apic_imen. --- sys/platform/pc32/apic/apic_ipl.s | 18 ++---------------- sys/platform/pc32/apic/apic_vector.s | 12 +++++++----- sys/platform/pc32/apic/mpapic.c | 12 ++++++------ sys/platform/pc32/i386/genassym.c | 1 + sys/platform/pc32/i386/mp_machdep.c | 3 +++ sys/platform/pc32/include/smp.h | 1 + 6 files changed, 20 insertions(+), 27 deletions(-) diff --git a/sys/platform/pc32/apic/apic_ipl.s b/sys/platform/pc32/apic/apic_ipl.s index 0e3daf70fa..f71d02c0a8 100644 --- a/sys/platform/pc32/apic/apic_ipl.s +++ b/sys/platform/pc32/apic/apic_ipl.s @@ -71,20 +71,6 @@ #ifdef APIC_IO - .data - ALIGN_DATA - - /* - * Interrupt mask for APIC interrupts, defaults to all hardware - * interrupts turned off. - */ - - .p2align 2 /* MUST be 32bit aligned */ - - .globl apic_imen -apic_imen: - .long APIC_HWI_MASK - .text SUPERALIGN_TEXT @@ -96,8 +82,8 @@ ENTRY(APIC_INTRDIS) APIC_IMASK_LOCK /* enter critical reg */ movl 4(%esp),%eax 1: - btsl %eax, apic_imen shll $IOAPIC_IM_SZSHIFT, %eax + orl $IOAPIC_IM_FLAG_MASKED, CNAME(int_to_apicintpin) + IOAPIC_IM_FLAGS(%eax) movl CNAME(int_to_apicintpin) + IOAPIC_IM_ADDR(%eax), %edx movl CNAME(int_to_apicintpin) + IOAPIC_IM_ENTIDX(%eax), %ecx testl %edx, %edx @@ -113,8 +99,8 @@ ENTRY(APIC_INTREN) APIC_IMASK_LOCK /* enter critical reg */ movl 4(%esp), %eax /* mask into %eax */ 1: - btrl %eax, apic_imen /* update apic_imen */ shll $IOAPIC_IM_SZSHIFT, %eax + andl $~IOAPIC_IM_FLAG_MASKED, CNAME(int_to_apicintpin) + IOAPIC_IM_FLAGS(%eax) movl CNAME(int_to_apicintpin) + IOAPIC_IM_ADDR(%eax), %edx movl CNAME(int_to_apicintpin) + IOAPIC_IM_ENTIDX(%eax), %ecx testl %edx, %edx diff --git a/sys/platform/pc32/apic/apic_vector.s b/sys/platform/pc32/apic/apic_vector.s index d04d3b1733..9bfccea38d 100644 --- a/sys/platform/pc32/apic/apic_vector.s +++ b/sys/platform/pc32/apic/apic_vector.s @@ -89,9 +89,10 @@ #define MASK_IRQ(irq_num) \ APIC_IMASK_LOCK ; /* into critical reg */ \ - testl $IRQ_LBIT(irq_num), apic_imen ; \ + testl $IOAPIC_IM_FLAG_MASKED, IOAPICFLAGS(irq_num) ; \ jne 7f ; /* masked, don't mask */ \ - orl $IRQ_LBIT(irq_num), apic_imen ; /* set the mask bit */ \ + orl $IOAPIC_IM_FLAG_MASKED, IOAPICFLAGS(irq_num) ; \ + /* set the mask bit */ \ movl IOAPICADDR(irq_num), %ecx ; /* ioapic addr */ \ movl REDIRIDX(irq_num), %eax ; /* get the index */ \ movl %eax, (%ecx) ; /* write the index */ \ @@ -113,13 +114,14 @@ /* * Test to see if the source is currntly masked, clear if so. */ -#define UNMASK_IRQ(irq_num) \ +#define UNMASK_IRQ(irq_num) \ cmpl $0,%eax ; \ jnz 8f ; \ APIC_IMASK_LOCK ; /* into critical reg */ \ - testl $IRQ_LBIT(irq_num), apic_imen ; \ + testl $IOAPIC_IM_FLAG_MASKED, IOAPICFLAGS(irq_num) ; \ je 7f ; /* bit clear, not masked */ \ - andl $~IRQ_LBIT(irq_num), apic_imen ;/* clear mask bit */ \ + andl $~IOAPIC_IM_FLAG_MASKED, IOAPICFLAGS(irq_num) ; \ + /* clear mask bit */ \ movl IOAPICADDR(irq_num),%ecx ; /* ioapic addr */ \ movl REDIRIDX(irq_num), %eax ; /* get the index */ \ movl %eax,(%ecx) ; /* write the index */ \ diff --git a/sys/platform/pc32/apic/mpapic.c b/sys/platform/pc32/apic/mpapic.c index 1c0f7ec660..08017916a8 100644 --- a/sys/platform/pc32/apic/mpapic.c +++ b/sys/platform/pc32/apic/mpapic.c @@ -792,19 +792,19 @@ bad: /* - * Print contents of apic_imen. + * Print contents of unmasked IRQs. */ -extern u_int apic_imen; /* keep apic_imen 'opaque' */ void imen_dump(void) { int x; kprintf("SMP: enabled INTs: "); - for (x = 0; x < 24; ++x) - if ((apic_imen & (1 << x)) == 0) - kprintf("%d, ", x); - kprintf("apic_imen: 0x%08x\n", apic_imen); + for (x = 0; x < APIC_INTMAPSIZE; ++x) { + if ((int_to_apicintpin[x].flags & IOAPIC_IM_FLAG_MASKED) == 0) + kprintf("%d ", x); + } + kprintf("\n"); } diff --git a/sys/platform/pc32/i386/genassym.c b/sys/platform/pc32/i386/genassym.c index e43d5f3bfe..f0b7d3548e 100644 --- a/sys/platform/pc32/i386/genassym.c +++ b/sys/platform/pc32/i386/genassym.c @@ -241,4 +241,5 @@ ASSYM(IOAPIC_IM_FLAGS, offsetof(struct apic_intmapinfo, flags)); ASSYM(IOAPIC_IM_SIZE, sizeof(struct apic_intmapinfo)); ASSYM(IOAPIC_IM_SZSHIFT, IOAPIC_IM_SZSHIFT); ASSYM(IOAPIC_IM_FLAG_LEVEL, IOAPIC_IM_FLAG_LEVEL); +ASSYM(IOAPIC_IM_FLAG_MASKED, IOAPIC_IM_FLAG_MASKED); #endif diff --git a/sys/platform/pc32/i386/mp_machdep.c b/sys/platform/pc32/i386/mp_machdep.c index c98f7781b2..fb3bb9641c 100644 --- a/sys/platform/pc32/i386/mp_machdep.c +++ b/sys/platform/pc32/i386/mp_machdep.c @@ -1529,6 +1529,9 @@ setup_apic_irq_mapping(void) int_to_apicintpin[x].int_pin = 0; int_to_apicintpin[x].apic_address = NULL; int_to_apicintpin[x].redirindex = 0; + + /* Default to masked */ + int_to_apicintpin[x].flags = IOAPIC_IM_FLAG_MASKED; } /* First assign ISA/EISA interrupts */ diff --git a/sys/platform/pc32/include/smp.h b/sys/platform/pc32/include/smp.h index 4a42d02860..7c0aa57d34 100644 --- a/sys/platform/pc32/include/smp.h +++ b/sys/platform/pc32/include/smp.h @@ -82,6 +82,7 @@ struct apic_intmapinfo { #define IOAPIC_IM_SZSHIFT 5 #define IOAPIC_IM_FLAG_LEVEL 0x1 /* default to edge trigger */ +#define IOAPIC_IM_FLAG_MASKED 0x2 extern struct apic_intmapinfo int_to_apicintpin[]; extern struct pcb stoppcbs[]; -- 2.11.4.GIT