From 84ad1523f937564945ea31e53b3b52654e3cc6d0 Mon Sep 17 00:00:00 2001 From: Matthew Dillon Date: Mon, 6 Jun 2016 10:01:45 -0700 Subject: [PATCH] nvme - Cleanups, limit nirqs * Cleanups in the manual page. * Limit nirqs to ncpus + 1. We don't need more than this number for now. --- sys/dev/disk/nvme/nvme_attach.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sys/dev/disk/nvme/nvme_attach.c b/sys/dev/disk/nvme/nvme_attach.c index 724bd13fc6..8c90d851fc 100644 --- a/sys/dev/disk/nvme/nvme_attach.c +++ b/sys/dev/disk/nvme/nvme_attach.c @@ -136,7 +136,9 @@ nvme_pci_attach(device_t dev) /* * Map the interrupt or initial interrupt which will be used for - * the admin queue. + * the admin queue. NVME chipsets can potentially support a huge + * number of MSIX vectors but we really only need enough for + * available cpus, plus 1. */ msi_enable = device_getenv_int(dev, "msi.enable", nvme_msi_enable); msix_enable = device_getenv_int(dev, "msix.enable", nvme_msix_enable); @@ -148,6 +150,8 @@ nvme_pci_attach(device_t dev) sc->nirqs = pci_msix_count(dev); sc->irq_type = PCI_INTR_TYPE_MSIX; + if (sc->nirqs > ncpus + 1) /* max we need */ + sc->nirqs = ncpus + 1; error = pci_setup_msix(dev); cpu = (last_global_cpu + 0) % ncpus; /* GCC warn */ -- 2.11.4.GIT