From 7d4d05431a7795ee81c76dec808cdfb823dbb572 Mon Sep 17 00:00:00 2001 From: John Marino Date: Fri, 4 Dec 2015 15:11:37 +0100 Subject: [PATCH] Update gcc-50 to SVN version 231263 (gcc-5-branch) This is equivalent to the gcc 5.3 release (version shows 5.3.1 though) Last Changed Date: 2015-12-04 01:16:08 +0100 (Fri, 04 Dec 2015) --- contrib/gcc-5.0/LAST_UPDATED | 4 +- contrib/gcc-5.0/gcc/BASE-VER | 2 +- contrib/gcc-5.0/gcc/DATESTAMP | 2 +- contrib/gcc-5.0/gcc/alias.c | 15 +- contrib/gcc-5.0/gcc/builtins.c | 44 +- contrib/gcc-5.0/gcc/c-family/c-common.c | 2 +- contrib/gcc-5.0/gcc/c-family/c-ubsan.c | 8 + contrib/gcc-5.0/gcc/c-family/c.opt | 6 +- contrib/gcc-5.0/gcc/c/c-decl.c | 3 +- contrib/gcc-5.0/gcc/c/c-parser.c | 86 +- contrib/gcc-5.0/gcc/c/c-typeck.c | 14 +- contrib/gcc-5.0/gcc/calls.c | 24 +- contrib/gcc-5.0/gcc/cfgexpand.c | 92 +- contrib/gcc-5.0/gcc/cgraphunit.c | 1 + contrib/gcc-5.0/gcc/combine.c | 30 +- contrib/gcc-5.0/gcc/config/i386/i386.c | 267 +++-- contrib/gcc-5.0/gcc/config/i386/i386.h | 4 +- contrib/gcc-5.0/gcc/config/i386/i386.md | 222 +++-- .../gcc-5.0/gcc/config/i386/intelmic-mkoffload.c | 9 +- contrib/gcc-5.0/gcc/config/i386/sse.md | 187 +++- contrib/gcc-5.0/gcc/config/i386/sync.md | 10 +- contrib/gcc-5.0/gcc/coretypes.h | 20 +- contrib/gcc-5.0/gcc/cp/call.c | 37 +- contrib/gcc-5.0/gcc/cp/class.c | 13 +- contrib/gcc-5.0/gcc/cp/constexpr.c | 46 +- contrib/gcc-5.0/gcc/cp/cp-tree.h | 16 +- contrib/gcc-5.0/gcc/cp/cp-ubsan.c | 7 +- contrib/gcc-5.0/gcc/cp/cvt.c | 3 +- contrib/gcc-5.0/gcc/cp/decl.c | 69 +- contrib/gcc-5.0/gcc/cp/decl2.c | 85 +- contrib/gcc-5.0/gcc/cp/error.c | 3 +- contrib/gcc-5.0/gcc/cp/init.c | 19 +- contrib/gcc-5.0/gcc/cp/lambda.c | 6 + contrib/gcc-5.0/gcc/cp/mangle.c | 31 +- contrib/gcc-5.0/gcc/cp/optimize.c | 7 + contrib/gcc-5.0/gcc/cp/parser.c | 8 +- contrib/gcc-5.0/gcc/cp/pt.c | 62 +- contrib/gcc-5.0/gcc/cp/search.c | 2 +- contrib/gcc-5.0/gcc/cp/semantics.c | 15 +- contrib/gcc-5.0/gcc/cp/typeck.c | 6 +- contrib/gcc-5.0/gcc/df-problems.c | 19 +- contrib/gcc-5.0/gcc/diagnostic.c | 13 +- contrib/gcc-5.0/gcc/diagnostic.h | 4 - contrib/gcc-5.0/gcc/dojump.c | 12 +- contrib/gcc-5.0/gcc/dwarf2out.c | 19 +- contrib/gcc-5.0/gcc/emit-rtl.c | 3 + contrib/gcc-5.0/gcc/except.c | 4 +- contrib/gcc-5.0/gcc/fold-const.c | 54 +- contrib/gcc-5.0/gcc/function.c | 35 +- contrib/gcc-5.0/gcc/genmatch.c | 25 +- contrib/gcc-5.0/gcc/gimple-fold.c | 35 +- contrib/gcc-5.0/gcc/gimple-low.c | 3 +- contrib/gcc-5.0/gcc/gimple-ssa-isolate-paths.c | 9 +- contrib/gcc-5.0/gcc/gimplify.c | 90 +- contrib/gcc-5.0/gcc/graphite-blocking.c | 1 + contrib/gcc-5.0/gcc/graphite-dependences.c | 15 +- contrib/gcc-5.0/gcc/graphite-interchange.c | 1 + contrib/gcc-5.0/gcc/graphite-isl-ast-to-gimple.c | 2 + contrib/gcc-5.0/gcc/graphite-optimize-isl.c | 10 +- contrib/gcc-5.0/gcc/graphite-poly.c | 1 + contrib/gcc-5.0/gcc/graphite-poly.h | 5 + contrib/gcc-5.0/gcc/graphite-scop-detection.c | 1 + contrib/gcc-5.0/gcc/graphite-sese-to-poly.c | 15 +- contrib/gcc-5.0/gcc/graphite.c | 1 + contrib/gcc-5.0/gcc/ifcvt.c | 45 +- contrib/gcc-5.0/gcc/ipa-chkp.c | 87 +- contrib/gcc-5.0/gcc/ipa-chkp.h | 1 + contrib/gcc-5.0/gcc/ipa-devirt.c | 2 +- contrib/gcc-5.0/gcc/ipa-icf.c | 138 +-- contrib/gcc-5.0/gcc/ipa-icf.h | 17 +- contrib/gcc-5.0/gcc/ipa-inline-analysis.c | 141 ++- contrib/gcc-5.0/gcc/ipa-polymorphic-call.c | 55 +- contrib/gcc-5.0/gcc/ipa-prop.c | 148 +-- contrib/gcc-5.0/gcc/ipa-prop.h | 56 +- contrib/gcc-5.0/gcc/ira-color.c | 1 + contrib/gcc-5.0/gcc/ira-int.h | 2 + contrib/gcc-5.0/gcc/ira-lives.c | 4 +- contrib/gcc-5.0/gcc/ira.c | 9 +- contrib/gcc-5.0/gcc/ira.h | 1 - contrib/gcc-5.0/gcc/lra-constraints.c | 24 +- contrib/gcc-5.0/gcc/lra-int.h | 4 +- contrib/gcc-5.0/gcc/lra-lives.c | 2 +- contrib/gcc-5.0/gcc/lra-remat.c | 115 ++- contrib/gcc-5.0/gcc/lra.c | 41 +- contrib/gcc-5.0/gcc/lto-cgraph.c | 27 +- contrib/gcc-5.0/gcc/omp-low.c | 4 + contrib/gcc-5.0/gcc/optabs.c | 95 +- contrib/gcc-5.0/gcc/ree.c | 6 + contrib/gcc-5.0/gcc/rtl.h | 1 + contrib/gcc-5.0/gcc/sched-deps.c | 4 +- contrib/gcc-5.0/gcc/sel-sched.c | 4 +- contrib/gcc-5.0/gcc/stor-layout.c | 24 +- contrib/gcc-5.0/gcc/target-globals.c | 1 + contrib/gcc-5.0/gcc/tree-chkp.c | 54 +- contrib/gcc-5.0/gcc/tree-chkp.h | 1 + contrib/gcc-5.0/gcc/tree-if-conv.c | 19 +- contrib/gcc-5.0/gcc/tree-inline.c | 63 +- contrib/gcc-5.0/gcc/tree-sra.c | 80 +- contrib/gcc-5.0/gcc/tree-ssa-alias.c | 6 +- contrib/gcc-5.0/gcc/tree-ssa-ccp.c | 1 + contrib/gcc-5.0/gcc/tree-ssa-dce.c | 9 +- contrib/gcc-5.0/gcc/tree-ssa-ifcombine.c | 10 +- contrib/gcc-5.0/gcc/tree-ssa-live.c | 9 + contrib/gcc-5.0/gcc/tree-ssa-loop-im.c | 17 + contrib/gcc-5.0/gcc/tree-ssa-math-opts.c | 2 +- contrib/gcc-5.0/gcc/tree-ssa-phiopt.c | 4 + contrib/gcc-5.0/gcc/tree-ssa-reassoc.c | 5 + contrib/gcc-5.0/gcc/tree-ssa-sccvn.c | 7 +- contrib/gcc-5.0/gcc/tree-ssa-structalias.c | 15 +- contrib/gcc-5.0/gcc/tree-ssa-tail-merge.c | 6 + contrib/gcc-5.0/gcc/tree-ssa-uninit.c | 3 +- contrib/gcc-5.0/gcc/tree-ssanames.c | 42 +- contrib/gcc-5.0/gcc/tree-ssanames.h | 2 + contrib/gcc-5.0/gcc/tree-tailcall.c | 20 +- contrib/gcc-5.0/gcc/tree-vect-data-refs.c | 35 +- contrib/gcc-5.0/gcc/tree-vect-generic.c | 24 + contrib/gcc-5.0/gcc/tree-vect-loop.c | 2 +- contrib/gcc-5.0/gcc/tree-vect-stmts.c | 26 +- contrib/gcc-5.0/gcc/tree-vectorizer.h | 15 +- contrib/gcc-5.0/gcc/tree.c | 2 +- contrib/gcc-5.0/gcc/tree.h | 63 ++ contrib/gcc-5.0/gcc/tsan.c | 6 +- contrib/gcc-5.0/gcc/varasm.c | 5 +- contrib/gcc-5.0/gcc/wide-int.cc | 13 +- contrib/gcc-5.0/gcc/wide-int.h | 10 - contrib/gcc-5.0/libcpp/errors.c | 16 +- contrib/gcc-5.0/libcpp/files.c | 11 +- contrib/gcc-5.0/libcpp/include/cpplib.h | 3 + contrib/gcc-5.0/libgcc/config.host | 33 +- .../gcc-5.0/libgcc/config/aarch64/crtfastmath.c | 36 - contrib/gcc-5.0/libgcc/config/aarch64/crti.S | 68 -- contrib/gcc-5.0/libgcc/config/aarch64/crtn.S | 61 -- .../gcc-5.0/libgcc/config/aarch64/linux-unwind.h | 157 --- .../gcc-5.0/libgcc/config/aarch64/sfp-exceptions.c | 76 -- .../gcc-5.0/libgcc/config/aarch64/sfp-machine.h | 125 --- contrib/gcc-5.0/libgcc/config/aarch64/sync-cache.c | 72 -- contrib/gcc-5.0/libgcc/config/aarch64/t-aarch64 | 21 - contrib/gcc-5.0/libgcc/config/aarch64/t-softfp | 9 - contrib/gcc-5.0/libgcc/config/gmon-sol2.c | 444 --------- contrib/gcc-5.0/libgcc/config/i386/cpuinfo.c | 5 +- contrib/gcc-5.0/libgcc/config/nios2/linux-atomic.c | 5 - contrib/gcc-5.0/libgomp/iter.c | 4 +- contrib/gcc-5.0/libgomp/iter_ull.c | 4 +- contrib/gcc-5.0/libgomp/oacc-host.c | 4 +- contrib/gcc-5.0/libgomp/oacc-init.c | 3 + contrib/gcc-5.0/libgomp/oacc-int.h | 1 + .../libstdc++-v3/config/cpu/aarch64/atomic_word.h | 44 + .../libstdc++-v3/config/locale/generic/c_locale.h | 92 -- .../config/locale/generic/codecvt_members.cc | 219 ----- .../config/locale/generic/collate_members.cc | 73 -- .../config/locale/generic/monetary_members.cc | 175 ---- .../config/locale/generic/numeric_members.cc | 106 -- .../config/locale/generic/time_members.cc | 211 ---- .../config/locale/generic/time_members.h | 92 -- .../gcc-5.0/libstdc++-v3/include/bits/allocator.h | 8 +- .../libstdc++-v3/include/bits/atomic_base.h | 20 +- .../libstdc++-v3/include/bits/atomic_futex.h | 15 +- .../libstdc++-v3/include/bits/basic_string.h | 12 +- .../libstdc++-v3/include/bits/char_traits.h | 68 +- .../gcc-5.0/libstdc++-v3/include/bits/ios_base.h | 12 +- .../libstdc++-v3/include/bits/locale_conv.h | 197 ++-- .../libstdc++-v3/include/bits/quoted_string.h | 164 ++++ .../libstdc++-v3/include/bits/range_access.h | 8 + .../libstdc++-v3/include/bits/regex_compiler.h | 9 +- .../libstdc++-v3/include/bits/regex_compiler.tcc | 35 +- .../libstdc++-v3/include/bits/regex_scanner.tcc | 6 + .../gcc-5.0/libstdc++-v3/include/bits/stl_deque.h | 1 + .../libstdc++-v3/include/bits/stl_multiset.h | 10 +- .../gcc-5.0/libstdc++-v3/include/bits/stl_set.h | 10 +- .../gcc-5.0/libstdc++-v3/include/c_global/cmath | 93 ++ .../libstdc++-v3/include/experimental/filesystem | 77 ++ .../libstdc++-v3/include/experimental/fs_dir.h | 338 +++++++ .../libstdc++-v3/include/experimental/fs_fwd.h | 289 ++++++ .../libstdc++-v3/include/experimental/fs_ops.h | 291 ++++++ .../libstdc++-v3/include/experimental/fs_path.h | 1024 ++++++++++++++++++++ .../libstdc++-v3/include/experimental/functional | 32 +- .../libstdc++-v3/include/ext/pod_char_traits.h | 4 + contrib/gcc-5.0/libstdc++-v3/include/std/atomic | 8 +- contrib/gcc-5.0/libstdc++-v3/include/std/iomanip | 123 +-- .../gcc-5.0/libstdc++-v3/include/std/shared_mutex | 2 +- contrib/gcc-5.0/libstdc++-v3/include/tr1/cmath | 72 ++ contrib/gcc-5.0/libstdc++-v3/libsupc++/eh_ptr.cc | 3 + contrib/gcc-5.0/libstdc++-v3/src/c++11/codecvt.cc | 6 +- contrib/gcc-5.0/libstdc++-v3/src/c++11/random.cc | 23 +- 184 files changed, 5189 insertions(+), 3440 deletions(-) delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/crtfastmath.c delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/crti.S delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/crtn.S delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/linux-unwind.h delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/sfp-exceptions.c delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/sfp-machine.h delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/sync-cache.c delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/t-aarch64 delete mode 100644 contrib/gcc-5.0/libgcc/config/aarch64/t-softfp delete mode 100644 contrib/gcc-5.0/libgcc/config/gmon-sol2.c create mode 100644 contrib/gcc-5.0/libstdc++-v3/config/cpu/aarch64/atomic_word.h delete mode 100644 contrib/gcc-5.0/libstdc++-v3/config/locale/generic/c_locale.h delete mode 100644 contrib/gcc-5.0/libstdc++-v3/config/locale/generic/codecvt_members.cc delete mode 100644 contrib/gcc-5.0/libstdc++-v3/config/locale/generic/collate_members.cc delete mode 100644 contrib/gcc-5.0/libstdc++-v3/config/locale/generic/monetary_members.cc delete mode 100644 contrib/gcc-5.0/libstdc++-v3/config/locale/generic/numeric_members.cc delete mode 100644 contrib/gcc-5.0/libstdc++-v3/config/locale/generic/time_members.cc delete mode 100644 contrib/gcc-5.0/libstdc++-v3/config/locale/generic/time_members.h create mode 100644 contrib/gcc-5.0/libstdc++-v3/include/bits/quoted_string.h create mode 100644 contrib/gcc-5.0/libstdc++-v3/include/experimental/filesystem create mode 100644 contrib/gcc-5.0/libstdc++-v3/include/experimental/fs_dir.h create mode 100644 contrib/gcc-5.0/libstdc++-v3/include/experimental/fs_fwd.h create mode 100644 contrib/gcc-5.0/libstdc++-v3/include/experimental/fs_ops.h create mode 100644 contrib/gcc-5.0/libstdc++-v3/include/experimental/fs_path.h diff --git a/contrib/gcc-5.0/LAST_UPDATED b/contrib/gcc-5.0/LAST_UPDATED index e47392f0d2..fceaaa2240 100644 --- a/contrib/gcc-5.0/LAST_UPDATED +++ b/contrib/gcc-5.0/LAST_UPDATED @@ -1,2 +1,2 @@ -225979 -Last Changed Date: 2015-07-18 02:16:08 +0200 (Sat, 18 Jul 2015) +231244:231263 +Last Changed Date: 2015-12-04 01:16:08 +0100 (Fri, 04 Dec 2015) diff --git a/contrib/gcc-5.0/gcc/BASE-VER b/contrib/gcc-5.0/gcc/BASE-VER index 26d99a283f..c7cb1311a6 100644 --- a/contrib/gcc-5.0/gcc/BASE-VER +++ b/contrib/gcc-5.0/gcc/BASE-VER @@ -1 +1 @@ -5.2.1 +5.3.1 diff --git a/contrib/gcc-5.0/gcc/DATESTAMP b/contrib/gcc-5.0/gcc/DATESTAMP index 66cc981f86..afb984d5f6 100644 --- a/contrib/gcc-5.0/gcc/DATESTAMP +++ b/contrib/gcc-5.0/gcc/DATESTAMP @@ -1 +1 @@ -20150718 +20151204 diff --git a/contrib/gcc-5.0/gcc/alias.c b/contrib/gcc-5.0/gcc/alias.c index a7160f3e95..d85830ef5c 100644 --- a/contrib/gcc-5.0/gcc/alias.c +++ b/contrib/gcc-5.0/gcc/alias.c @@ -364,15 +364,16 @@ ao_ref_from_mem (ao_ref *ref, const_rtx mem) || !MEM_SIZE_KNOWN_P (mem)) return true; - /* If the base decl is a parameter we can have negative MEM_OFFSET in - case of promoted subregs on bigendian targets. Trust the MEM_EXPR - here. */ + /* If MEM_OFFSET/MEM_SIZE get us outside of ref->offset/ref->max_size + drop ref->ref. */ if (MEM_OFFSET (mem) < 0 - && (MEM_SIZE (mem) + MEM_OFFSET (mem)) * BITS_PER_UNIT == ref->size) - return true; + || (ref->max_size != -1 + && ((MEM_OFFSET (mem) + MEM_SIZE (mem)) * BITS_PER_UNIT + > ref->max_size))) + ref->ref = NULL_TREE; - /* Otherwise continue and refine size and offset we got from analyzing - MEM_EXPR by using MEM_SIZE and MEM_OFFSET. */ + /* Refine size and offset we got from analyzing MEM_EXPR by using + MEM_SIZE and MEM_OFFSET. */ ref->offset += MEM_OFFSET (mem) * BITS_PER_UNIT; ref->size = MEM_SIZE (mem) * BITS_PER_UNIT; diff --git a/contrib/gcc-5.0/gcc/builtins.c b/contrib/gcc-5.0/gcc/builtins.c index bcbc11d9db..137001522e 100644 --- a/contrib/gcc-5.0/gcc/builtins.c +++ b/contrib/gcc-5.0/gcc/builtins.c @@ -5271,7 +5271,7 @@ expand_builtin_sync_operation (machine_mode mode, tree exp, mem = get_builtin_sync_mem (CALL_EXPR_ARG (exp, 0), mode); val = expand_expr_force_mode (CALL_EXPR_ARG (exp, 1), mode); - return expand_atomic_fetch_op (target, mem, val, code, MEMMODEL_SEQ_CST, + return expand_atomic_fetch_op (target, mem, val, code, MEMMODEL_SYNC_SEQ_CST, after); } @@ -5301,8 +5301,8 @@ expand_builtin_compare_and_swap (machine_mode mode, tree exp, poval = ⌖ } if (!expand_atomic_compare_and_swap (pbool, poval, mem, old_val, new_val, - false, MEMMODEL_SEQ_CST, - MEMMODEL_SEQ_CST)) + false, MEMMODEL_SYNC_SEQ_CST, + MEMMODEL_SYNC_SEQ_CST)) return NULL_RTX; return target; @@ -5337,7 +5337,7 @@ expand_builtin_sync_lock_release (machine_mode mode, tree exp) /* Expand the operands. */ mem = get_builtin_sync_mem (CALL_EXPR_ARG (exp, 0), mode); - expand_atomic_store (mem, const0_rtx, MEMMODEL_RELEASE, true); + expand_atomic_store (mem, const0_rtx, MEMMODEL_SYNC_RELEASE, true); } /* Given an integer representing an ``enum memmodel'', verify its @@ -5366,7 +5366,8 @@ get_memmodel (tree exp) return MEMMODEL_SEQ_CST; } - if ((INTVAL (op) & MEMMODEL_MASK) >= MEMMODEL_LAST) + /* Should never see a user explicit SYNC memodel model, so >= LAST works. */ + if (memmodel_base (val) >= MEMMODEL_LAST) { warning (OPT_Winvalid_memory_model, "invalid memory model argument to builtin"); @@ -5433,8 +5434,7 @@ expand_builtin_atomic_compare_exchange (machine_mode mode, tree exp, success = MEMMODEL_SEQ_CST; } - if ((failure & MEMMODEL_MASK) == MEMMODEL_RELEASE - || (failure & MEMMODEL_MASK) == MEMMODEL_ACQ_REL) + if (is_mm_release (failure) || is_mm_acq_rel (failure)) { warning (OPT_Winvalid_memory_model, "invalid failure memory model for " @@ -5496,8 +5496,7 @@ expand_builtin_atomic_load (machine_mode mode, tree exp, rtx target) enum memmodel model; model = get_memmodel (CALL_EXPR_ARG (exp, 1)); - if ((model & MEMMODEL_MASK) == MEMMODEL_RELEASE - || (model & MEMMODEL_MASK) == MEMMODEL_ACQ_REL) + if (is_mm_release (model) || is_mm_acq_rel (model)) { warning (OPT_Winvalid_memory_model, "invalid memory model for %<__atomic_load%>"); @@ -5526,9 +5525,8 @@ expand_builtin_atomic_store (machine_mode mode, tree exp) enum memmodel model; model = get_memmodel (CALL_EXPR_ARG (exp, 2)); - if ((model & MEMMODEL_MASK) != MEMMODEL_RELAXED - && (model & MEMMODEL_MASK) != MEMMODEL_SEQ_CST - && (model & MEMMODEL_MASK) != MEMMODEL_RELEASE) + if (!(is_mm_relaxed (model) || is_mm_seq_cst (model) + || is_mm_release (model))) { warning (OPT_Winvalid_memory_model, "invalid memory model for %<__atomic_store%>"); @@ -5635,9 +5633,7 @@ expand_builtin_atomic_clear (tree exp) mem = get_builtin_sync_mem (CALL_EXPR_ARG (exp, 0), mode); model = get_memmodel (CALL_EXPR_ARG (exp, 1)); - if ((model & MEMMODEL_MASK) == MEMMODEL_CONSUME - || (model & MEMMODEL_MASK) == MEMMODEL_ACQUIRE - || (model & MEMMODEL_MASK) == MEMMODEL_ACQ_REL) + if (is_mm_consume (model) || is_mm_acquire (model) || is_mm_acq_rel (model)) { warning (OPT_Winvalid_memory_model, "invalid memory model for %<__atomic_store%>"); @@ -5697,8 +5693,20 @@ fold_builtin_atomic_always_lock_free (tree arg0, tree arg1) mode = mode_for_size (size, MODE_INT, 0); mode_align = GET_MODE_ALIGNMENT (mode); - if (TREE_CODE (arg1) == INTEGER_CST && INTVAL (expand_normal (arg1)) == 0) - type_align = mode_align; + if (TREE_CODE (arg1) == INTEGER_CST) + { + unsigned HOST_WIDE_INT val = UINTVAL (expand_normal (arg1)); + + /* Either this argument is null, or it's a fake pointer encoding + the alignment of the object. */ + val = val & -val; + val *= BITS_PER_UNIT; + + if (val == 0 || mode_align < val) + type_align = mode_align; + else + type_align = val; + } else { tree ttype = TREE_TYPE (arg1); @@ -5833,7 +5841,7 @@ expand_builtin_atomic_signal_fence (tree exp) static void expand_builtin_sync_synchronize (void) { - expand_mem_thread_fence (MEMMODEL_SEQ_CST); + expand_mem_thread_fence (MEMMODEL_SYNC_SEQ_CST); } static rtx diff --git a/contrib/gcc-5.0/gcc/c-family/c-common.c b/contrib/gcc-5.0/gcc/c-family/c-common.c index 7fe7fa6007..117f89c023 100644 --- a/contrib/gcc-5.0/gcc/c-family/c-common.c +++ b/contrib/gcc-5.0/gcc/c-family/c-common.c @@ -10741,7 +10741,7 @@ get_atomic_generic_size (location_t loc, tree function, if (TREE_CODE (p) == INTEGER_CST) { int i = tree_to_uhwi (p); - if (i < 0 || (i & MEMMODEL_MASK) >= MEMMODEL_LAST) + if (i < 0 || (memmodel_base (i) >= MEMMODEL_LAST)) { warning_at (loc, OPT_Winvalid_memory_model, "invalid memory model argument %d of %qE", x + 1, diff --git a/contrib/gcc-5.0/gcc/c-family/c-ubsan.c b/contrib/gcc-5.0/gcc/c-family/c-ubsan.c index a14426f962..44f8964077 100644 --- a/contrib/gcc-5.0/gcc/c-family/c-ubsan.c +++ b/contrib/gcc-5.0/gcc/c-family/c-ubsan.c @@ -55,6 +55,7 @@ along with GCC; see the file COPYING3. If not see #include "internal-fn.h" #include "stor-layout.h" #include "builtins.h" +#include "gimplify.h" /* Instrument division by zero and INT_MIN / -1. If not instrumenting, return NULL_TREE. */ @@ -71,6 +72,9 @@ ubsan_instrument_division (location_t loc, tree op0, tree op1) gcc_assert (TYPE_MAIN_VARIANT (TREE_TYPE (op0)) == TYPE_MAIN_VARIANT (TREE_TYPE (op1))); + op0 = unshare_expr (op0); + op1 = unshare_expr (op1); + if (TREE_CODE (type) == INTEGER_TYPE && (flag_sanitize & SANITIZE_DIVIDE)) t = fold_build2 (EQ_EXPR, boolean_type_node, @@ -117,6 +121,7 @@ ubsan_instrument_division (location_t loc, tree op0, tree op1) } } t = fold_build2 (COMPOUND_EXPR, TREE_TYPE (t), op0, t); + t = fold_build2 (COMPOUND_EXPR, TREE_TYPE (t), op1, t); if (flag_sanitize_undefined_trap_on_error) tt = build_call_expr_loc (loc, builtin_decl_explicit (BUILT_IN_TRAP), 0); else @@ -151,6 +156,9 @@ ubsan_instrument_shift (location_t loc, enum tree_code code, HOST_WIDE_INT op0_prec = TYPE_PRECISION (type0); tree uprecm1 = build_int_cst (op1_utype, op0_prec - 1); + op0 = unshare_expr (op0); + op1 = unshare_expr (op1); + t = fold_convert_loc (loc, op1_utype, op1); t = fold_build2 (GT_EXPR, boolean_type_node, t, uprecm1); diff --git a/contrib/gcc-5.0/gcc/c-family/c.opt b/contrib/gcc-5.0/gcc/c-family/c.opt index 983f4a8b94..4162566752 100644 --- a/contrib/gcc-5.0/gcc/c-family/c.opt +++ b/contrib/gcc-5.0/gcc/c-family/c.opt @@ -1592,7 +1592,7 @@ C++ ObjC++ Alias(std=c++1z) Undocumented std=c11 C ObjC -Conform to the ISO 2011 C standard (experimental and incomplete support) +Conform to the ISO 2011 C standard std=c1x C ObjC Alias(std=c11) @@ -1648,7 +1648,7 @@ C++ ObjC++ Alias(std=gnu++1z) Undocumented std=gnu11 C ObjC -Conform to the ISO 2011 C standard with GNU extensions (experimental and incomplete support) +Conform to the ISO 2011 C standard with GNU extensions std=gnu1x C ObjC Alias(std=gnu11) @@ -1688,7 +1688,7 @@ Deprecated in favor of -std=iso9899:1999 std=iso9899:2011 C ObjC Alias(std=c11) -Conform to the ISO 2011 C standard (experimental and incomplete support) +Conform to the ISO 2011 C standard traditional Driver diff --git a/contrib/gcc-5.0/gcc/c/c-decl.c b/contrib/gcc-5.0/gcc/c/c-decl.c index 03ce316f06..ad704bfbef 100644 --- a/contrib/gcc-5.0/gcc/c/c-decl.c +++ b/contrib/gcc-5.0/gcc/c/c-decl.c @@ -8883,7 +8883,8 @@ temp_pop_parm_decls (void) current_scope->bindings = NULL; for (; b; b = free_binding_and_advance (b)) { - gcc_assert (TREE_CODE (b->decl) == PARM_DECL); + gcc_assert (TREE_CODE (b->decl) == PARM_DECL + || b->decl == error_mark_node); gcc_assert (I_SYMBOL_BINDING (b->id) == b); I_SYMBOL_BINDING (b->id) = b->shadowed; if (b->shadowed && b->shadowed->u.type) diff --git a/contrib/gcc-5.0/gcc/c/c-parser.c b/contrib/gcc-5.0/gcc/c/c-parser.c index 007cb8ad67..86cbc404a4 100644 --- a/contrib/gcc-5.0/gcc/c/c-parser.c +++ b/contrib/gcc-5.0/gcc/c/c-parser.c @@ -11185,9 +11185,9 @@ c_parser_omp_clause_aligned (c_parser *parser, tree list) tree alignment = c_parser_expr_no_commas (parser, NULL).value; mark_exp_read (alignment); alignment = c_fully_fold (alignment, false, NULL); - if (!INTEGRAL_TYPE_P (TREE_TYPE (alignment)) - && TREE_CODE (alignment) != INTEGER_CST - && tree_int_cst_sgn (alignment) != 1) + if (TREE_CODE (alignment) != INTEGER_CST + || !INTEGRAL_TYPE_P (TREE_TYPE (alignment)) + || tree_int_cst_sgn (alignment) != 1) { error_at (clause_loc, "% clause alignment expression must " "be positive constant integer expression"); @@ -11264,9 +11264,9 @@ c_parser_omp_clause_safelen (c_parser *parser, tree list) t = c_parser_expr_no_commas (parser, NULL).value; mark_exp_read (t); t = c_fully_fold (t, false, NULL); - if (!INTEGRAL_TYPE_P (TREE_TYPE (t)) - && TREE_CODE (t) != INTEGER_CST - && tree_int_cst_sgn (t) != 1) + if (TREE_CODE (t) != INTEGER_CST + || !INTEGRAL_TYPE_P (TREE_TYPE (t)) + || tree_int_cst_sgn (t) != 1) { error_at (clause_loc, "% clause expression must " "be positive constant integer expression"); @@ -11300,9 +11300,9 @@ c_parser_omp_clause_simdlen (c_parser *parser, tree list) t = c_parser_expr_no_commas (parser, NULL).value; mark_exp_read (t); t = c_fully_fold (t, false, NULL); - if (!INTEGRAL_TYPE_P (TREE_TYPE (t)) - && TREE_CODE (t) != INTEGER_CST - && tree_int_cst_sgn (t) != 1) + if (TREE_CODE (t) != INTEGER_CST + || !INTEGRAL_TYPE_P (TREE_TYPE (t)) + || tree_int_cst_sgn (t) != 1) { error_at (clause_loc, "% clause expression must " "be positive constant integer expression"); @@ -11706,7 +11706,7 @@ c_parser_oacc_all_clauses (c_parser *parser, omp_clause_mask mask, first = false; - if (((mask >> c_kind) & 1) == 0 && !parser->error) + if (((mask >> c_kind) & 1) == 0) { /* Remove the invalid clause(s) from the list to avoid confusing the rest of the compiler. */ @@ -11935,7 +11935,7 @@ c_parser_omp_all_clauses (c_parser *parser, omp_clause_mask mask, first = false; - if (((mask >> c_kind) & 1) == 0 && !parser->error) + if (((mask >> c_kind) & 1) == 0) { /* Remove the invalid clause(s) from the list to avoid confusing the rest of the compiler. */ @@ -12379,6 +12379,7 @@ c_parser_omp_atomic (location_t loc, c_parser *parser) bool structured_block = false; bool swapped = false; bool seq_cst = false; + bool non_lvalue_p; if (c_parser_next_token_is (parser, CPP_NAME)) { @@ -12432,20 +12433,33 @@ c_parser_omp_atomic (location_t loc, c_parser *parser) { case OMP_ATOMIC_READ: case NOP_EXPR: /* atomic write */ - v = c_parser_unary_expression (parser).value; + v = c_parser_cast_expression (parser, NULL).value; + non_lvalue_p = !lvalue_p (v); v = c_fully_fold (v, false, NULL); if (v == error_mark_node) goto saw_error; + if (non_lvalue_p) + v = non_lvalue (v); loc = c_parser_peek_token (parser)->location; if (!c_parser_require (parser, CPP_EQ, "expected %<=%>")) goto saw_error; if (code == NOP_EXPR) - lhs = c_parser_expression (parser).value; + { + lhs = c_parser_expression (parser).value; + lhs = c_fully_fold (lhs, false, NULL); + if (lhs == error_mark_node) + goto saw_error; + } else - lhs = c_parser_unary_expression (parser).value; - lhs = c_fully_fold (lhs, false, NULL); - if (lhs == error_mark_node) - goto saw_error; + { + lhs = c_parser_cast_expression (parser, NULL).value; + non_lvalue_p = !lvalue_p (lhs); + lhs = c_fully_fold (lhs, false, NULL); + if (lhs == error_mark_node) + goto saw_error; + if (non_lvalue_p) + lhs = non_lvalue (lhs); + } if (code == NOP_EXPR) { /* atomic write is represented by OMP_ATOMIC with NOP_EXPR @@ -12464,10 +12478,13 @@ c_parser_omp_atomic (location_t loc, c_parser *parser) } else { - v = c_parser_unary_expression (parser).value; + v = c_parser_cast_expression (parser, NULL).value; + non_lvalue_p = !lvalue_p (v); v = c_fully_fold (v, false, NULL); if (v == error_mark_node) goto saw_error; + if (non_lvalue_p) + v = non_lvalue (v); if (!c_parser_require (parser, CPP_EQ, "expected %<=%>")) goto saw_error; } @@ -12480,7 +12497,7 @@ c_parser_omp_atomic (location_t loc, c_parser *parser) old or new x should be captured. */ restart: eloc = c_parser_peek_token (parser)->location; - expr = c_parser_unary_expression (parser); + expr = c_parser_cast_expression (parser, NULL); lhs = expr.value; expr = default_function_array_conversion (eloc, expr); unfolded_lhs = expr.value; @@ -12573,6 +12590,8 @@ restart: } /* FALLTHRU */ default: + if (!lvalue_p (unfolded_lhs)) + lhs = non_lvalue (lhs); switch (c_parser_peek_token (parser)->type) { case CPP_MULT_EQ: @@ -12687,20 +12706,25 @@ stmt_done: { if (!c_parser_require (parser, CPP_SEMICOLON, "expected %<;%>")) goto saw_error; - v = c_parser_unary_expression (parser).value; + v = c_parser_cast_expression (parser, NULL).value; + non_lvalue_p = !lvalue_p (v); v = c_fully_fold (v, false, NULL); if (v == error_mark_node) goto saw_error; + if (non_lvalue_p) + v = non_lvalue (v); if (!c_parser_require (parser, CPP_EQ, "expected %<=%>")) goto saw_error; eloc = c_parser_peek_token (parser)->location; - expr = c_parser_unary_expression (parser); + expr = c_parser_cast_expression (parser, NULL); lhs1 = expr.value; expr = default_function_array_read_conversion (eloc, expr); unfolded_lhs1 = expr.value; lhs1 = c_fully_fold (lhs1, false, NULL); if (lhs1 == error_mark_node) goto saw_error; + if (!lvalue_p (unfolded_lhs1)) + lhs1 = non_lvalue (lhs1); } if (structured_block) { @@ -12802,7 +12826,8 @@ c_parser_omp_for_loop (location_t loc, c_parser *parser, enum tree_code code, tree clauses, tree *cclauses) { tree decl, cond, incr, save_break, save_cont, body, init, stmt, cl; - tree declv, condv, incrv, initv, ret = NULL; + tree declv, condv, incrv, initv, ret = NULL_TREE; + tree pre_body = NULL_TREE, this_pre_body; bool fail = false, open_brace_parsed = false; int i, collapse = 1, nbraces = 0; location_t for_loc; @@ -12846,8 +12871,23 @@ c_parser_omp_for_loop (location_t loc, c_parser *parser, enum tree_code code, { if (i > 0) vec_safe_push (for_block, c_begin_compound_stmt (true)); + this_pre_body = push_stmt_list (); c_parser_declaration_or_fndef (parser, true, true, true, true, true, NULL, vNULL); + if (this_pre_body) + { + this_pre_body = pop_stmt_list (this_pre_body); + if (pre_body) + { + tree t = pre_body; + pre_body = push_stmt_list (); + add_stmt (t); + add_stmt (this_pre_body); + pre_body = pop_stmt_list (pre_body); + } + else + pre_body = this_pre_body; + } decl = check_for_loop_decls (for_loc, flag_isoc99); if (decl == NULL) goto error_init; @@ -13042,7 +13082,7 @@ c_parser_omp_for_loop (location_t loc, c_parser *parser, enum tree_code code, if (!fail) { stmt = c_finish_omp_for (loc, code, declv, initv, condv, - incrv, body, NULL); + incrv, body, pre_body); if (stmt) { if (cclauses != NULL diff --git a/contrib/gcc-5.0/gcc/c/c-typeck.c b/contrib/gcc-5.0/gcc/c/c-typeck.c index ebe4c73589..ffba66bb6c 100644 --- a/contrib/gcc-5.0/gcc/c/c-typeck.c +++ b/contrib/gcc-5.0/gcc/c/c-typeck.c @@ -5707,6 +5707,10 @@ convert_for_assignment (location_t location, location_t expr_loc, tree type, tree rname = NULL_TREE; bool objc_ok = false; + /* Use the expansion point location to handle cases such as user's + function returning a wrong-type macro defined in a system header. */ + location = expansion_point_location_if_in_system_header (location); + if (errtype == ic_argpass) { tree selector; @@ -9368,8 +9372,12 @@ c_finish_return (location_t loc, tree retval, tree origtype) bool npc = false; size_t rank = 0; + /* Use the expansion point to handle cases such as returning NULL + in a function returning void. */ + source_location xloc = expansion_point_location_if_in_system_header (loc); + if (TREE_THIS_VOLATILE (current_function_decl)) - warning_at (loc, 0, + warning_at (xloc, 0, "function declared % has a % statement"); if (flag_cilkplus && contains_array_notation_expr (retval)) @@ -9424,10 +9432,10 @@ c_finish_return (location_t loc, tree retval, tree origtype) { current_function_returns_null = 1; if (TREE_CODE (TREE_TYPE (retval)) != VOID_TYPE) - pedwarn (loc, 0, + pedwarn (xloc, 0, "% with a value, in function returning void"); else - pedwarn (loc, OPT_Wpedantic, "ISO C forbids " + pedwarn (xloc, OPT_Wpedantic, "ISO C forbids " "% with expression, in function returning void"); } else diff --git a/contrib/gcc-5.0/gcc/calls.c b/contrib/gcc-5.0/gcc/calls.c index 32ea4eb1f5..ee8ea5f768 100644 --- a/contrib/gcc-5.0/gcc/calls.c +++ b/contrib/gcc-5.0/gcc/calls.c @@ -3115,6 +3115,19 @@ expand_call (tree exp, rtx target, int ignore) compute_argument_addresses (args, argblock, num_actuals); + /* Stack is properly aligned, pops can't safely be deferred during + the evaluation of the arguments. */ + NO_DEFER_POP; + + /* Precompute all register parameters. It isn't safe to compute + anything once we have started filling any specific hard regs. + TLS symbols sometimes need a call to resolve. Precompute + register parameters before any stack pointer manipulation + to avoid unaligned stack in the called function. */ + precompute_register_parameters (num_actuals, args, ®_parm_seen); + + OK_DEFER_POP; + /* Perform stack alignment before the first push (the last arg). */ if (argblock == 0 && adjusted_args_size.constant > reg_parm_stack_space @@ -3155,10 +3168,6 @@ expand_call (tree exp, rtx target, int ignore) funexp = rtx_for_function_call (fndecl, addr); - /* Precompute all register parameters. It isn't safe to compute anything - once we have started filling any specific hard regs. */ - precompute_register_parameters (num_actuals, args, ®_parm_seen); - if (CALL_EXPR_STATIC_CHAIN (exp)) static_chain_value = expand_normal (CALL_EXPR_STATIC_CHAIN (exp)); else @@ -4950,6 +4959,13 @@ store_one_arg (struct arg_data *arg, rtx argblock, int flags, if (XEXP (x, 0) != crtl->args.internal_arg_pointer) i = INTVAL (XEXP (XEXP (x, 0), 1)); + /* arg.locate doesn't contain the pretend_args_size offset, + it's part of argblock. Ensure we don't count it in I. */ +#ifdef STACK_GROWS_DOWNWARD + i -= crtl->args.pretend_args_size; +#else + i += crtl->args.pretend_args_size; +#endif /* expand_call should ensure this. */ gcc_assert (!arg->locate.offset.var && arg->locate.size.var == 0 diff --git a/contrib/gcc-5.0/gcc/cfgexpand.c b/contrib/gcc-5.0/gcc/cfgexpand.c index 97e7a2583e..3293ea60cd 100644 --- a/contrib/gcc-5.0/gcc/cfgexpand.c +++ b/contrib/gcc-5.0/gcc/cfgexpand.c @@ -3219,18 +3219,25 @@ expand_return (tree retval, tree bounds) bounds_rtl = DECL_BOUNDS_RTL (DECL_RESULT (current_function_decl)); if (bounds_rtl) { - rtx addr, bnd; + rtx addr = NULL; + rtx bnd = NULL; - if (bounds) + if (bounds && bounds != error_mark_node) { bnd = expand_normal (bounds); targetm.calls.store_returned_bounds (bounds_rtl, bnd); } else if (REG_P (bounds_rtl)) { - addr = expand_normal (build_fold_addr_expr (retval_rhs)); - addr = gen_rtx_MEM (Pmode, addr); - bnd = targetm.calls.load_bounds_for_arg (addr, NULL, NULL); + if (bounds) + bnd = chkp_expand_zero_bounds (); + else + { + addr = expand_normal (build_fold_addr_expr (retval_rhs)); + addr = gen_rtx_MEM (Pmode, addr); + bnd = targetm.calls.load_bounds_for_arg (addr, NULL, NULL); + } + targetm.calls.store_returned_bounds (bounds_rtl, bnd); } else @@ -3239,15 +3246,23 @@ expand_return (tree retval, tree bounds) gcc_assert (GET_CODE (bounds_rtl) == PARALLEL); - addr = expand_normal (build_fold_addr_expr (retval_rhs)); - addr = gen_rtx_MEM (Pmode, addr); + if (bounds) + bnd = chkp_expand_zero_bounds (); + else + { + addr = expand_normal (build_fold_addr_expr (retval_rhs)); + addr = gen_rtx_MEM (Pmode, addr); + } for (n = 0; n < XVECLEN (bounds_rtl, 0); n++) { - rtx offs = XEXP (XVECEXP (bounds_rtl, 0, n), 1); rtx slot = XEXP (XVECEXP (bounds_rtl, 0, n), 0); - rtx from = adjust_address (addr, Pmode, INTVAL (offs)); - rtx bnd = targetm.calls.load_bounds_for_arg (from, NULL, NULL); + if (!bounds) + { + rtx offs = XEXP (XVECEXP (bounds_rtl, 0, n), 1); + rtx from = adjust_address (addr, Pmode, INTVAL (offs)); + bnd = targetm.calls.load_bounds_for_arg (from, NULL, NULL); + } targetm.calls.store_returned_bounds (slot, bnd); } } @@ -3344,33 +3359,40 @@ expand_gimple_stmt_1 (gimple stmt) break; case GIMPLE_RETURN: - op0 = gimple_return_retval (as_a (stmt)); + { + tree bnd = gimple_return_retbnd (as_a (stmt)); + op0 = gimple_return_retval (as_a (stmt)); - if (op0 && op0 != error_mark_node) - { - tree result = DECL_RESULT (current_function_decl); + if (op0 && op0 != error_mark_node) + { + tree result = DECL_RESULT (current_function_decl); - /* If we are not returning the current function's RESULT_DECL, - build an assignment to it. */ - if (op0 != result) - { - /* I believe that a function's RESULT_DECL is unique. */ - gcc_assert (TREE_CODE (op0) != RESULT_DECL); - - /* ??? We'd like to use simply expand_assignment here, - but this fails if the value is of BLKmode but the return - decl is a register. expand_return has special handling - for this combination, which eventually should move - to common code. See comments there. Until then, let's - build a modify expression :-/ */ - op0 = build2 (MODIFY_EXPR, TREE_TYPE (result), - result, op0); - } - } - if (!op0) - expand_null_return (); - else - expand_return (op0, gimple_return_retbnd (stmt)); + /* If we are not returning the current function's RESULT_DECL, + build an assignment to it. */ + if (op0 != result) + { + /* I believe that a function's RESULT_DECL is unique. */ + gcc_assert (TREE_CODE (op0) != RESULT_DECL); + + /* ??? We'd like to use simply expand_assignment here, + but this fails if the value is of BLKmode but the return + decl is a register. expand_return has special handling + for this combination, which eventually should move + to common code. See comments there. Until then, let's + build a modify expression :-/ */ + op0 = build2 (MODIFY_EXPR, TREE_TYPE (result), + result, op0); + } + /* Mark we have return statement with missing bounds. */ + if (!bnd && chkp_function_instrumented_p (cfun->decl)) + bnd = error_mark_node; + } + + if (!op0) + expand_null_return (); + else + expand_return (op0, bnd); + } break; case GIMPLE_ASSIGN: diff --git a/contrib/gcc-5.0/gcc/cgraphunit.c b/contrib/gcc-5.0/gcc/cgraphunit.c index 2315ba84bb..78b2b59f4f 100644 --- a/contrib/gcc-5.0/gcc/cgraphunit.c +++ b/contrib/gcc-5.0/gcc/cgraphunit.c @@ -2505,6 +2505,7 @@ cgraph_node::create_wrapper (cgraph_node *target) memset (&thunk, 0, sizeof (cgraph_thunk_info)); thunk.thunk_p = true; create_edge (target, NULL, count, CGRAPH_FREQ_BASE); + callees->can_throw_external = !TREE_NOTHROW (target->decl); tree arguments = DECL_ARGUMENTS (decl); diff --git a/contrib/gcc-5.0/gcc/combine.c b/contrib/gcc-5.0/gcc/combine.c index 46cd6db62a..ea47b32def 100644 --- a/contrib/gcc-5.0/gcc/combine.c +++ b/contrib/gcc-5.0/gcc/combine.c @@ -11432,8 +11432,8 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) tmode != GET_MODE (op0); tmode = GET_MODE_WIDER_MODE (tmode)) if ((unsigned HOST_WIDE_INT) c0 == GET_MODE_MASK (tmode)) { - op0 = gen_lowpart (tmode, inner_op0); - op1 = gen_lowpart (tmode, inner_op1); + op0 = gen_lowpart_or_truncate (tmode, inner_op0); + op1 = gen_lowpart_or_truncate (tmode, inner_op1); code = unsigned_condition (code); changed = 1; break; @@ -11951,23 +11951,21 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) & GET_MODE_MASK (mode)) + 1)) >= 0 && const_op >> i == 0 - && (tmode = mode_for_size (i, MODE_INT, 1)) != BLKmode - && (TRULY_NOOP_TRUNCATION_MODES_P (tmode, GET_MODE (op0)) - || (REG_P (XEXP (op0, 0)) - && reg_truncated_to_mode (tmode, XEXP (op0, 0))))) + && (tmode = mode_for_size (i, MODE_INT, 1)) != BLKmode) { - op0 = gen_lowpart (tmode, XEXP (op0, 0)); + op0 = gen_lowpart_or_truncate (tmode, XEXP (op0, 0)); continue; } - /* If this is (and:M1 (subreg:M2 X 0) (const_int C1)) where C1 + /* If this is (and:M1 (subreg:M1 X:M2 0) (const_int C1)) where C1 fits in both M1 and M2 and the SUBREG is either paradoxical or represents the low part, permute the SUBREG and the AND and try again. */ - if (GET_CODE (XEXP (op0, 0)) == SUBREG) + if (GET_CODE (XEXP (op0, 0)) == SUBREG + && CONST_INT_P (XEXP (op0, 1))) { - unsigned HOST_WIDE_INT c1; tmode = GET_MODE (SUBREG_REG (XEXP (op0, 0))); + unsigned HOST_WIDE_INT c1 = INTVAL (XEXP (op0, 1)); /* Require an integral mode, to avoid creating something like (AND:SF ...). */ if (SCALAR_INT_MODE_P (tmode) @@ -11977,18 +11975,22 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) have a defined value due to the AND operation. However, if we commute the AND inside the SUBREG then they no longer have defined values and the meaning of - the code has been changed. */ + the code has been changed. + Also C1 should not change value in the smaller mode, + see PR67028 (a positive C1 can become negative in the + smaller mode, so that the AND does no longer mask the + upper bits). */ && (0 #ifdef WORD_REGISTER_OPERATIONS || (mode_width > GET_MODE_PRECISION (tmode) - && mode_width <= BITS_PER_WORD) + && mode_width <= BITS_PER_WORD + && trunc_int_for_mode (c1, tmode) == (HOST_WIDE_INT) c1) #endif || (mode_width <= GET_MODE_PRECISION (tmode) && subreg_lowpart_p (XEXP (op0, 0)))) - && CONST_INT_P (XEXP (op0, 1)) && mode_width <= HOST_BITS_PER_WIDE_INT && HWI_COMPUTABLE_MODE_P (tmode) - && ((c1 = INTVAL (XEXP (op0, 1))) & ~mask) == 0 + && (c1 & ~mask) == 0 && (c1 & ~GET_MODE_MASK (tmode)) == 0 && c1 != mask && c1 != GET_MODE_MASK (tmode)) diff --git a/contrib/gcc-5.0/gcc/config/i386/i386.c b/contrib/gcc-5.0/gcc/config/i386/i386.c index 052a9d3bee..3b19caa413 100644 --- a/contrib/gcc-5.0/gcc/config/i386/i386.c +++ b/contrib/gcc-5.0/gcc/config/i386/i386.c @@ -4055,11 +4055,11 @@ ix86_option_override_internal (bool main_args_p, if (opts_set->x_ix86_incoming_stack_boundary_arg) { if (opts->x_ix86_incoming_stack_boundary_arg - < (TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 4 : 2) + < (TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 3 : 2) || opts->x_ix86_incoming_stack_boundary_arg > 12) error ("-mincoming-stack-boundary=%d is not between %d and 12", opts->x_ix86_incoming_stack_boundary_arg, - TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 4 : 2); + TARGET_64BIT_P (opts->x_ix86_isa_flags) ? 3 : 2); else { ix86_user_incoming_stack_boundary @@ -5201,6 +5201,14 @@ ix86_set_current_function (tree fndecl) TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts (); } ix86_previous_fndecl = fndecl; + + /* 64-bit MS and SYSV ABI have different set of call used registers. + Avoid expensive re-initialization of init_regs each time we switch + function context. */ + if (TARGET_64BIT + && (call_used_regs[SI_REG] + == (cfun->machine->call_abi == MS_ABI))) + reinit_regs (); } @@ -6344,17 +6352,6 @@ ix86_call_abi_override (const_tree fndecl) cfun->machine->call_abi = ix86_function_type_abi (TREE_TYPE (fndecl)); } -/* 64-bit MS and SYSV ABI have different set of call used registers. Avoid - expensive re-initialization of init_regs each time we switch function context - since this is needed only during RTL expansion. */ -static void -ix86_maybe_switch_abi (void) -{ - if (TARGET_64BIT && - call_used_regs[SI_REG] == (cfun->machine->call_abi == MS_ABI)) - reinit_regs (); -} - /* Return 1 if pseudo register should be created and used to hold GOT address for PIC code. */ bool @@ -8211,7 +8208,8 @@ ix86_function_value_regno_p (const unsigned int regno) case SI_REG: return TARGET_64BIT && ix86_cfun_abi () != MS_ABI; - case FIRST_BND_REG: + case BND0_REG: + case BND1_REG: return chkp_function_instrumented_p (current_function_decl); /* Complex values are returned in %st(0)/%st(1) pair. */ @@ -10104,11 +10102,14 @@ ix86_compute_frame_layout (struct ix86_frame *frame) frame->nregs = ix86_nsaved_regs (); frame->nsseregs = ix86_nsaved_sseregs (); - /* 64-bit MS ABI seem to require stack alignment to be always 16 except for - function prologues and leaf. */ + /* 64-bit MS ABI seem to require stack alignment to be always 16, + except for function prologues, leaf functions and when the defult + incoming stack boundary is overriden at command line or via + force_align_arg_pointer attribute. */ if ((TARGET_64BIT_MS_ABI && crtl->preferred_stack_boundary < 128) && (!crtl->is_leaf || cfun->calls_alloca != 0 - || ix86_current_function_calls_tls_descriptor)) + || ix86_current_function_calls_tls_descriptor + || ix86_incoming_stack_boundary < 128)) { crtl->preferred_stack_boundary = 128; crtl->stack_alignment_needed = 128; @@ -10207,10 +10208,14 @@ ix86_compute_frame_layout (struct ix86_frame *frame) if (frame->nsseregs) { /* The only ABI that has saved SSE registers (Win64) also has a - 16-byte aligned default stack, and thus we don't need to be - within the re-aligned local stack frame to save them. */ - gcc_assert (INCOMING_STACK_BOUNDARY >= 128); - offset = (offset + 16 - 1) & -16; + 16-byte aligned default stack, and thus we don't need to be + within the re-aligned local stack frame to save them. In case + incoming stack boundary is aligned to less than 16 bytes, + unaligned move of SSE register will be emitted, so there is + no point to round up the SSE register save area outside the + re-aligned local stack frame to 16 bytes. */ + if (ix86_incoming_stack_boundary >= 128) + offset = (offset + 16 - 1) & -16; offset += frame->nsseregs * 16; } frame->sse_reg_save_offset = offset; @@ -10220,7 +10225,7 @@ ix86_compute_frame_layout (struct ix86_frame *frame) sure that no value happens to be the same before and after, force the alignment computation below to add a non-zero value. */ if (stack_realign_fp) - offset = (offset + stack_alignment_needed) & -stack_alignment_needed; + offset = (offset + stack_alignment_needed - 1) & -stack_alignment_needed; /* Va-arg area */ frame->va_arg_size = ix86_varargs_gpr_size + ix86_varargs_fpr_size; @@ -10433,15 +10438,24 @@ ix86_emit_save_reg_using_mov (machine_mode mode, unsigned int regno, { struct machine_function *m = cfun->machine; rtx reg = gen_rtx_REG (mode, regno); + rtx unspec = NULL_RTX; rtx mem, addr, base, insn; + unsigned int align; addr = choose_baseaddr (cfa_offset); mem = gen_frame_mem (mode, addr); - /* For SSE saves, we need to indicate the 128-bit alignment. */ - set_mem_align (mem, GET_MODE_ALIGNMENT (mode)); + /* The location is aligned up to INCOMING_STACK_BOUNDARY. */ + align = MIN (GET_MODE_ALIGNMENT (mode), INCOMING_STACK_BOUNDARY); + set_mem_align (mem, align); + + /* SSE saves are not within re-aligned local stack frame. + In case INCOMING_STACK_BOUNDARY is misaligned, we have + to emit unaligned store. */ + if (mode == V4SFmode && align < 128) + unspec = gen_rtx_UNSPEC (mode, gen_rtvec (1, reg), UNSPEC_STOREU); - insn = emit_move_insn (mem, reg); + insn = emit_insn (gen_rtx_SET (VOIDmode, mem, unspec ? unspec : reg)); RTX_FRAME_RELATED_P (insn) = 1; base = addr; @@ -10489,6 +10503,9 @@ ix86_emit_save_reg_using_mov (machine_mode mode, unsigned int regno, mem = gen_rtx_MEM (mode, addr); add_reg_note (insn, REG_CFA_OFFSET, gen_rtx_SET (VOIDmode, mem, reg)); } + else if (unspec) + add_reg_note (insn, REG_CFA_EXPRESSION, + gen_rtx_SET (VOIDmode, mem, reg)); } /* Emit code to save registers using MOV insns. @@ -10705,6 +10722,25 @@ find_drap_reg (void) } } +/* Handle a "force_align_arg_pointer" attribute. */ + +static tree +ix86_handle_force_align_arg_pointer_attribute (tree *node, tree name, + tree, int, bool *no_add_attrs) +{ + if (TREE_CODE (*node) != FUNCTION_TYPE + && TREE_CODE (*node) != METHOD_TYPE + && TREE_CODE (*node) != FIELD_DECL + && TREE_CODE (*node) != TYPE_DECL) + { + warning (OPT_Wattributes, "%qE attribute only applies to functions", + name); + *no_add_attrs = true; + } + + return NULL_TREE; +} + /* Return minimum incoming stack alignment. */ static unsigned int @@ -10719,7 +10755,6 @@ ix86_minimum_incoming_stack_boundary (bool sibcall) if -mstackrealign is used, it isn't used for sibcall check and estimated stack alignment is 128bit. */ else if (!sibcall - && !TARGET_64BIT && ix86_force_align_arg_pointer && crtl->stack_alignment_estimated == 128) incoming_stack_boundary = MIN_STACK_BOUNDARY; @@ -11026,8 +11061,6 @@ ix86_adjust_stack_and_probe (const HOST_WIDE_INT size) release_scratch_register_on_entry (&sr); } - gcc_assert (cfun->machine->fs.cfa_reg != stack_pointer_rtx); - /* Even if the stack pointer isn't the CFA register, we need to correctly describe the adjustments made to it, in particular differentiate the frame-related ones from the frame-unrelated ones. */ @@ -11251,7 +11284,11 @@ ix86_finalize_stack_realign_flags (void) && !crtl->accesses_prior_frames && !cfun->calls_alloca && !crtl->calls_eh_return - && !(flag_stack_check && STACK_CHECK_MOVING_SP) + /* See ira_setup_eliminable_regset for the rationale. */ + && !(STACK_CHECK_MOVING_SP + && flag_stack_check + && flag_exceptions + && cfun->can_throw_non_call_exceptions) && !ix86_frame_pointer_required () && get_frame_size () == 0 && ix86_nsaved_sseregs () == 0 @@ -11578,7 +11615,7 @@ ix86_expand_prologue (void) pointer is no longer valid. As for the value of sp_offset, see ix86_compute_frame_layout, which we need to match in order to pass verification of stack_pointer_offset at the end. */ - m->fs.sp_offset = (m->fs.sp_offset + align_bytes) & -align_bytes; + m->fs.sp_offset = (m->fs.sp_offset + align_bytes - 1) & -align_bytes; m->fs.sp_valid = false; } @@ -11991,11 +12028,26 @@ ix86_emit_restore_sse_regs_using_mov (HOST_WIDE_INT cfa_offset, { rtx reg = gen_rtx_REG (V4SFmode, regno); rtx mem; + unsigned int align; mem = choose_baseaddr (cfa_offset); mem = gen_rtx_MEM (V4SFmode, mem); - set_mem_align (mem, 128); - emit_move_insn (reg, mem); + + /* The location is aligned up to INCOMING_STACK_BOUNDARY. */ + align = MIN (GET_MODE_ALIGNMENT (V4SFmode), INCOMING_STACK_BOUNDARY); + set_mem_align (mem, align); + + /* SSE saves are not within re-aligned local stack frame. + In case INCOMING_STACK_BOUNDARY is misaligned, we have + to emit unaligned load. */ + if (align < 128) + { + rtx unspec = gen_rtx_UNSPEC (V4SFmode, gen_rtvec (1, mem), + UNSPEC_LOADU); + emit_insn (gen_rtx_SET (VOIDmode, reg, unspec)); + } + else + emit_insn (gen_rtx_SET (VOIDmode, reg, mem)); ix86_add_cfa_restore_note (NULL_RTX, reg, cfa_offset); @@ -25140,7 +25192,8 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp, dst = change_address (dst, BLKmode, destreg); set_mem_align (dst, desired_align * BITS_PER_UNIT); epilogue_size_needed = 0; - if (need_zero_guard && !min_size) + if (need_zero_guard + && min_size < (unsigned HOST_WIDE_INT) size_needed) { /* It is possible that we copied enough so the main loop will not execute. */ @@ -25272,7 +25325,7 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp, max_size -= align_bytes; } if (need_zero_guard - && !min_size + && min_size < (unsigned HOST_WIDE_INT) size_needed && (count < (unsigned HOST_WIDE_INT) size_needed || (align_bytes == 0 && count < ((unsigned HOST_WIDE_INT) size_needed @@ -25557,7 +25610,7 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx) /* Avoid branch in fixing the byte. */ tmpreg = gen_lowpart (QImode, tmpreg); - emit_insn (gen_addqi3_cc (tmpreg, tmpreg, tmpreg)); + emit_insn (gen_addqi3_cconly_overflow (tmpreg, tmpreg)); tmp = gen_rtx_REG (CCmode, FLAGS_REG); cmp = gen_rtx_LTU (VOIDmode, tmp, const0_rtx); emit_insn (ix86_gen_sub3_carry (out, out, GEN_INT (3), tmp, cmp)); @@ -39522,60 +39575,57 @@ rdseed_step: return target; case IX86_BUILTIN_SBB32: - icode = CODE_FOR_subsi3_carry; + icode = CODE_FOR_subborrowsi; mode0 = SImode; - goto addcarryx; + goto handlecarry; case IX86_BUILTIN_SBB64: - icode = CODE_FOR_subdi3_carry; + icode = CODE_FOR_subborrowdi; mode0 = DImode; - goto addcarryx; + goto handlecarry; case IX86_BUILTIN_ADDCARRYX32: - icode = TARGET_ADX ? CODE_FOR_adcxsi3 : CODE_FOR_addsi3_carry; + icode = CODE_FOR_addcarrysi; mode0 = SImode; - goto addcarryx; + goto handlecarry; case IX86_BUILTIN_ADDCARRYX64: - icode = TARGET_ADX ? CODE_FOR_adcxdi3 : CODE_FOR_adddi3_carry; + icode = CODE_FOR_addcarrydi; mode0 = DImode; -addcarryx: + handlecarry: arg0 = CALL_EXPR_ARG (exp, 0); /* unsigned char c_in. */ arg1 = CALL_EXPR_ARG (exp, 1); /* unsigned int src1. */ arg2 = CALL_EXPR_ARG (exp, 2); /* unsigned int src2. */ arg3 = CALL_EXPR_ARG (exp, 3); /* unsigned int *sum_out. */ - op0 = gen_reg_rtx (QImode); - - /* Generate CF from input operand. */ op1 = expand_normal (arg0); op1 = copy_to_mode_reg (QImode, convert_to_mode (QImode, op1, 1)); - emit_insn (gen_addqi3_cc (op0, op1, constm1_rtx)); - /* Gen ADCX instruction to compute X+Y+CF. */ op2 = expand_normal (arg1); - op3 = expand_normal (arg2); - - if (!REG_P (op2)) + if (!register_operand (op2, mode0)) op2 = copy_to_mode_reg (mode0, op2); - if (!REG_P (op3)) - op3 = copy_to_mode_reg (mode0, op3); - - op0 = gen_reg_rtx (mode0); - op4 = gen_rtx_REG (CCCmode, FLAGS_REG); - pat = gen_rtx_LTU (VOIDmode, op4, const0_rtx); - emit_insn (GEN_FCN (icode) (op0, op2, op3, op4, pat)); + op3 = expand_normal (arg2); + if (!register_operand (op3, mode0)) + op3 = copy_to_mode_reg (mode0, op3); - /* Store the result. */ op4 = expand_normal (arg3); if (!address_operand (op4, VOIDmode)) { op4 = convert_memory_address (Pmode, op4); op4 = copy_addr_to_reg (op4); } - emit_move_insn (gen_rtx_MEM (mode0, op4), op0); + + /* Generate CF from input operand. */ + emit_insn (gen_addqi3_cconly_overflow (op1, constm1_rtx)); + + /* Generate instruction that consumes CF. */ + op0 = gen_reg_rtx (mode0); + + op1 = gen_rtx_REG (CCCmode, FLAGS_REG); + pat = gen_rtx_LTU (mode0, op1, const0_rtx); + emit_insn (GEN_FCN (icode) (op0, op2, op3, op1, pat)); /* Return current CF value. */ if (target == 0) @@ -39583,6 +39633,10 @@ addcarryx: PUT_MODE (pat, QImode); emit_insn (gen_rtx_SET (VOIDmode, target, pat)); + + /* Store the result. */ + emit_move_insn (gen_rtx_MEM (mode0, op4), op0); + return target; case IX86_BUILTIN_READ_FLAGS: @@ -41758,11 +41812,24 @@ ix86_cannot_change_mode_class (machine_mode from, machine_mode to, if (MAYBE_SSE_CLASS_P (regclass) || MAYBE_MMX_CLASS_P (regclass)) { + int from_size = GET_MODE_SIZE (from); + int to_size = GET_MODE_SIZE (to); + /* Vector registers do not support QI or HImode loads. If we don't disallow a change to these modes, reload will assume it's ok to drop the subreg from (subreg:SI (reg:HI 100) 0). This affects the vec_dupv4hi pattern. */ - if (GET_MODE_SIZE (from) < 4) + if (from_size < 4) + return true; + + /* Further, we cannot allow word_mode subregs of full vector modes. + Otherwise the middle-end will assume it's ok to store to + (subreg:DI (reg:TI 100) 0) in order to modify only the low 64 bits + of the 128-bit register. However, after reload the subreg will + be dropped leaving a plain DImode store. This is indistinguishable + from a "normal" DImode move, and so we're justified to use movsd, + which modifies the entire 128-bit register. */ + if (to_size == UNITS_PER_WORD && from_size > UNITS_PER_WORD) return true; } @@ -46836,7 +46903,7 @@ static const struct attribute_spec ix86_attribute_table[] = true }, /* force_align_arg_pointer says this function realigns the stack at entry. */ { (const char *)&ix86_force_align_arg_pointer_string, 0, 0, - false, true, true, ix86_handle_cconv_attribute, false }, + false, true, true, ix86_handle_force_align_arg_pointer_attribute, false }, #if TARGET_DLLIMPORT_DECL_ATTRIBUTES { "dllimport", 0, 0, false, false, false, handle_dll_attribute, false }, { "dllexport", 0, 0, false, false, false, handle_dll_attribute, false }, @@ -48957,6 +49024,62 @@ expand_vec_perm_even_odd_pack (struct expand_vec_perm_d *d) return true; } +/* A subroutine of expand_vec_perm_even_odd_1. Implement extract-even + and extract-odd permutations of two V64QI operands + with two "shifts", two "truncs" and one "concat" insns for "odd" + and two "truncs" and one concat insn for "even." + Have already failed all two instruction sequences. */ + +static bool +expand_vec_perm_even_odd_trunc (struct expand_vec_perm_d *d) +{ + rtx t1, t2, t3, t4; + unsigned i, odd, nelt = d->nelt; + + if (!TARGET_AVX512BW + || d->one_operand_p + || d->vmode != V64QImode) + return false; + + /* Check that permutation is even or odd. */ + odd = d->perm[0]; + if (odd > 1) + return false; + + for (i = 1; i < nelt; ++i) + if (d->perm[i] != 2 * i + odd) + return false; + + if (d->testing_p) + return true; + + + if (odd) + { + t1 = gen_reg_rtx (V32HImode); + t2 = gen_reg_rtx (V32HImode); + emit_insn (gen_lshrv32hi3 (t1, + gen_lowpart (V32HImode, d->op0), + GEN_INT (8))); + emit_insn (gen_lshrv32hi3 (t2, + gen_lowpart (V32HImode, d->op1), + GEN_INT (8))); + } + else + { + t1 = gen_lowpart (V32HImode, d->op0); + t2 = gen_lowpart (V32HImode, d->op1); + } + + t3 = gen_reg_rtx (V32QImode); + t4 = gen_reg_rtx (V32QImode); + emit_insn (gen_avx512bw_truncatev32hiv32qi2 (t3, t1)); + emit_insn (gen_avx512bw_truncatev32hiv32qi2 (t4, t2)); + emit_insn (gen_avx_vec_concatv64qi (d->target, t3, t4)); + + return true; +} + /* A subroutine of ix86_expand_vec_perm_builtin_1. Implement extract-even and extract-odd permutations. */ @@ -49059,6 +49182,9 @@ expand_vec_perm_even_odd_1 (struct expand_vec_perm_d *d, unsigned odd) case V32QImode: return expand_vec_perm_even_odd_pack (d); + case V64QImode: + return expand_vec_perm_even_odd_trunc (d); + case V4DImode: if (!TARGET_AVX2) { @@ -49520,6 +49646,8 @@ ix86_expand_vec_perm_const_1 (struct expand_vec_perm_d *d) /* Try sequences of four instructions. */ + if (expand_vec_perm_even_odd_trunc (d)) + return true; if (expand_vec_perm_vpshufb2_vpermq (d)) return true; @@ -50396,6 +50524,10 @@ ix86_expand_pinsr (rtx *operands) return false; } + /* Reject insertions to misaligned positions. */ + if (pos & (size-1)) + return false; + rtx d = dst; if (GET_MODE (dst) != dstmode) d = gen_reg_rtx (dstmode); @@ -51521,7 +51653,7 @@ ix86_destroy_cost_data (void *data) static unsigned HOST_WIDE_INT ix86_memmodel_check (unsigned HOST_WIDE_INT val) { - unsigned HOST_WIDE_INT model = val & MEMMODEL_MASK; + enum memmodel model = memmodel_from_int (val); bool strong; if (val & ~(unsigned HOST_WIDE_INT)(IX86_HLE_ACQUIRE|IX86_HLE_RELEASE @@ -51532,14 +51664,14 @@ ix86_memmodel_check (unsigned HOST_WIDE_INT val) "Unknown architecture specific memory model"); return MEMMODEL_SEQ_CST; } - strong = (model == MEMMODEL_ACQ_REL || model == MEMMODEL_SEQ_CST); - if (val & IX86_HLE_ACQUIRE && !(model == MEMMODEL_ACQUIRE || strong)) + strong = (is_mm_acq_rel (model) || is_mm_seq_cst (model)); + if (val & IX86_HLE_ACQUIRE && !(is_mm_acquire (model) || strong)) { warning (OPT_Winvalid_memory_model, "HLE_ACQUIRE not used with ACQUIRE or stronger memory model"); return MEMMODEL_SEQ_CST | IX86_HLE_ACQUIRE; } - if (val & IX86_HLE_RELEASE && !(model == MEMMODEL_RELEASE || strong)) + if (val & IX86_HLE_RELEASE && !(is_mm_release (model) || strong)) { warning (OPT_Winvalid_memory_model, "HLE_RELEASE not used with RELEASE or stronger memory model"); @@ -52312,9 +52444,6 @@ ix86_binds_local_p (const_tree exp) #undef TARGET_CAN_INLINE_P #define TARGET_CAN_INLINE_P ix86_can_inline_p -#undef TARGET_EXPAND_TO_RTL_HOOK -#define TARGET_EXPAND_TO_RTL_HOOK ix86_maybe_switch_abi - #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P ix86_legitimate_address_p diff --git a/contrib/gcc-5.0/gcc/config/i386/i386.h b/contrib/gcc-5.0/gcc/config/i386/i386.h index de43f06bef..d5a5263108 100644 --- a/contrib/gcc-5.0/gcc/config/i386/i386.h +++ b/contrib/gcc-5.0/gcc/config/i386/i386.h @@ -747,7 +747,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); #define MAIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32) /* Minimum stack boundary. */ -#define MIN_STACK_BOUNDARY (TARGET_64BIT ? (TARGET_SSE ? 128 : 64) : 32) +#define MIN_STACK_BOUNDARY BITS_PER_WORD /* Boundary (in *bits*) on which the stack pointer prefers to be aligned; the compiler cannot rely on having this alignment. */ @@ -1429,7 +1429,7 @@ enum reg_class { 0x1ff1ffff,0xffffffe0, 0x1f }, /* FLOAT_INT_SSE_REGS */ \ { 0x0, 0x0, 0x1fc0 }, /* MASK_EVEX_REGS */ \ { 0x0, 0x0, 0x1fe0 }, /* MASK_REGS */ \ -{ 0xffffffff,0xffffffff, 0x1fff } \ +{ 0xffffffff,0xffffffff,0x1ffff } \ } /* The same information, inverted: diff --git a/contrib/gcc-5.0/gcc/config/i386/i386.md b/contrib/gcc-5.0/gcc/config/i386/i386.md index 2937293333..8b1d372c58 100644 --- a/contrib/gcc-5.0/gcc/config/i386/i386.md +++ b/contrib/gcc-5.0/gcc/config/i386/i386.md @@ -102,7 +102,6 @@ UNSPEC_SAHF UNSPEC_PARITY UNSPEC_FSTCW - UNSPEC_ADD_CARRY UNSPEC_FLDCW UNSPEC_REP UNSPEC_LD_MPIC ; load_macho_picbase @@ -783,7 +782,8 @@ (define_attr "isa" "base,x64,x64_sse4,x64_sse4_noavx,x64_avx,nox64, sse2,sse2_noavx,sse3,sse4,sse4_noavx,avx,noavx, avx2,noavx2,bmi,bmi2,fma4,fma,avx512f,noavx512f, - fma_avx512f,avx512bw,noavx512bw,avx512dq,noavx512dq" + fma_avx512f,avx512bw,noavx512bw,avx512dq,noavx512dq, + avx512vl,noavx512vl" (const_string "base")) (define_attr "enabled" "" @@ -818,6 +818,8 @@ (eq_attr "isa" "noavx512bw") (symbol_ref "!TARGET_AVX512BW") (eq_attr "isa" "avx512dq") (symbol_ref "TARGET_AVX512DQ") (eq_attr "isa" "noavx512dq") (symbol_ref "!TARGET_AVX512DQ") + (eq_attr "isa" "avx512vl") (symbol_ref "TARGET_AVX512VL") + (eq_attr "isa" "noavx512vl") (symbol_ref "!TARGET_AVX512VL") ] (const_int 1))) @@ -844,8 +846,6 @@ (define_code_attr plusminus_mnemonic [(plus "add") (ss_plus "adds") (us_plus "addus") (minus "sub") (ss_minus "subs") (us_minus "subus")]) -(define_code_attr plusminus_carry_mnemonic - [(plus "adc") (minus "sbb")]) (define_code_attr multdiv_mnemonic [(mult "mul") (div "div")]) @@ -5213,46 +5213,21 @@ "ix86_binary_operator_ok (PLUS, mode, operands)" "#" "reload_completed" - [(parallel [(set (reg:CC FLAGS_REG) - (unspec:CC [(match_dup 1) (match_dup 2)] - UNSPEC_ADD_CARRY)) + [(parallel [(set (reg:CCC FLAGS_REG) + (compare:CCC + (plus:DWIH (match_dup 1) (match_dup 2)) + (match_dup 1))) (set (match_dup 0) (plus:DWIH (match_dup 1) (match_dup 2)))]) (parallel [(set (match_dup 3) (plus:DWIH - (match_dup 4) (plus:DWIH (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0)) - (match_dup 5)))) + (match_dup 4)) + (match_dup 5))) (clobber (reg:CC FLAGS_REG))])] "split_double_mode (mode, &operands[0], 3, &operands[0], &operands[3]);") -(define_insn "*add3_cc" - [(set (reg:CC FLAGS_REG) - (unspec:CC - [(match_operand:SWI48 1 "nonimmediate_operand" "%0,0") - (match_operand:SWI48 2 "" "r,rm")] - UNSPEC_ADD_CARRY)) - (set (match_operand:SWI48 0 "nonimmediate_operand" "=rm,r") - (plus:SWI48 (match_dup 1) (match_dup 2)))] - "ix86_binary_operator_ok (PLUS, mode, operands)" - "add{}\t{%2, %0|%0, %2}" - [(set_attr "type" "alu") - (set_attr "mode" "")]) - -(define_insn "addqi3_cc" - [(set (reg:CC FLAGS_REG) - (unspec:CC - [(match_operand:QI 1 "nonimmediate_operand" "%0,0") - (match_operand:QI 2 "general_operand" "qn,qm")] - UNSPEC_ADD_CARRY)) - (set (match_operand:QI 0 "nonimmediate_operand" "=qm,q") - (plus:QI (match_dup 1) (match_dup 2)))] - "ix86_binary_operator_ok (PLUS, QImode, operands)" - "add{b}\t{%2, %0|%0, %2}" - [(set_attr "type" "alu") - (set_attr "mode" "QI")]) - (define_insn "*add_1" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm,r,r") (plus:SWI48 @@ -6160,10 +6135,10 @@ (minus:DWIH (match_dup 1) (match_dup 2)))]) (parallel [(set (match_dup 3) (minus:DWIH - (match_dup 4) - (plus:DWIH - (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0)) - (match_dup 5)))) + (minus:DWIH + (match_dup 4) + (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))) + (match_dup 5))) (clobber (reg:CC FLAGS_REG))])] "split_double_mode (mode, &operands[0], 3, &operands[0], &operands[3]);") @@ -6327,29 +6302,17 @@ ;; Add with carry and subtract with borrow -(define_expand "3_carry" - [(parallel - [(set (match_operand:SWI 0 "nonimmediate_operand") - (plusminus:SWI - (match_operand:SWI 1 "nonimmediate_operand") - (plus:SWI (match_operator:SWI 4 "ix86_carry_flag_operator" - [(match_operand 3 "flags_reg_operand") - (const_int 0)]) - (match_operand:SWI 2 "")))) - (clobber (reg:CC FLAGS_REG))])] - "ix86_binary_operator_ok (, mode, operands)") - -(define_insn "*3_carry" +(define_insn "add3_carry" [(set (match_operand:SWI 0 "nonimmediate_operand" "=m,") - (plusminus:SWI - (match_operand:SWI 1 "nonimmediate_operand" "0,0") + (plus:SWI (plus:SWI - (match_operator 3 "ix86_carry_flag_operator" - [(reg FLAGS_REG) (const_int 0)]) - (match_operand:SWI 2 "" ",m")))) + (match_operator:SWI 4 "ix86_carry_flag_operator" + [(match_operand 3 "flags_reg_operand") (const_int 0)]) + (match_operand:SWI 1 "nonimmediate_operand" "%0,0")) + (match_operand:SWI 2 "" ",m"))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (PLUS, mode, operands)" - "{}\t{%2, %0|%0, %2}" + "adc{}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "use_carry" "1") (set_attr "pent_pair" "pu") @@ -6358,10 +6321,11 @@ (define_insn "*addsi3_carry_zext" [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI - (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0") - (plus:SI (match_operator 3 "ix86_carry_flag_operator" - [(reg FLAGS_REG) (const_int 0)]) - (match_operand:SI 2 "x86_64_general_operand" "rme"))))) + (plus:SI + (plus:SI (match_operator:SI 3 "ix86_carry_flag_operator" + [(reg FLAGS_REG) (const_int 0)]) + (match_operand:SI 1 "register_operand" "%0")) + (match_operand:SI 2 "x86_64_general_operand" "rme")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)" "adc{l}\t{%2, %k0|%k0, %2}" @@ -6370,45 +6334,96 @@ (set_attr "pent_pair" "pu") (set_attr "mode" "SI")]) +;; There is no point to generate ADCX instruction. ADC is shorter and faster. + +(define_insn "addcarry" + [(set (reg:CCC FLAGS_REG) + (compare:CCC + (plus:SWI48 + (plus:SWI48 + (match_operator:SWI48 4 "ix86_carry_flag_operator" + [(match_operand 3 "flags_reg_operand") (const_int 0)]) + (match_operand:SWI48 1 "nonimmediate_operand" "%0")) + (match_operand:SWI48 2 "nonimmediate_operand" "rm")) + (match_dup 1))) + (set (match_operand:SWI48 0 "register_operand" "=r") + (plus:SWI48 (plus:SWI48 (match_op_dup 4 + [(match_dup 3) (const_int 0)]) + (match_dup 1)) + (match_dup 2)))] + "ix86_binary_operator_ok (PLUS, mode, operands)" + "adc{}\t{%2, %0|%0, %2}" + [(set_attr "type" "alu") + (set_attr "use_carry" "1") + (set_attr "pent_pair" "pu") + (set_attr "mode" "")]) + +(define_insn "sub3_carry" + [(set (match_operand:SWI 0 "nonimmediate_operand" "=m,") + (minus:SWI + (minus:SWI + (match_operand:SWI 1 "nonimmediate_operand" "0,0") + (match_operator:SWI 4 "ix86_carry_flag_operator" + [(match_operand 3 "flags_reg_operand") (const_int 0)])) + (match_operand:SWI 2 "" ",m"))) + (clobber (reg:CC FLAGS_REG))] + "ix86_binary_operator_ok (MINUS, mode, operands)" + "sbb{}\t{%2, %0|%0, %2}" + [(set_attr "type" "alu") + (set_attr "use_carry" "1") + (set_attr "pent_pair" "pu") + (set_attr "mode" "")]) + (define_insn "*subsi3_carry_zext" [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI - (minus:SI (match_operand:SI 1 "register_operand" "0") - (plus:SI (match_operator 3 "ix86_carry_flag_operator" - [(reg FLAGS_REG) (const_int 0)]) - (match_operand:SI 2 "x86_64_general_operand" "rme"))))) + (minus:SI + (minus:SI + (match_operand:SI 1 "register_operand" "0") + (match_operator:SI 3 "ix86_carry_flag_operator" + [(reg FLAGS_REG) (const_int 0)])) + (match_operand:SI 2 "x86_64_general_operand" "rme")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)" "sbb{l}\t{%2, %k0|%k0, %2}" [(set_attr "type" "alu") + (set_attr "use_carry" "1") (set_attr "pent_pair" "pu") (set_attr "mode" "SI")]) - -;; ADCX instruction -(define_insn "adcx3" +(define_insn "subborrow" [(set (reg:CCC FLAGS_REG) (compare:CCC + (match_operand:SWI48 1 "nonimmediate_operand" "0") (plus:SWI48 - (match_operand:SWI48 1 "nonimmediate_operand" "%0") - (plus:SWI48 - (match_operator 4 "ix86_carry_flag_operator" - [(match_operand 3 "flags_reg_operand") (const_int 0)]) - (match_operand:SWI48 2 "nonimmediate_operand" "rm"))) - (const_int 0))) + (match_operator:SWI48 4 "ix86_carry_flag_operator" + [(match_operand 3 "flags_reg_operand") (const_int 0)]) + (match_operand:SWI48 2 "nonimmediate_operand" "rm")))) (set (match_operand:SWI48 0 "register_operand" "=r") - (plus:SWI48 (match_dup 1) - (plus:SWI48 (match_op_dup 4 - [(match_dup 3) (const_int 0)]) - (match_dup 2))))] - "TARGET_ADX && ix86_binary_operator_ok (PLUS, mode, operands)" - "adcx\t{%2, %0|%0, %2}" + (minus:SWI48 (minus:SWI48 (match_dup 1) + (match_op_dup 4 + [(match_dup 3) (const_int 0)])) + (match_dup 2)))] + "ix86_binary_operator_ok (MINUS, mode, operands)" + "sbb{}\t{%2, %0|%0, %2}" [(set_attr "type" "alu") (set_attr "use_carry" "1") + (set_attr "pent_pair" "pu") (set_attr "mode" "")]) ;; Overflow setting add instructions +(define_expand "addqi3_cconly_overflow" + [(parallel + [(set (reg:CCC FLAGS_REG) + (compare:CCC + (plus:QI + (match_operand:QI 0 "nonimmediate_operand") + (match_operand:QI 1 "general_operand")) + (match_dup 0))) + (clobber (match_scratch:QI 2))])] + "!(MEM_P (operands[0]) && MEM_P (operands[1]))") + (define_insn "*add3_cconly_overflow" [(set (reg:CCC FLAGS_REG) (compare:CCC @@ -8462,11 +8477,11 @@ (clobber (reg:CC FLAGS_REG))] "TARGET_AVX512F && reload_completed" [(parallel [(set (match_dup 0) - (xor:HI (match_dup 0) - (match_dup 1))) + (xor:SWI1248x (match_dup 0) + (match_dup 1))) (clobber (reg:CC FLAGS_REG))]) (set (match_dup 0) - (not:HI (match_dup 0)))]) + (not:SWI1248x (match_dup 0)))]) ;;There are kortrest[bdq] but no intrinsics for them. ;;We probably don't need to implement them. @@ -8500,7 +8515,7 @@ [(set (match_operand:HI 0 "register_operand" "=k") (ior:HI (ashift:HI - (match_operand:HI 1 "register_operand" "k") + (zero_extend:HI (match_operand:QI 1 "register_operand" "k")) (const_int 8)) (zero_extend:HI (match_operand:QI 2 "register_operand" "k"))))] "TARGET_AVX512F" @@ -8513,9 +8528,9 @@ [(set (match_operand:SI 0 "register_operand" "=k") (ior:SI (ashift:SI - (match_operand:SI 1 "register_operand" "k") + (zero_extend:SI (match_operand:HI 1 "register_operand" "k")) (const_int 16)) - (zero_extend:SI (subreg:HI (match_operand:SI 2 "register_operand" "k") 0))))] + (zero_extend:SI (match_operand:HI 2 "register_operand" "k"))))] "TARGET_AVX512BW" "kunpckwd\t{%2, %1, %0|%0, %1, %2}" [(set_attr "mode" "SI")]) @@ -8524,9 +8539,9 @@ [(set (match_operand:DI 0 "register_operand" "=k") (ior:DI (ashift:DI - (match_operand:DI 1 "register_operand" "k") + (zero_extend:DI (match_operand:SI 1 "register_operand" "k")) (const_int 32)) - (zero_extend:DI (subreg:SI (match_operand:DI 2 "register_operand" "k") 0))))] + (zero_extend:DI (match_operand:SI 2 "register_operand" "k"))))] "TARGET_AVX512BW" "kunpckdq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "mode" "DI")]) @@ -8754,9 +8769,9 @@ (set (match_dup 0) (neg:DWIH (match_dup 1)))]) (parallel [(set (match_dup 2) - (plus:DWIH (match_dup 3) - (plus:DWIH (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0)) - (const_int 0)))) + (plus:DWIH (plus:DWIH (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0)) + (match_dup 3)) + (const_int 0))) (clobber (reg:CC FLAGS_REG))]) (parallel [(set (match_dup 2) @@ -12123,10 +12138,14 @@ ;; We need to disable this for TARGET_SEH, as otherwise ;; shrink-wrapped prologue gets enabled too. This might exceed ;; the maximum size of prologue in unwind information. +;; Also disallow shrink-wrapping if using stack slot to pass the +;; static chain pointer - the first instruction has to be pushl %esi +;; and it can't be moved around, as we use alternate entry points +;; in that case. (define_expand "simple_return" [(simple_return)] - "!TARGET_SEH" + "!TARGET_SEH && !ix86_static_chain_on_stack" { if (crtl->args.pops_args) { @@ -13237,7 +13256,8 @@ (call:P (mem:QI (match_operand 2 "constant_call_address_operand" "Bz")) (match_operand 3))) - (unspec:P [(match_operand 1 "tls_symbolic_operand")] + (unspec:P [(match_operand 1 "tls_symbolic_operand") + (reg:P SP_REG)] UNSPEC_TLS_GD)] "TARGET_64BIT" { @@ -13261,8 +13281,9 @@ (mem:QI (plus:DI (match_operand:DI 2 "register_operand" "b") (match_operand:DI 3 "immediate_operand" "i"))) (match_operand 4))) - (unspec:DI [(match_operand 1 "tls_symbolic_operand")] - UNSPEC_TLS_GD)] + (unspec:DI [(match_operand 1 "tls_symbolic_operand") + (reg:DI SP_REG)] + UNSPEC_TLS_GD)] "TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF && GET_CODE (operands[3]) == CONST && GET_CODE (XEXP (operands[3], 0)) == UNSPEC @@ -13283,7 +13304,8 @@ (call:P (mem:QI (match_operand 2)) (const_int 0))) - (unspec:P [(match_operand 1 "tls_symbolic_operand")] + (unspec:P [(match_operand 1 "tls_symbolic_operand") + (reg:P SP_REG)] UNSPEC_TLS_GD)])] "TARGET_64BIT" "ix86_tls_descriptor_calls_expanded_in_cfun = true;") @@ -13333,7 +13355,7 @@ (call:P (mem:QI (match_operand 1 "constant_call_address_operand" "Bz")) (match_operand 2))) - (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)] + (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)] "TARGET_64BIT" { output_asm_insn @@ -13351,7 +13373,7 @@ (mem:QI (plus:DI (match_operand:DI 1 "register_operand" "b") (match_operand:DI 2 "immediate_operand" "i"))) (match_operand 3))) - (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)] + (unspec:DI [(reg:DI SP_REG)] UNSPEC_TLS_LD_BASE)] "TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF && GET_CODE (operands[2]) == CONST && GET_CODE (XEXP (operands[2], 0)) == UNSPEC @@ -13372,7 +13394,7 @@ (call:P (mem:QI (match_operand 1)) (const_int 0))) - (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)])] + (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)])] "TARGET_64BIT" "ix86_tls_descriptor_calls_expanded_in_cfun = true;") diff --git a/contrib/gcc-5.0/gcc/config/i386/intelmic-mkoffload.c b/contrib/gcc-5.0/gcc/config/i386/intelmic-mkoffload.c index e5e5c35fc4..f8aad905a4 100644 --- a/contrib/gcc-5.0/gcc/config/i386/intelmic-mkoffload.c +++ b/contrib/gcc-5.0/gcc/config/i386/intelmic-mkoffload.c @@ -453,17 +453,18 @@ prepare_target_image (const char *target_compiler, int argc, char **argv) fork_execute (objcopy_argv[0], CONST_CAST (char **, objcopy_argv), false); /* Objcopy has created symbols, containing the input file name with - special characters replaced with '_'. We are going to rename these - new symbols. */ + non-alphanumeric characters replaced by underscores. + We are going to rename these new symbols. */ size_t symbol_name_len = strlen (target_so_filename); char *symbol_name = XALLOCAVEC (char, symbol_name_len + 1); - for (size_t i = 0; i <= symbol_name_len; i++) + for (size_t i = 0; i < symbol_name_len; i++) { char c = target_so_filename[i]; - if ((c == '/') || (c == '.')) + if (!ISALNUM (c)) c = '_'; symbol_name[i] = c; } + symbol_name[symbol_name_len] = '\0'; char *opt_for_objcopy[3]; opt_for_objcopy[0] = XALLOCAVEC (char, sizeof ("_binary__start=") diff --git a/contrib/gcc-5.0/gcc/config/i386/sse.md b/contrib/gcc-5.0/gcc/config/i386/sse.md index 2873535369..dc7f6a7bab 100644 --- a/contrib/gcc-5.0/gcc/config/i386/sse.md +++ b/contrib/gcc-5.0/gcc/config/i386/sse.md @@ -375,8 +375,8 @@ [(V16HI "TARGET_AVX2") V8HI (V8SI "TARGET_AVX2") V4SI]) -(define_mode_iterator VI124_AVX512F - [(V32QI "TARGET_AVX2") V16QI +(define_mode_iterator VI124_AVX2_24_AVX512F_1_AVX512BW + [(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX2") V16QI (V32HI "TARGET_AVX512F") (V16HI "TARGET_AVX2") V8HI (V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI]) @@ -392,9 +392,9 @@ [(V8SI "TARGET_AVX2") V4SI (V4DI "TARGET_AVX2") V2DI]) -(define_mode_iterator VI248_AVX2_8_AVX512F - [(V16HI "TARGET_AVX2") V8HI - (V8SI "TARGET_AVX2") V4SI +(define_mode_iterator VI248_AVX2_8_AVX512F_24_AVX512BW + [(V32HI "TARGET_AVX512BW") (V16HI "TARGET_AVX2") V8HI + (V16SI "TARGET_AVX512BW") (V8SI "TARGET_AVX2") V4SI (V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX2") V2DI]) (define_mode_iterator VI248_AVX512BW_AVX512VL @@ -410,6 +410,14 @@ [(V16SI "TARGET_AVX512F") V8SI V4SI (V8DI "TARGET_AVX512F") V4DI V2DI]) +(define_mode_iterator VI48_AVX_AVX512F + [(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX") V4SI + (V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX") V2DI]) + +(define_mode_iterator VI12_AVX_AVX512F + [ (V64QI "TARGET_AVX512F") (V32QI "TARGET_AVX") V16QI + (V32HI "TARGET_AVX512F") (V16HI "TARGET_AVX") V8HI]) + (define_mode_iterator V48_AVX2 [V4SF V2DF V8SF V4DF @@ -8490,42 +8498,48 @@ (set_attr "mode" "DF,DF,V1DF,V1DF,V1DF,V2DF,V1DF,V1DF,V1DF")]) (define_insn "vec_dupv2df" - [(set (match_operand:V2DF 0 "register_operand" "=x,v") + [(set (match_operand:V2DF 0 "register_operand" "=x,x,v") (vec_duplicate:V2DF - (match_operand:DF 1 "nonimmediate_operand" " 0,vm")))] + (match_operand:DF 1 "nonimmediate_operand" " 0,xm,vm")))] "TARGET_SSE2 && " "@ unpcklpd\t%0, %0 - %vmovddup\t{%1, %0|%0, %1}" - [(set_attr "isa" "noavx,sse3") + %vmovddup\t{%1, %0|%0, %1} + vmovddup\t{%1, %0|%0, %1}" + [(set_attr "isa" "noavx,sse3,avx512vl") (set_attr "type" "sselog1") - (set_attr "prefix" "orig,maybe_vex") - (set_attr "mode" "V2DF,DF")]) + (set_attr "prefix" "orig,maybe_vex,evex") + (set_attr "mode" "V2DF,DF,DF")]) (define_insn "*vec_concatv2df" - [(set (match_operand:V2DF 0 "register_operand" "=x,v,v,x,x,v,x,x") + [(set (match_operand:V2DF 0 "register_operand" "=x,x,v,x,v,x,x,v,x,x") (vec_concat:V2DF - (match_operand:DF 1 "nonimmediate_operand" " 0,v,m,0,x,m,0,0") - (match_operand:DF 2 "vector_move_operand" " x,v,1,m,m,C,x,m")))] + (match_operand:DF 1 "nonimmediate_operand" " 0,x,v,m,m,0,x,m,0,0") + (match_operand:DF 2 "vector_move_operand" " x,x,v,1,1,m,m,C,x,m")))] "TARGET_SSE" "@ unpcklpd\t{%2, %0|%0, %2} vunpcklpd\t{%2, %1, %0|%0, %1, %2} + vunpcklpd\t{%2, %1, %0|%0, %1, %2} %vmovddup\t{%1, %0|%0, %1} + vmovddup\t{%1, %0|%0, %1} movhpd\t{%2, %0|%0, %2} vmovhpd\t{%2, %1, %0|%0, %1, %2} %vmovsd\t{%1, %0|%0, %1} movlhps\t{%2, %0|%0, %2} movhps\t{%2, %0|%0, %2}" - [(set_attr "isa" "sse2_noavx,avx,sse3,sse2_noavx,avx,sse2,noavx,noavx") + [(set_attr "isa" "sse2_noavx,avx,avx512vl,sse3,avx512vl,sse2_noavx,avx,sse2,noavx,noavx") (set (attr "type") (if_then_else - (eq_attr "alternative" "0,1,2") + (eq_attr "alternative" "0,1,2,3,4") (const_string "sselog") (const_string "ssemov"))) - (set_attr "prefix_data16" "*,*,*,1,*,*,*,*") - (set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex,orig,orig") - (set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,DF,V4SF,V2SF")]) + (set (attr "prefix_data16") + (if_then_else (eq_attr "alternative" "5") + (const_string "1") + (const_string "*"))) + (set_attr "prefix" "orig,vex,evex,maybe_vex,evex,orig,vex,maybe_vex,orig,orig") + (set_attr "mode" "V2DF,V2DF,V2DF, DF, DF, V1DF,V1DF,DF,V4SF,V2SF")]) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; @@ -8575,7 +8589,7 @@ (match_operand: 2 "register_operand")))] "TARGET_AVX512F") -(define_insn "*avx512bw_v32hiv32qi2" +(define_insn "avx512bw_v32hiv32qi2" [(set (match_operand:V32QI 0 "nonimmediate_operand" "=v,m") (any_truncate:V32QI (match_operand:V32HI 1 "register_operand" "v,v")))] @@ -10911,10 +10925,10 @@ }) (define_insn "3" - [(set (match_operand:VI 0 "register_operand" "=x,v") - (any_logic:VI - (match_operand:VI 1 "nonimmediate_operand" "%0,v") - (match_operand:VI 2 "nonimmediate_operand" "xm,vm")))] + [(set (match_operand:VI48_AVX_AVX512F 0 "register_operand" "=x,v") + (any_logic:VI48_AVX_AVX512F + (match_operand:VI48_AVX_AVX512F 1 "nonimmediate_operand" "%0,v") + (match_operand:VI48_AVX_AVX512F 2 "nonimmediate_operand" "xm,vm")))] "TARGET_SSE && && ix86_binary_operator_ok (, mode, operands)" { @@ -10943,24 +10957,120 @@ case V4DImode: case V4SImode: case V2DImode: - if (TARGET_AVX512VL) + tmp = TARGET_AVX512VL ? "p" : "p"; + break; + default: + gcc_unreachable (); + } + break; + + case MODE_V8SF: + gcc_assert (TARGET_AVX); + case MODE_V4SF: + gcc_assert (TARGET_SSE); + gcc_assert (!); + tmp = "ps"; + break; + + default: + gcc_unreachable (); + } + + switch (which_alternative) + { + case 0: + if () + ops = "v%s\t{%%2, %%0, %%0|%%0, %%0, %%2}"; + else + ops = "%s\t{%%2, %%0|%%0, %%2}"; + break; + case 1: + ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + break; + default: + gcc_unreachable (); + } + + snprintf (buf, sizeof (buf), ops, tmp); + return buf; +} + [(set_attr "isa" "noavx,avx") + (set_attr "type" "sselog") + (set (attr "prefix_data16") + (if_then_else + (and (eq_attr "alternative" "0") + (eq_attr "mode" "TI")) + (const_string "1") + (const_string "*"))) + (set_attr "prefix" "") + (set (attr "mode") + (cond [(and (match_test " == 16") + (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")) + (const_string "") + (match_test "TARGET_AVX2") + (const_string "") + (match_test "TARGET_AVX") + (if_then_else + (match_test " > 16") + (const_string "V8SF") + (const_string "")) + (ior (not (match_test "TARGET_SSE2")) + (match_test "optimize_function_for_size_p (cfun)")) + (const_string "V4SF") + ] + (const_string "")))]) + +(define_insn "*3" + [(set (match_operand:VI12_AVX_AVX512F 0 "register_operand" "=x,v") + (any_logic: VI12_AVX_AVX512F + (match_operand:VI12_AVX_AVX512F 1 "nonimmediate_operand" "%0,v") + (match_operand:VI12_AVX_AVX512F 2 "nonimmediate_operand" "xm,vm")))] + "TARGET_SSE && ix86_binary_operator_ok (, mode, operands)" +{ + static char buf[64]; + const char *ops; + const char *tmp; + const char *ssesuffix; + + switch (get_attr_mode (insn)) + { + case MODE_XI: + gcc_assert (TARGET_AVX512F); + case MODE_OI: + gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); + case MODE_TI: + gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); + switch (mode) + { + case V64QImode: + case V32HImode: + if (TARGET_AVX512F) { - tmp = "p"; + tmp = "p"; + ssesuffix = "q"; + break; + } + case V32QImode: + case V16HImode: + case V16QImode: + case V8HImode: + if (TARGET_AVX512VL || TARGET_AVX2 || TARGET_SSE2) + { + tmp = "p"; + ssesuffix = TARGET_AVX512VL ? "q" : ""; break; } default: - tmp = TARGET_AVX512VL ? "pq" : "p"; + gcc_unreachable (); } break; - case MODE_V16SF: - gcc_assert (TARGET_AVX512F); case MODE_V8SF: gcc_assert (TARGET_AVX); case MODE_V4SF: gcc_assert (TARGET_SSE); - tmp = "ps"; + ssesuffix = ""; break; default: @@ -10971,15 +11081,16 @@ { case 0: ops = "%s\t{%%2, %%0|%%0, %%2}"; + snprintf (buf, sizeof (buf), ops, tmp); break; case 1: - ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + ops = "v%s%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + snprintf (buf, sizeof (buf), ops, tmp, ssesuffix); break; default: gcc_unreachable (); } - snprintf (buf, sizeof (buf), ops, tmp); return buf; } [(set_attr "isa" "noavx,avx") @@ -11060,8 +11171,8 @@ (define_expand "vec_pack_trunc_" [(match_operand: 0 "register_operand") - (match_operand:VI248_AVX2_8_AVX512F 1 "register_operand") - (match_operand:VI248_AVX2_8_AVX512F 2 "register_operand")] + (match_operand:VI248_AVX2_8_AVX512F_24_AVX512BW 1 "register_operand") + (match_operand:VI248_AVX2_8_AVX512F_24_AVX512BW 2 "register_operand")] "TARGET_SSE2" { rtx op1 = gen_lowpart (mode, operands[1]); @@ -12971,25 +13082,25 @@ (define_expand "vec_unpacks_lo_" [(match_operand: 0 "register_operand") - (match_operand:VI124_AVX512F 1 "register_operand")] + (match_operand:VI124_AVX2_24_AVX512F_1_AVX512BW 1 "register_operand")] "TARGET_SSE2" "ix86_expand_sse_unpack (operands[0], operands[1], false, false); DONE;") (define_expand "vec_unpacks_hi_" [(match_operand: 0 "register_operand") - (match_operand:VI124_AVX512F 1 "register_operand")] + (match_operand:VI124_AVX2_24_AVX512F_1_AVX512BW 1 "register_operand")] "TARGET_SSE2" "ix86_expand_sse_unpack (operands[0], operands[1], false, true); DONE;") (define_expand "vec_unpacku_lo_" [(match_operand: 0 "register_operand") - (match_operand:VI124_AVX512F 1 "register_operand")] + (match_operand:VI124_AVX2_24_AVX512F_1_AVX512BW 1 "register_operand")] "TARGET_SSE2" "ix86_expand_sse_unpack (operands[0], operands[1], true, false); DONE;") (define_expand "vec_unpacku_hi_" [(match_operand: 0 "register_operand") - (match_operand:VI124_AVX512F 1 "register_operand")] + (match_operand:VI124_AVX2_24_AVX512F_1_AVX512BW 1 "register_operand")] "TARGET_SSE2" "ix86_expand_sse_unpack (operands[0], operands[1], true, true); DONE;") diff --git a/contrib/gcc-5.0/gcc/config/i386/sync.md b/contrib/gcc-5.0/gcc/config/i386/sync.md index 61a2a81926..59573d40a9 100644 --- a/contrib/gcc-5.0/gcc/config/i386/sync.md +++ b/contrib/gcc-5.0/gcc/config/i386/sync.md @@ -105,11 +105,11 @@ [(match_operand:SI 0 "const_int_operand")] ;; model "" { - enum memmodel model = (enum memmodel) (INTVAL (operands[0]) & MEMMODEL_MASK); + enum memmodel model = memmodel_from_int (INTVAL (operands[0])); /* Unless this is a SEQ_CST fence, the i386 memory model is strong enough not to require barriers of any kind. */ - if (model == MEMMODEL_SEQ_CST) + if (is_mm_seq_cst (model)) { rtx (*mfence_insn)(rtx); rtx mem; @@ -217,7 +217,7 @@ UNSPEC_STA))] "" { - enum memmodel model = (enum memmodel) (INTVAL (operands[2]) & MEMMODEL_MASK); + enum memmodel model = memmodel_from_int (INTVAL (operands[2])); if (mode == DImode && !TARGET_64BIT) { @@ -233,7 +233,7 @@ operands[1] = force_reg (mode, operands[1]); /* For seq-cst stores, when we lack MFENCE, use XCHG. */ - if (model == MEMMODEL_SEQ_CST && !(TARGET_64BIT || TARGET_SSE2)) + if (is_mm_seq_cst (model) && !(TARGET_64BIT || TARGET_SSE2)) { emit_insn (gen_atomic_exchange (gen_reg_rtx (mode), operands[0], operands[1], @@ -246,7 +246,7 @@ operands[2])); } /* ... followed by an MFENCE, if required. */ - if (model == MEMMODEL_SEQ_CST) + if (is_mm_seq_cst (model)) emit_insn (gen_mem_thread_fence (operands[2])); DONE; }) diff --git a/contrib/gcc-5.0/gcc/coretypes.h b/contrib/gcc-5.0/gcc/coretypes.h index 90fa13faf3..0ee8633c72 100644 --- a/contrib/gcc-5.0/gcc/coretypes.h +++ b/contrib/gcc-5.0/gcc/coretypes.h @@ -263,6 +263,18 @@ enum function_class { function_c11_misc }; +/* Suppose that higher bits are target dependent. */ +#define MEMMODEL_MASK ((1<<16)-1) + +/* Legacy sync operations set this upper flag in the memory model. This allows + targets that need to do something stronger for sync operations to + differentiate with their target patterns and issue a more appropriate insn + sequence. See bugzilla 65697 for background. */ +#define MEMMODEL_SYNC (1<<15) + +/* Memory model without SYNC bit for targets/operations that do not care. */ +#define MEMMODEL_BASE_MASK (MEMMODEL_SYNC-1) + /* Memory model types for the __atomic* builtins. This must match the order in libstdc++-v3/include/bits/atomic_base.h. */ enum memmodel @@ -273,12 +285,12 @@ enum memmodel MEMMODEL_RELEASE = 3, MEMMODEL_ACQ_REL = 4, MEMMODEL_SEQ_CST = 5, - MEMMODEL_LAST = 6 + MEMMODEL_LAST = 6, + MEMMODEL_SYNC_ACQUIRE = MEMMODEL_ACQUIRE | MEMMODEL_SYNC, + MEMMODEL_SYNC_RELEASE = MEMMODEL_RELEASE | MEMMODEL_SYNC, + MEMMODEL_SYNC_SEQ_CST = MEMMODEL_SEQ_CST | MEMMODEL_SYNC }; -/* Suppose that higher bits are target dependent. */ -#define MEMMODEL_MASK ((1<<16)-1) - /* Support for user-provided GGC and PCH markers. The first parameter is a pointer to a pointer, the second a cookie. */ typedef void (*gt_pointer_operator) (void *, void *); diff --git a/contrib/gcc-5.0/gcc/cp/call.c b/contrib/gcc-5.0/gcc/cp/call.c index 949225b18f..0df408c917 100644 --- a/contrib/gcc-5.0/gcc/cp/call.c +++ b/contrib/gcc-5.0/gcc/cp/call.c @@ -7002,6 +7002,39 @@ call_copy_ctor (tree a, tsubst_flags_t complain) return r; } +/* Return true iff T refers to a base field. */ + +static bool +is_base_field_ref (tree t) +{ + STRIP_NOPS (t); + if (TREE_CODE (t) == ADDR_EXPR) + t = TREE_OPERAND (t, 0); + if (TREE_CODE (t) == COMPONENT_REF) + t = TREE_OPERAND (t, 1); + if (TREE_CODE (t) == FIELD_DECL) + return DECL_FIELD_IS_BASE (t); + return false; +} + +/* We can't elide a copy from a function returning by value to a base + subobject, as the callee might clobber tail padding. Return true iff this + could be that case. */ + +static bool +unsafe_copy_elision_p (tree target, tree exp) +{ + tree type = TYPE_MAIN_VARIANT (TREE_TYPE (exp)); + if (type == CLASSTYPE_AS_BASE (type)) + return false; + if (!is_base_field_ref (target) + && resolves_to_fixed_type_p (target, NULL)) + return false; + tree init = TARGET_EXPR_INITIAL (exp); + return (TREE_CODE (init) == AGGR_INIT_EXPR + && !AGGR_INIT_VIA_CTOR_P (init)); +} + /* Subroutine of the various build_*_call functions. Overload resolution has chosen a winning candidate CAND; build up a CALL_EXPR accordingly. ARGS is a TREE_LIST of the unconverted arguments to the call. FLAGS is a @@ -7419,7 +7452,9 @@ build_over_call (struct z_candidate *cand, int flags, tsubst_flags_t complain) else if (trivial) return force_target_expr (DECL_CONTEXT (fn), arg, complain); } - else if (TREE_CODE (arg) == TARGET_EXPR || trivial) + else if (trivial + || (TREE_CODE (arg) == TARGET_EXPR + && !unsafe_copy_elision_p (fa, arg))) { tree to = stabilize_reference (cp_build_indirect_ref (fa, RO_NULL, complain)); diff --git a/contrib/gcc-5.0/gcc/cp/class.c b/contrib/gcc-5.0/gcc/cp/class.c index d59d351537..f3ec826c86 100644 --- a/contrib/gcc-5.0/gcc/cp/class.c +++ b/contrib/gcc-5.0/gcc/cp/class.c @@ -1989,14 +1989,23 @@ fixup_attribute_variants (tree t) if (!t) return; + tree attrs = TYPE_ATTRIBUTES (t); + unsigned align = TYPE_ALIGN (t); + bool user_align = TYPE_USER_ALIGN (t); + for (variants = TYPE_NEXT_VARIANT (t); variants; variants = TYPE_NEXT_VARIANT (variants)) { /* These are the two fields that check_qualified_type looks at and are affected by attributes. */ - TYPE_ATTRIBUTES (variants) = TYPE_ATTRIBUTES (t); - TYPE_ALIGN (variants) = TYPE_ALIGN (t); + TYPE_ATTRIBUTES (variants) = attrs; + unsigned valign = align; + if (TYPE_USER_ALIGN (variants)) + valign = MAX (valign, TYPE_ALIGN (variants)); + else + TYPE_USER_ALIGN (variants) = user_align; + TYPE_ALIGN (variants) = valign; } } diff --git a/contrib/gcc-5.0/gcc/cp/constexpr.c b/contrib/gcc-5.0/gcc/cp/constexpr.c index e25072631b..ba9fd0e046 100644 --- a/contrib/gcc-5.0/gcc/cp/constexpr.c +++ b/contrib/gcc-5.0/gcc/cp/constexpr.c @@ -1750,7 +1750,38 @@ cxx_eval_array_reference (const constexpr_ctx *ctx, tree t, VERIFY_CONSTANT (ary); gcc_unreachable (); } - if (compare_tree_int (index, len) >= 0) + + i = tree_fits_shwi_p (index) ? tree_to_shwi (index) : -1; + bool found = true; + if (TREE_CODE (ary) == CONSTRUCTOR && len + && (TREE_CODE (CONSTRUCTOR_ELT (ary, len-1)->index) == RANGE_EXPR + || compare_tree_int (CONSTRUCTOR_ELT (ary, len-1)->index, len-1))) + { + /* The last element doesn't match its position in the array; this must be + a sparse array from cxx_eval_store_expression. So iterate. */ + found = false; + vec *v = CONSTRUCTOR_ELTS (ary); + constructor_elt *e; + for (unsigned ix = 0; vec_safe_iterate (v, ix, &e); ++ix) + { + if (TREE_CODE (e->index) == RANGE_EXPR) + { + tree lo = TREE_OPERAND (e->index, 0); + tree hi = TREE_OPERAND (e->index, 1); + if (tree_int_cst_le (lo, index) && tree_int_cst_le (index, hi)) + found = true; + } + else if (tree_int_cst_equal (e->index, index)) + found = true; + if (found) + { + i = ix; + break; + } + } + } + + if (i >= len || !found) { if (tree_int_cst_lt (index, array_type_nelts_top (TREE_TYPE (ary)))) { @@ -1767,14 +1798,14 @@ cxx_eval_array_reference (const constexpr_ctx *ctx, tree t, *non_constant_p = true; return t; } - else if (tree_int_cst_lt (index, integer_zero_node)) + else if (i < 0) { if (!ctx->quiet) error ("negative array subscript"); *non_constant_p = true; return t; } - i = tree_to_shwi (index); + if (TREE_CODE (ary) == CONSTRUCTOR) return (*CONSTRUCTOR_ELTS (ary))[i].value; else if (elem_nchars == 1) @@ -2719,10 +2750,13 @@ cxx_eval_store_expression (const constexpr_ctx *ctx, tree t, { /* Create a new CONSTRUCTOR in case evaluation of the initializer wants to modify it. */ - new_ctx.ctor = build_constructor (type, NULL); if (*valp == NULL_TREE) - *valp = new_ctx.ctor; - CONSTRUCTOR_NO_IMPLICIT_ZERO (new_ctx.ctor) = true; + { + *valp = new_ctx.ctor = build_constructor (type, NULL); + CONSTRUCTOR_NO_IMPLICIT_ZERO (new_ctx.ctor) = true; + } + else + new_ctx.ctor = *valp; new_ctx.object = target; } diff --git a/contrib/gcc-5.0/gcc/cp/cp-tree.h b/contrib/gcc-5.0/gcc/cp/cp-tree.h index 4e525e04d5..6f13b01785 100644 --- a/contrib/gcc-5.0/gcc/cp/cp-tree.h +++ b/contrib/gcc-5.0/gcc/cp/cp-tree.h @@ -101,6 +101,7 @@ c-common.h, not after. DECLTYPE_FOR_INIT_CAPTURE (in DECLTYPE_TYPE) CONSTRUCTOR_NO_IMPLICIT_ZERO (in CONSTRUCTOR) TINFO_USED_TEMPLATE_ID (in TEMPLATE_INFO) + PACK_EXPANSION_SIZEOF_P (in *_PACK_EXPANSION) 2: IDENTIFIER_OPNAME_P (in IDENTIFIER_NODE) ICS_THIS_FLAG (in _CONV) DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (in VAR_DECL) @@ -3031,6 +3032,9 @@ extern void decl_shadowed_for_var_insert (tree, tree); /* True iff this pack expansion is within a function context. */ #define PACK_EXPANSION_LOCAL_P(NODE) TREE_LANG_FLAG_0 (NODE) +/* True iff this pack expansion is for sizeof.... */ +#define PACK_EXPANSION_SIZEOF_P(NODE) TREE_LANG_FLAG_1 (NODE) + /* Determine if this is an argument pack. */ #define ARGUMENT_PACK_P(NODE) \ (TREE_CODE (NODE) == TYPE_ARGUMENT_PACK \ @@ -4606,6 +4610,11 @@ extern GTY(()) vec *local_classes; extern int at_eof; +/* True if note_mangling_alias should enqueue mangling aliases for + later generation, rather than emitting them right away. */ + +extern bool defer_mangling_aliases; + /* A list of namespace-scope objects which have constructors or destructors which reside in the global scope. The decl is stored in the TREE_VALUE slot and the initializer is stored in the @@ -5453,6 +5462,8 @@ extern tree finish_case_label (location_t, tree, tree); extern tree cxx_maybe_build_cleanup (tree, tsubst_flags_t); /* in decl2.c */ +extern void note_mangling_alias (tree, tree); +extern void generate_mangling_aliases (void); extern bool check_java_method (tree); extern tree build_memfn_type (tree, tree, cp_cv_quals, cp_ref_qualifier); extern tree build_pointer_ptrmemfn_type (tree); @@ -5762,6 +5773,7 @@ extern bool reregister_specialization (tree, tree, tree); extern tree instantiate_non_dependent_expr (tree); extern tree instantiate_non_dependent_expr_sfinae (tree, tsubst_flags_t); extern tree instantiate_non_dependent_expr_internal (tree, tsubst_flags_t); +extern bool variable_template_specialization_p (tree); extern bool alias_type_or_template_p (tree); extern bool alias_template_specialization_p (const_tree); extern bool dependent_alias_template_spec_p (const_tree); @@ -5944,7 +5956,7 @@ extern tree perform_koenig_lookup (tree, vec *, tsubst_flags_t); extern tree finish_call_expr (tree, vec **, bool, bool, tsubst_flags_t); -extern tree finish_template_variable (tree); +extern tree finish_template_variable (tree, tsubst_flags_t = tf_warning_or_error); extern tree finish_increment_expr (tree, enum tree_code); extern tree finish_this_expr (void); extern tree finish_pseudo_destructor_expr (tree, tree, tree, location_t); @@ -6423,7 +6435,7 @@ extern bool cilk_valid_spawn (tree); /* In cp-ubsan.c */ extern void cp_ubsan_maybe_instrument_member_call (tree); extern void cp_ubsan_instrument_member_accesses (tree *); -extern tree cp_ubsan_maybe_instrument_downcast (location_t, tree, tree); +extern tree cp_ubsan_maybe_instrument_downcast (location_t, tree, tree, tree); extern tree cp_ubsan_maybe_instrument_cast_to_vbase (location_t, tree, tree); /* -- end of C++ */ diff --git a/contrib/gcc-5.0/gcc/cp/cp-ubsan.c b/contrib/gcc-5.0/gcc/cp/cp-ubsan.c index ce12263177..6ffdab3562 100644 --- a/contrib/gcc-5.0/gcc/cp/cp-ubsan.c +++ b/contrib/gcc-5.0/gcc/cp/cp-ubsan.c @@ -276,13 +276,14 @@ cp_ubsan_instrument_member_accesses (tree *t_p) /* Instrument downcast. */ tree -cp_ubsan_maybe_instrument_downcast (location_t loc, tree type, tree op) +cp_ubsan_maybe_instrument_downcast (location_t loc, tree type, + tree intype, tree op) { if (!POINTER_TYPE_P (type) + || !POINTER_TYPE_P (intype) || !POINTER_TYPE_P (TREE_TYPE (op)) - || !CLASS_TYPE_P (TREE_TYPE (type)) || !CLASS_TYPE_P (TREE_TYPE (TREE_TYPE (op))) - || !DERIVED_FROM_P (TREE_TYPE (TREE_TYPE (op)), TREE_TYPE (type))) + || !is_properly_derived_from (TREE_TYPE (type), TREE_TYPE (intype))) return NULL_TREE; return cp_ubsan_maybe_instrument_vptr (loc, op, TREE_TYPE (type), true, diff --git a/contrib/gcc-5.0/gcc/cp/cvt.c b/contrib/gcc-5.0/gcc/cp/cvt.c index 9aa9006f19..10d50ae2a6 100644 --- a/contrib/gcc-5.0/gcc/cp/cvt.c +++ b/contrib/gcc-5.0/gcc/cp/cvt.c @@ -695,7 +695,8 @@ ocp_convert (tree type, tree expr, int convtype, int flags, } /* FIXME remove when moving to c_fully_fold model. */ - e = scalar_constant_value (e); + if (!CLASS_TYPE_P (type)) + e = scalar_constant_value (e); if (error_operand_p (e)) return error_mark_node; diff --git a/contrib/gcc-5.0/gcc/cp/decl.c b/contrib/gcc-5.0/gcc/cp/decl.c index 72c77eaafa..c9e98e96f7 100644 --- a/contrib/gcc-5.0/gcc/cp/decl.c +++ b/contrib/gcc-5.0/gcc/cp/decl.c @@ -2907,14 +2907,16 @@ decl_jump_unsafe (tree decl) return 0; } -/* A subroutine of check_previous_goto_1 to identify a branch to the user. */ +/* A subroutine of check_previous_goto_1 and check_goto to identify a branch + to the user. */ static bool -identify_goto (tree decl, const location_t *locus) +identify_goto (tree decl, location_t loc, const location_t *locus, + diagnostic_t diag_kind) { - bool complained = (decl - ? permerror (input_location, "jump to label %qD", decl) - : permerror (input_location, "jump to case label")); + bool complained + = (decl ? emit_diagnostic (diag_kind, loc, 0, "jump to label %qD", decl) + : emit_diagnostic (diag_kind, loc, 0, "jump to case label")); if (complained && locus) inform (*locus, " from here"); return complained; @@ -2931,15 +2933,17 @@ check_previous_goto_1 (tree decl, cp_binding_level* level, tree names, bool exited_omp, const location_t *locus) { cp_binding_level *b; - bool identified = false, complained = false; + bool complained = false; + int identified = 0; bool saw_eh = false, saw_omp = false; if (exited_omp) { - complained = identify_goto (decl, locus); + complained = identify_goto (decl, input_location, locus, DK_ERROR); if (complained) inform (input_location, " exits OpenMP structured block"); - identified = saw_omp = true; + saw_omp = true; + identified = 2; } for (b = current_binding_level; b ; b = b->level_chain) @@ -2956,8 +2960,9 @@ check_previous_goto_1 (tree decl, cp_binding_level* level, tree names, if (!identified) { - complained = identify_goto (decl, locus); - identified = true; + complained = identify_goto (decl, input_location, locus, + DK_PERMERROR); + identified = 1; } if (complained) { @@ -2974,10 +2979,11 @@ check_previous_goto_1 (tree decl, cp_binding_level* level, tree names, break; if ((b->kind == sk_try || b->kind == sk_catch) && !saw_eh) { - if (!identified) + if (identified < 2) { - complained = identify_goto (decl, locus); - identified = true; + complained = identify_goto (decl, input_location, locus, + DK_ERROR); + identified = 2; } if (complained) { @@ -2990,10 +2996,11 @@ check_previous_goto_1 (tree decl, cp_binding_level* level, tree names, } if (b->kind == sk_omp && !saw_omp) { - if (!identified) + if (identified < 2) { - complained = identify_goto (decl, locus); - identified = true; + complained = identify_goto (decl, input_location, locus, + DK_ERROR); + identified = 2; } if (complained) inform (input_location, " enters OpenMP structured block"); @@ -3025,7 +3032,8 @@ void check_goto (tree decl) { struct named_label_entry *ent, dummy; - bool saw_catch = false, identified = false, complained = false; + bool saw_catch = false, complained = false; + int identified = 0; tree bad; unsigned ix; @@ -3068,10 +3076,12 @@ check_goto (tree decl) if (ent->in_try_scope || ent->in_catch_scope || ent->in_omp_scope || !vec_safe_is_empty (ent->bad_decls)) { - complained = permerror (input_location, "jump to label %q+D", decl); - if (complained) - inform (input_location, " from here"); - identified = true; + diagnostic_t diag_kind = DK_PERMERROR; + if (ent->in_try_scope || ent->in_catch_scope || ent->in_omp_scope) + diag_kind = DK_ERROR; + complained = identify_goto (decl, DECL_SOURCE_LOCATION (decl), + &input_location, diag_kind); + identified = 1 + (diag_kind == DK_ERROR); } FOR_EACH_VEC_SAFE_ELT (ent->bad_decls, ix, bad) @@ -3081,6 +3091,12 @@ check_goto (tree decl) if (u > 1 && DECL_ARTIFICIAL (bad)) { /* Can't skip init of __exception_info. */ + if (identified == 1) + { + complained = identify_goto (decl, DECL_SOURCE_LOCATION (decl), + &input_location, DK_ERROR); + identified = 2; + } if (complained) inform (DECL_SOURCE_LOCATION (bad), " enters catch block"); saw_catch = true; @@ -3117,13 +3133,12 @@ check_goto (tree decl) break; if (b->kind == sk_omp) { - if (!identified) + if (identified < 2) { - complained = permerror (input_location, - "jump to label %q+D", decl); - if (complained) - inform (input_location, " from here"); - identified = true; + complained = identify_goto (decl, + DECL_SOURCE_LOCATION (decl), + &input_location, DK_ERROR); + identified = 2; } if (complained) inform (input_location, " exits OpenMP structured block"); diff --git a/contrib/gcc-5.0/gcc/cp/decl2.c b/contrib/gcc-5.0/gcc/cp/decl2.c index f5d1e52be8..8d895fef43 100644 --- a/contrib/gcc-5.0/gcc/cp/decl2.c +++ b/contrib/gcc-5.0/gcc/cp/decl2.c @@ -118,9 +118,18 @@ static GTY(()) vec *deferred_fns; sure are defined. */ static GTY(()) vec *no_linkage_decls; +/* A vector of alternating decls and identifiers, where the latter + is to be an alias for the former if the former is defined. */ +static GTY(()) vec *mangling_aliases; + /* Nonzero if we're done parsing and into end-of-file activities. */ int at_eof; + +/* True if note_mangling_alias should enqueue mangling aliases for + later generation, rather than emitting them right away. */ + +bool defer_mangling_aliases = true; /* Return a member function type (a METHOD_TYPE), given FNTYPE (a @@ -1742,6 +1751,9 @@ mark_vtable_entries (tree decl) tree fnaddr; unsigned HOST_WIDE_INT idx; + /* It's OK for the vtable to refer to deprecated virtual functions. */ + warning_sentinel w(warn_deprecated_decl); + FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (DECL_INITIAL (decl)), idx, fnaddr) { @@ -4232,8 +4244,12 @@ no_linkage_error (tree decl) TYPE_NAME (t)); } else if (cxx_dialect >= cxx11) - permerror (DECL_SOURCE_LOCATION (decl), "%q#D, declared using local type " - "%qT, is used but never defined", decl, t); + { + if (TREE_CODE (decl) == VAR_DECL || !DECL_PURE_VIRTUAL_P (decl)) + permerror (DECL_SOURCE_LOCATION (decl), + "%q#D, declared using local type " + "%qT, is used but never defined", decl, t); + } else if (TREE_CODE (decl) == VAR_DECL) warning_at (DECL_SOURCE_LOCATION (decl), 0, "type %qT with no linkage " "used to declare variable %q#D with linkage", t, decl); @@ -4320,6 +4336,69 @@ handle_tls_init (void) expand_or_defer_fn (finish_function (0)); } +/* We're at the end of compilation, so generate any mangling aliases that + we've been saving up, if DECL is going to be output and ID2 isn't + already taken by another declaration. */ + +static void +generate_mangling_alias (tree decl, tree id2) +{ + /* If there's a declaration already using this mangled name, + don't create a compatibility alias that conflicts. */ + if (IDENTIFIER_GLOBAL_VALUE (id2)) + return; + + struct cgraph_node *n = NULL; + if (TREE_CODE (decl) == FUNCTION_DECL + && !(n = cgraph_node::get (decl))) + /* Don't create an alias to an unreferenced function. */ + return; + + tree alias = make_alias_for (decl, id2); + SET_IDENTIFIER_GLOBAL_VALUE (id2, alias); + DECL_IGNORED_P (alias) = 1; + TREE_PUBLIC (alias) = TREE_PUBLIC (decl); + DECL_VISIBILITY (alias) = DECL_VISIBILITY (decl); + if (vague_linkage_p (decl)) + DECL_WEAK (alias) = 1; + if (TREE_CODE (decl) == FUNCTION_DECL) + n->create_same_body_alias (alias, decl); + else + varpool_node::create_extra_name_alias (alias, decl); +} + +/* Note that we might want to emit an alias with the symbol ID2 for DECL at + the end of translation, for compatibility across bugs in the mangling + implementation. */ + +void +note_mangling_alias (tree decl ATTRIBUTE_UNUSED, tree id2 ATTRIBUTE_UNUSED) +{ +#ifdef ASM_OUTPUT_DEF + if (!defer_mangling_aliases) + generate_mangling_alias (decl, id2); + else + { + vec_safe_push (mangling_aliases, decl); + vec_safe_push (mangling_aliases, id2); + } +#endif +} + +/* Emit all mangling aliases that were deferred up to this point. */ + +void +generate_mangling_aliases () +{ + while (!vec_safe_is_empty (mangling_aliases)) + { + tree id2 = mangling_aliases->pop(); + tree decl = mangling_aliases->pop(); + generate_mangling_alias (decl, id2); + } + defer_mangling_aliases = false; +} + /* The entire file is now complete. If requested, dump everything to a file. */ @@ -4681,6 +4760,8 @@ cp_write_global_declarations (void) } while (reconsider); + generate_mangling_aliases (); + /* All used inline functions must have a definition at this point. */ FOR_EACH_VEC_SAFE_ELT (deferred_fns, i, decl) { diff --git a/contrib/gcc-5.0/gcc/cp/error.c b/contrib/gcc-5.0/gcc/cp/error.c index ce43f86b72..4bcd281965 100644 --- a/contrib/gcc-5.0/gcc/cp/error.c +++ b/contrib/gcc-5.0/gcc/cp/error.c @@ -1230,7 +1230,8 @@ dump_decl (cxx_pretty_printer *pp, tree t, int flags) if (args == error_mark_node) pp_string (pp, M_("