From 0f54693073cef9158dd5df73eb8d5ed890e9da82 Mon Sep 17 00:00:00 2001 From: Sepherosa Ziehau Date: Wed, 8 Jul 2009 17:08:53 +0800 Subject: [PATCH] IO APIC: Get rid of apic_pin_trigger - Expend apic_intmapinfo from 16bytes to 32bytes - Add flags field in apic_intmapinfo, which now records irq's trigger mode --- sys/platform/pc32/apic/apic_vector.s | 8 +++----- sys/platform/pc32/apic/mpapic.c | 8 +------- sys/platform/pc32/i386/genassym.c | 4 +++- sys/platform/pc32/include/smp.h | 7 ++++++- 4 files changed, 13 insertions(+), 14 deletions(-) diff --git a/sys/platform/pc32/apic/apic_vector.s b/sys/platform/pc32/apic/apic_vector.s index 166a6e10e3..d04d3b1733 100644 --- a/sys/platform/pc32/apic/apic_vector.s +++ b/sys/platform/pc32/apic/apic_vector.s @@ -84,6 +84,8 @@ CNAME(int_to_apicintpin) + IOAPIC_IM_SIZE * (irq_num) + IOAPIC_IM_ADDR #define REDIRIDX(irq_num) \ CNAME(int_to_apicintpin) + IOAPIC_IM_SIZE * (irq_num) + IOAPIC_IM_ENTIDX +#define IOAPICFLAGS(irq_num) \ + CNAME(int_to_apicintpin) + IOAPIC_IM_SIZE * (irq_num) + IOAPIC_IM_FLAGS #define MASK_IRQ(irq_num) \ APIC_IMASK_LOCK ; /* into critical reg */ \ @@ -103,7 +105,7 @@ * and the EOI cycle would cause redundant INTs to occur. */ #define MASK_LEVEL_IRQ(irq_num) \ - testl $IRQ_LBIT(irq_num), apic_pin_trigger ; \ + testl $IOAPIC_IM_FLAG_LEVEL, IOAPICFLAGS(irq_num) ; \ jz 9f ; /* edge, don't mask */ \ MASK_IRQ(irq_num) ; \ 9: ; \ @@ -529,9 +531,5 @@ started_cpus: CNAME(cpustop_restartfunc): .long 0 - .globl apic_pin_trigger -apic_pin_trigger: - .long 0 - .text diff --git a/sys/platform/pc32/apic/mpapic.c b/sys/platform/pc32/apic/mpapic.c index 5057eb9271..1c0f7ec660 100644 --- a/sys/platform/pc32/apic/mpapic.c +++ b/sys/platform/pc32/apic/mpapic.c @@ -457,9 +457,6 @@ io_apic_get_id(int apic) /* * Setup the IO APIC. */ - -extern int apic_pin_trigger; /* 'opaque' */ - void io_apic_setup_intpin(int apic, int pin) { @@ -545,7 +542,7 @@ io_apic_setup_intpin(int apic, int pin) flags = DEFAULT_FLAGS; level = trigger(apic, pin, &flags); if (level == 1) - apic_pin_trigger |= (1 << irq); + int_to_apicintpin[irq].flags |= IOAPIC_IM_FLAG_LEVEL; polarity(apic, pin, &flags, level); } @@ -591,9 +588,6 @@ io_apic_setup(int apic) int maxpin; int pin; - if (apic == 0) - apic_pin_trigger = 0; /* default to edge-triggered */ - maxpin = REDIRCNT_IOAPIC(apic); /* pins in APIC */ kprintf("Programming %d pins in IOAPIC #%d\n", maxpin, apic); diff --git a/sys/platform/pc32/i386/genassym.c b/sys/platform/pc32/i386/genassym.c index 1be88fec6d..e43d5f3bfe 100644 --- a/sys/platform/pc32/i386/genassym.c +++ b/sys/platform/pc32/i386/genassym.c @@ -237,6 +237,8 @@ ASSYM(VM86_FRAMESIZE, sizeof(struct vm86frame)); #ifdef SMP ASSYM(IOAPIC_IM_ADDR, offsetof(struct apic_intmapinfo, apic_address)); ASSYM(IOAPIC_IM_ENTIDX, offsetof(struct apic_intmapinfo, redirindex)); -ASSYM(IOAPIC_IM_SZSHIFT, IOAPIC_IM_SZSHIFT); +ASSYM(IOAPIC_IM_FLAGS, offsetof(struct apic_intmapinfo, flags)); ASSYM(IOAPIC_IM_SIZE, sizeof(struct apic_intmapinfo)); +ASSYM(IOAPIC_IM_SZSHIFT, IOAPIC_IM_SZSHIFT); +ASSYM(IOAPIC_IM_FLAG_LEVEL, IOAPIC_IM_FLAG_LEVEL); #endif diff --git a/sys/platform/pc32/include/smp.h b/sys/platform/pc32/include/smp.h index 57cf28746c..4a42d02860 100644 --- a/sys/platform/pc32/include/smp.h +++ b/sys/platform/pc32/include/smp.h @@ -76,8 +76,13 @@ struct apic_intmapinfo { int int_pin; volatile void *apic_address; int redirindex; + uint32_t flags; /* IOAPIC_IM_FLAG_ */ + uint32_t pad[3]; }; -#define IOAPIC_IM_SZSHIFT 4 +#define IOAPIC_IM_SZSHIFT 5 + +#define IOAPIC_IM_FLAG_LEVEL 0x1 /* default to edge trigger */ + extern struct apic_intmapinfo int_to_apicintpin[]; extern struct pcb stoppcbs[]; -- 2.11.4.GIT