Add flag to indicate that the NIC does not have power control capability.
[dragonfly.git] / sys / dev / acpica5 / acpi_cpu.c
blob8290dc94329805d6795f74734f064c21d16ae69c
1 /*-
2 * Copyright (c) 2003 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
4 * All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
27 * $FreeBSD: src/sys/dev/acpica/acpi_cpu.c,v 1.41 2004/06/24 00:38:51 njl Exp $
28 * $DragonFly: src/sys/dev/acpica5/acpi_cpu.c,v 1.20 2007/03/21 22:19:00 y0netan1 Exp $
31 #include "opt_acpi.h"
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
36 #include <sys/globaldata.h>
37 #include <sys/power.h>
38 #include <sys/proc.h>
39 #include <sys/sbuf.h>
40 #include <sys/thread2.h>
42 #include <bus/pci/pcivar.h>
43 #include <machine/atomic.h>
44 #include <machine/globaldata.h>
45 #include <machine/md_var.h>
46 #include <machine/smp.h>
47 #include <sys/rman.h>
49 #include "acpi.h"
50 #include "acpivar.h"
53 * Support for ACPI Processor devices, including ACPI 2.0 throttling
54 * and C[1-3] sleep states.
56 * TODO: implement scans of all CPUs to be sure all Cx states are
57 * equivalent.
60 /* Hooks for the ACPI CA debugging infrastructure */
61 #define _COMPONENT ACPI_PROCESSOR
62 ACPI_MODULE_NAME("PROCESSOR")
64 struct acpi_cx {
65 struct resource *p_lvlx; /* Register to read to enter state. */
66 uint32_t type; /* C1-3 (C4 and up treated as C3). */
67 uint32_t trans_lat; /* Transition latency (usec). */
68 uint32_t power; /* Power consumed (mW). */
70 #define MAX_CX_STATES 8
72 struct acpi_cpu_softc {
73 device_t cpu_dev;
74 ACPI_HANDLE cpu_handle;
75 uint32_t acpi_id; /* ACPI processor id */
76 uint32_t cpu_p_blk; /* ACPI P_BLK location */
77 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
78 struct resource *cpu_p_cnt; /* Throttling control register */
79 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
80 int cpu_cx_count; /* Number of valid Cx states. */
81 int cpu_prev_sleep;/* Last idle sleep duration. */
84 #define CPU_GET_REG(reg, width) \
85 (bus_space_read_ ## width(rman_get_bustag((reg)), \
86 rman_get_bushandle((reg)), 0))
87 #define CPU_SET_REG(reg, width, val) \
88 (bus_space_write_ ## width(rman_get_bustag((reg)), \
89 rman_get_bushandle((reg)), 0, (val)))
92 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and
93 * reported to the user in tenths of a percent.
95 static uint32_t cpu_duty_offset;
96 static uint32_t cpu_duty_width;
97 #define CPU_MAX_SPEED (1 << cpu_duty_width)
98 #define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED)
99 #define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \
100 (CPU_SPEED_PERCENT(x) % 10)
101 #define CPU_P_CNT_THT_EN (1<<4)
102 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
104 #define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */
105 #define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */
107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
108 #define CPU_QUIRK_NO_THROTTLE (1<<1) /* Throttling is not usable. */
109 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
111 #define PCI_VENDOR_INTEL 0x8086
112 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
113 #define PCI_REVISION_A_STEP 0
114 #define PCI_REVISION_B_STEP 1
115 #define PCI_REVISION_4E 2
116 #define PCI_REVISION_4M 3
118 /* Platform hardware resource information. */
119 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
120 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
121 static int cpu_rid; /* Driver-wide resource id. */
122 static int cpu_quirks; /* Indicate any hardware bugs. */
124 /* Runtime state. */
125 static int cpu_cx_count; /* Number of valid states */
126 static int cpu_non_c3; /* Index of lowest non-C3 state. */
127 static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
129 /* Values for sysctl. */
130 static uint32_t cpu_throttle_state;
131 static uint32_t cpu_throttle_max;
132 static uint32_t cpu_throttle_performance;
133 static uint32_t cpu_throttle_economy;
134 static int cpu_cx_lowest;
135 static char cpu_cx_supported[64];
137 static device_t *cpu_devices;
138 static int cpu_ndevices;
139 static struct acpi_cpu_softc **cpu_softc;
141 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx;
142 static struct sysctl_oid *acpi_cpu_sysctl_tree;
144 static int acpi_cpu_probe(device_t dev);
145 static int acpi_cpu_attach(device_t dev);
146 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
147 uint32_t *cpu_id);
148 static int acpi_cpu_shutdown(device_t dev);
149 static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc);
150 static void acpi_cpu_power_profile(void *arg);
151 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
152 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
153 static void acpi_cpu_startup(void *arg);
154 static void acpi_cpu_startup_throttling(void);
155 static void acpi_cpu_startup_cx(void);
156 static void acpi_cpu_throttle_set(uint32_t speed);
157 static void acpi_cpu_idle(void);
158 static void acpi_cpu_c1(void);
159 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
160 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc);
161 static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS);
162 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
163 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
165 static device_method_t acpi_cpu_methods[] = {
166 /* Device interface */
167 DEVMETHOD(device_probe, acpi_cpu_probe),
168 DEVMETHOD(device_attach, acpi_cpu_attach),
169 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
171 {0, 0}
174 static driver_t acpi_cpu_driver = {
175 "cpu",
176 acpi_cpu_methods,
177 sizeof(struct acpi_cpu_softc),
180 static devclass_t acpi_cpu_devclass;
181 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
182 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
184 static int
185 acpi_cpu_probe(device_t dev)
187 int acpi_id, cpu_id, cx_count;
188 ACPI_BUFFER buf;
189 ACPI_HANDLE handle;
190 char msg[32];
191 ACPI_OBJECT *obj;
192 ACPI_STATUS status;
194 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
195 return (ENXIO);
197 handle = acpi_get_handle(dev);
198 if (cpu_softc == NULL)
199 cpu_softc = kmalloc(sizeof(struct acpi_cpu_softc *) *
200 SMP_MAXCPU, M_TEMP /* XXX */, M_INTWAIT | M_ZERO);
202 /* Get our Processor object. */
203 buf.Pointer = NULL;
204 buf.Length = ACPI_ALLOCATE_BUFFER;
205 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
206 if (ACPI_FAILURE(status)) {
207 device_printf(dev, "probe failed to get Processor obj - %s\n",
208 AcpiFormatException(status));
209 return (ENXIO);
211 obj = (ACPI_OBJECT *)buf.Pointer;
212 if (obj->Type != ACPI_TYPE_PROCESSOR) {
213 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
214 AcpiOsFree(obj);
215 return (ENXIO);
219 * Find the processor associated with our unit. We could use the
220 * ProcId as a key, however, some boxes do not have the same values
221 * in their Processor object as the ProcId values in the MADT.
223 acpi_id = obj->Processor.ProcId;
224 AcpiOsFree(obj);
225 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
226 return (ENXIO);
229 * Check if we already probed this processor. We scan the bus twice
230 * so it's possible we've already seen this one.
232 if (cpu_softc[cpu_id] != NULL)
233 return (ENXIO);
235 /* Get a count of Cx states for our device string. */
236 cx_count = 0;
237 buf.Pointer = NULL;
238 buf.Length = ACPI_ALLOCATE_BUFFER;
239 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf);
240 if (ACPI_SUCCESS(status)) {
241 obj = (ACPI_OBJECT *)buf.Pointer;
242 if (ACPI_PKG_VALID(obj, 2))
243 acpi_PkgInt32(obj, 0, &cx_count);
244 AcpiOsFree(obj);
245 } else {
246 if (AcpiGbl_FADT.C2Latency <= 100)
247 cx_count++;
248 if (AcpiGbl_FADT.C3Latency <= 1000)
249 cx_count++;
250 if (cx_count > 0)
251 cx_count++;
253 if (cx_count > 0)
254 ksnprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count);
255 else
256 strlcpy(msg, "ACPI CPU", sizeof(msg));
257 device_set_desc_copy(dev, msg);
259 /* Mark this processor as in-use and save our derived id for attach. */
260 cpu_softc[cpu_id] = (void *)1;
261 acpi_set_magic(dev, cpu_id);
263 return (0);
266 static int
267 acpi_cpu_attach(device_t dev)
269 ACPI_BUFFER buf;
270 ACPI_OBJECT *obj;
271 struct acpi_cpu_softc *sc;
272 struct acpi_softc *acpi_sc;
273 ACPI_STATUS status;
274 int thr_ret, cx_ret;
276 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
278 ACPI_ASSERTLOCK;
280 sc = device_get_softc(dev);
281 sc->cpu_dev = dev;
282 sc->cpu_handle = acpi_get_handle(dev);
283 cpu_softc[acpi_get_magic(dev)] = sc;
285 buf.Pointer = NULL;
286 buf.Length = ACPI_ALLOCATE_BUFFER;
287 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
288 if (ACPI_FAILURE(status)) {
289 device_printf(dev, "attach failed to get Processor obj - %s\n",
290 AcpiFormatException(status));
291 return (ENXIO);
293 obj = (ACPI_OBJECT *)buf.Pointer;
294 sc->cpu_p_blk = obj->Processor.PblkAddress;
295 sc->cpu_p_blk_len = obj->Processor.PblkLength;
296 sc->acpi_id = obj->Processor.ProcId;
297 AcpiOsFree(obj);
298 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
299 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
301 acpi_sc = acpi_device_get_parent_softc(dev);
302 sysctl_ctx_init(&acpi_cpu_sysctl_ctx);
303 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx,
304 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree),
305 OID_AUTO, "cpu", CTLFLAG_RD, 0, "");
307 /* If this is the first device probed, check for quirks. */
308 if (device_get_unit(dev) == 0)
309 acpi_cpu_quirks(sc);
312 * Probe for throttling and Cx state support.
313 * If none of these is present, free up unused resources.
315 thr_ret = acpi_cpu_throttle_probe(sc);
316 cx_ret = acpi_cpu_cx_probe(sc);
317 if (thr_ret == 0 || cx_ret == 0) {
318 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
319 acpi_cpu_notify, sc);
320 if (device_get_unit(dev) == 0)
321 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
322 } else {
323 sysctl_ctx_free(&acpi_cpu_sysctl_ctx);
326 return_VALUE (0);
330 * Find the nth present CPU and return its pc_cpuid as well as set the
331 * pc_acpi_id from the most reliable source.
333 static int
334 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
336 struct mdglobaldata *md;
337 uint32_t i;
339 KASSERT(acpi_id != NULL, ("Null acpi_id"));
340 KASSERT(cpu_id != NULL, ("Null cpu_id"));
341 for (i = 0; i < ncpus; i++) {
342 if ((smp_active_mask & (1 << i)) == 0)
343 continue;
344 md = (struct mdglobaldata *)globaldata_find(i);
345 KASSERT(md != NULL, ("no pcpu data for %d", i));
346 if (idx-- == 0) {
348 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
349 * override it with the value from the ASL. Otherwise, if the
350 * two don't match, prefer the MADT-derived value. Finally,
351 * return the pc_cpuid to reference this processor.
353 if (md->gd_acpi_id == 0xffffffff)
354 md->gd_acpi_id = *acpi_id;
355 else if (md->gd_acpi_id != *acpi_id)
356 *acpi_id = md->gd_acpi_id;
357 *cpu_id = md->mi.gd_cpuid;
358 return (0);
362 return (ESRCH);
365 static int
366 acpi_cpu_shutdown(device_t dev)
368 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
370 /* Disable any entry to the idle function. */
371 cpu_cx_count = 0;
373 /* Signal and wait for all processors to exit acpi_cpu_idle(). */
374 #ifdef SMP
375 if (mycpu->gd_cpuid == 0)
376 lwkt_cpusync_simple(0, NULL, NULL);
377 #endif
378 DELAY(1);
380 return_VALUE (0);
383 static int
384 acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc)
386 uint32_t duty_end;
387 ACPI_BUFFER buf;
388 ACPI_OBJECT obj;
389 ACPI_GENERIC_ADDRESS gas;
390 ACPI_STATUS status;
392 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
394 ACPI_ASSERTLOCK;
396 /* Get throttling parameters from the FADT. 0 means not supported. */
397 if (device_get_unit(sc->cpu_dev) == 0) {
398 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
399 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
400 cpu_duty_offset = AcpiGbl_FADT.DutyOffset;
401 cpu_duty_width = AcpiGbl_FADT.DutyWidth;
403 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0)
404 return (ENXIO);
406 /* Validate the duty offset/width. */
407 duty_end = cpu_duty_offset + cpu_duty_width - 1;
408 if (duty_end > 31) {
409 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n");
410 return (ENXIO);
412 if (cpu_duty_offset <= 4 && duty_end >= 4) {
413 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n");
414 return (ENXIO);
418 * If not present, fall back to using the processor's P_BLK to find
419 * the P_CNT register.
421 * Note that some systems seem to duplicate the P_BLK pointer
422 * across multiple CPUs, so not getting the resource is not fatal.
424 buf.Pointer = &obj;
425 buf.Length = sizeof(obj);
426 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf);
427 if (ACPI_SUCCESS(status)) {
428 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) {
429 device_printf(sc->cpu_dev, "_PTC buffer too small\n");
430 return (ENXIO);
432 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas));
433 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
434 if (sc->cpu_p_cnt != NULL) {
435 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n",
436 device_get_unit(sc->cpu_dev)));
440 /* If _PTC not present or other failure, try the P_BLK. */
441 if (sc->cpu_p_cnt == NULL) {
443 * The spec says P_BLK must be 6 bytes long. However, some
444 * systems use it to indicate a fractional set of features
445 * present so we take anything >= 4.
447 if (sc->cpu_p_blk_len < 4)
448 return (ENXIO);
449 gas.Address = sc->cpu_p_blk;
450 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
451 gas.BitWidth = 32;
452 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
453 if (sc->cpu_p_cnt != NULL) {
454 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n",
455 device_get_unit(sc->cpu_dev)));
456 } else {
457 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n");
458 return (ENXIO);
461 cpu_rid++;
463 return (0);
466 static int
467 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
469 ACPI_GENERIC_ADDRESS gas;
470 struct acpi_cx *cx_ptr;
471 int error;
473 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
476 * Bus mastering arbitration control is needed to keep caches coherent
477 * while sleeping in C3. If it's not present but a working flush cache
478 * instruction is present, flush the caches before entering C3 instead.
479 * Otherwise, just disable C3 completely.
481 if (AcpiGbl_FADT.Pm2ControlBlock == 0 || AcpiGbl_FADT.Pm2ControlLength == 0) {
482 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) != 0 &&
483 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
484 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
485 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
486 "acpi_cpu%d: no BM control, using flush cache method\n",
487 device_get_unit(sc->cpu_dev)));
488 } else {
489 cpu_quirks |= CPU_QUIRK_NO_C3;
490 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
491 "acpi_cpu%d: no BM control, C3 not available\n",
492 device_get_unit(sc->cpu_dev)));
497 * First, check for the ACPI 2.0 _CST sleep states object.
498 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3.
500 sc->cpu_cx_count = 0;
501 error = acpi_cpu_cx_cst(sc);
502 if (error != 0) {
503 cx_ptr = sc->cpu_cx_states;
505 /* C1 has been required since just after ACPI 1.0 */
506 cx_ptr->type = ACPI_STATE_C1;
507 cx_ptr->trans_lat = 0;
508 cpu_non_c3 = 0;
509 cx_ptr++;
510 sc->cpu_cx_count++;
513 * The spec says P_BLK must be 6 bytes long. However, some systems
514 * use it to indicate a fractional set of features present so we
515 * take 5 as C2. Some may also have a value of 7 to indicate
516 * another C3 but most use _CST for this (as required) and having
517 * "only" C1-C3 is not a hardship.
519 if (sc->cpu_p_blk_len < 5)
520 goto done;
522 /* Validate and allocate resources for C2 (P_LVL2). */
523 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
524 gas.BitWidth = 8;
525 if (AcpiGbl_FADT.C2Latency <= 100) {
526 gas.Address = sc->cpu_p_blk + 4;
527 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
528 if (cx_ptr->p_lvlx != NULL) {
529 cpu_rid++;
530 cx_ptr->type = ACPI_STATE_C2;
531 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
532 cpu_non_c3 = 1;
533 cx_ptr++;
534 sc->cpu_cx_count++;
537 if (sc->cpu_p_blk_len < 6)
538 goto done;
540 /* Validate and allocate resources for C3 (P_LVL3). */
541 if (AcpiGbl_FADT.C3Latency <= 1000 &&
542 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) {
544 gas.Address = sc->cpu_p_blk + 5;
545 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
546 if (cx_ptr->p_lvlx != NULL) {
547 cpu_rid++;
548 cx_ptr->type = ACPI_STATE_C3;
549 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
550 cx_ptr++;
551 sc->cpu_cx_count++;
556 done:
557 /* If no valid registers were found, don't attach. */
558 if (sc->cpu_cx_count == 0)
559 return (ENXIO);
561 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
562 sc->cpu_prev_sleep = 1000000;
564 return (0);
568 * Parse a _CST package and set up its Cx states. Since the _CST object
569 * can change dynamically, our notify handler may call this function
570 * to clean up and probe the new _CST package.
572 static int
573 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
575 struct acpi_cx *cx_ptr;
576 ACPI_STATUS status;
577 ACPI_BUFFER buf;
578 ACPI_OBJECT *top;
579 ACPI_OBJECT *pkg;
580 uint32_t count;
581 int i;
583 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
585 buf.Pointer = NULL;
586 buf.Length = ACPI_ALLOCATE_BUFFER;
587 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
588 if (ACPI_FAILURE(status))
589 return (ENXIO);
591 /* _CST is a package with a count and at least one Cx package. */
592 top = (ACPI_OBJECT *)buf.Pointer;
593 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
594 device_printf(sc->cpu_dev, "Invalid _CST package\n");
595 AcpiOsFree(buf.Pointer);
596 return (ENXIO);
598 if (count != top->Package.Count - 1) {
599 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n",
600 count, top->Package.Count - 1);
601 count = top->Package.Count - 1;
603 if (count > MAX_CX_STATES) {
604 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
605 count = MAX_CX_STATES;
608 /* Set up all valid states. */
609 sc->cpu_cx_count = 0;
610 cx_ptr = sc->cpu_cx_states;
611 for (i = 0; i < count; i++) {
612 pkg = &top->Package.Elements[i + 1];
613 if (!ACPI_PKG_VALID(pkg, 4) ||
614 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
615 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
616 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
618 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n");
619 continue;
622 /* Validate the state to see if we should use it. */
623 switch (cx_ptr->type) {
624 case ACPI_STATE_C1:
625 cpu_non_c3 = i;
626 cx_ptr++;
627 sc->cpu_cx_count++;
628 continue;
629 case ACPI_STATE_C2:
630 if (cx_ptr->trans_lat > 100) {
631 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
632 "acpi_cpu%d: C2[%d] not available.\n",
633 device_get_unit(sc->cpu_dev), i));
634 continue;
636 cpu_non_c3 = i;
637 break;
638 case ACPI_STATE_C3:
639 default:
640 if (cx_ptr->trans_lat > 1000 ||
641 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
643 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
644 "acpi_cpu%d: C3[%d] not available.\n",
645 device_get_unit(sc->cpu_dev), i));
646 continue;
648 break;
651 #ifdef notyet
652 /* Free up any previous register. */
653 if (cx_ptr->p_lvlx != NULL) {
654 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
655 cx_ptr->p_lvlx = NULL;
657 #endif
659 /* Allocate the control register for C2 or C3. */
660 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx);
661 if (cx_ptr->p_lvlx != NULL) {
662 cpu_rid++;
663 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
664 "acpi_cpu%d: Got C%d - %d latency\n",
665 device_get_unit(sc->cpu_dev), cx_ptr->type,
666 cx_ptr->trans_lat));
667 cx_ptr++;
668 sc->cpu_cx_count++;
671 AcpiOsFree(buf.Pointer);
673 return (0);
677 * Call this *after* all CPUs have been attached.
679 static void
680 acpi_cpu_startup(void *arg)
682 struct acpi_cpu_softc *sc;
683 int count, i;
685 /* Get set of CPU devices */
686 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
689 * Make sure all the processors' Cx counts match. We should probably
690 * also check the contents of each. However, no known systems have
691 * non-matching Cx counts so we'll deal with this later.
693 count = MAX_CX_STATES;
694 for (i = 0; i < cpu_ndevices; i++) {
695 sc = device_get_softc(cpu_devices[i]);
696 count = min(sc->cpu_cx_count, count);
698 cpu_cx_count = count;
700 /* Perform throttling and Cx final initialization. */
701 sc = device_get_softc(cpu_devices[0]);
702 if (sc->cpu_p_cnt != NULL)
703 acpi_cpu_startup_throttling();
704 if (cpu_cx_count > 0)
705 acpi_cpu_startup_cx();
707 /* register performance profile change handler */
708 EVENTHANDLER_REGISTER(power_profile_change, acpi_cpu_power_profile, NULL, 0);
712 * Power profile change hook.
714 * Uses the ACPI lock to avoid reentrancy.
716 static void
717 acpi_cpu_power_profile(void *arg)
719 int state;
720 int speed;
721 ACPI_LOCK_DECL;
723 state = power_profile_get_state();
724 if (state != POWER_PROFILE_PERFORMANCE &&
725 state != POWER_PROFILE_ECONOMY) {
726 return;
729 ACPI_LOCK;
730 switch(state) {
731 case POWER_PROFILE_PERFORMANCE:
732 speed = cpu_throttle_performance;
733 break;
734 case POWER_PROFILE_ECONOMY:
735 speed = cpu_throttle_economy;
736 break;
737 default:
738 speed = cpu_throttle_state;
739 break;
741 if (speed != cpu_throttle_state)
742 acpi_cpu_throttle_set(speed);
743 ACPI_UNLOCK;
747 * Takes the ACPI lock to avoid fighting anyone over the SMI command
748 * port.
750 static void
751 acpi_cpu_startup_throttling(void)
753 ACPI_LOCK_DECL;
755 /* Initialise throttling states */
756 cpu_throttle_max = CPU_MAX_SPEED;
757 cpu_throttle_state = CPU_MAX_SPEED;
758 cpu_throttle_performance = cpu_throttle_max;
759 cpu_throttle_economy = cpu_throttle_performance / 2;
761 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx,
762 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
763 OID_AUTO, "throttle_max", CTLFLAG_RD,
764 &cpu_throttle_max, 0, "maximum CPU speed");
765 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
766 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
767 OID_AUTO, "throttle_state",
768 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state,
769 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed");
772 * Performance/Economy throttle settings
774 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
775 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
776 OID_AUTO, "performance_speed",
777 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_performance,
778 0, acpi_cpu_throttle_sysctl, "I", "performance CPU speed");
779 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
780 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
781 OID_AUTO, "economy_speed",
782 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_economy,
783 0, acpi_cpu_throttle_sysctl, "I", "economy CPU speed");
785 /* Set initial speed to maximum. */
786 ACPI_LOCK;
787 acpi_cpu_throttle_set(cpu_throttle_max);
788 ACPI_UNLOCK;
790 kprintf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), "
791 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1),
792 CPU_SPEED_PRINTABLE(cpu_throttle_state));
795 static void
796 acpi_cpu_startup_cx(void)
798 struct acpi_cpu_softc *sc;
799 struct sbuf sb;
800 int i;
802 sc = device_get_softc(cpu_devices[0]);
803 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN);
804 for (i = 0; i < cpu_cx_count; i++)
805 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
806 sbuf_trim(&sb);
807 sbuf_finish(&sb);
808 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx,
809 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
810 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported,
811 0, "Cx/microsecond values for supported Cx states");
812 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
813 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
814 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
815 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A",
816 "lowest Cx sleep state to use");
817 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
818 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
819 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
820 NULL, 0, acpi_cpu_usage_sysctl, "A",
821 "percent usage for each Cx state");
823 #ifdef notyet
824 /* Signal platform that we can handle _CST notification. */
825 if (cpu_cst_cnt != 0) {
826 ACPI_LOCK;
827 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
828 ACPI_UNLOCK;
830 #endif
832 /* Take over idling from cpu_idle_default_hook(). */
833 if (ncpus == 1)
834 cpu_idle_hook = acpi_cpu_idle;
835 else
836 kprintf("Warning: ACPI idle hook not yet supported for SMP\n");
840 * Set CPUs to the new state.
842 * Must be called with the ACPI lock held.
844 static void
845 acpi_cpu_throttle_set(uint32_t speed)
847 struct acpi_cpu_softc *sc;
848 int i;
849 uint32_t p_cnt, clk_val;
851 ACPI_ASSERTLOCK;
853 /* Iterate over processors */
854 for (i = 0; i < cpu_ndevices; i++) {
855 sc = device_get_softc(cpu_devices[i]);
856 if (sc->cpu_p_cnt == NULL)
857 continue;
859 /* Get the current P_CNT value and disable throttling */
860 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4);
861 p_cnt &= ~CPU_P_CNT_THT_EN;
862 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
864 /* If we're at maximum speed, that's all */
865 if (speed < CPU_MAX_SPEED) {
866 /* Mask the old CLK_VAL off and or-in the new value */
867 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset;
868 p_cnt &= ~clk_val;
869 p_cnt |= (speed << cpu_duty_offset);
871 /* Write the new P_CNT value and then enable throttling */
872 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
873 p_cnt |= CPU_P_CNT_THT_EN;
874 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
876 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev),
877 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed));
879 cpu_throttle_state = speed;
883 * Idle the CPU in the lowest state possible. This function is called with
884 * interrupts disabled. Note that once it re-enables interrupts, a task
885 * switch can occur so do not access shared data (i.e. the softc) after
886 * interrupts are re-enabled.
888 static void
889 acpi_cpu_idle(void)
891 struct acpi_cpu_softc *sc;
892 struct acpi_cx *cx_next;
893 uint32_t start_time, end_time;
894 int bm_active, cx_next_idx, i;
896 /* If disabled, return immediately. */
897 if (cpu_cx_count == 0) {
898 ACPI_ENABLE_IRQS();
899 return;
903 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
904 * since there is no ACPI processor object for this CPU. This occurs
905 * for logical CPUs in the HTT case.
907 sc = cpu_softc[mdcpu->mi.gd_cpuid];
908 if (sc == NULL) {
909 acpi_cpu_c1();
910 return;
914 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
915 * find the lowest state that has a latency less than or equal to
916 * the length of our last sleep.
918 cx_next_idx = cpu_cx_lowest;
919 if (sc->cpu_prev_sleep < 100)
920 for (i = cpu_cx_lowest; i >= 0; i--)
921 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
922 cx_next_idx = i;
923 break;
927 * Check for bus master activity. If there was activity, clear
928 * the bit and use the lowest non-C3 state. Note that the USB
929 * driver polling for new devices keeps this bit set all the
930 * time if USB is loaded.
932 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
933 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
934 if (bm_active != 0) {
935 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
936 cx_next_idx = min(cx_next_idx, cpu_non_c3);
940 /* Select the next state and update statistics. */
941 cx_next = &sc->cpu_cx_states[cx_next_idx];
942 cpu_cx_stats[cx_next_idx]++;
943 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
946 * Execute HLT (or equivalent) and wait for an interrupt. We can't
947 * calculate the time spent in C1 since the place we wake up is an
948 * ISR. Assume we slept one quantum and return.
950 if (cx_next->type == ACPI_STATE_C1) {
951 sc->cpu_prev_sleep = 1000000 / hz;
952 acpi_cpu_c1();
953 return;
957 * For C3, disable bus master arbitration and enable bus master wake
958 * if BM control is available, otherwise flush the CPU cache.
960 if (cx_next->type == ACPI_STATE_C3) {
961 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
962 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1);
963 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
964 } else
965 ACPI_FLUSH_CPU_CACHE();
969 * Read from P_LVLx to enter C2(+), checking time spent asleep.
970 * Use the ACPI timer for measuring sleep time. Since we need to
971 * get the time very close to the CPU start/stop clock logic, this
972 * is the only reliable time source.
974 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock);
975 CPU_GET_REG(cx_next->p_lvlx, 1);
978 * Read the end time twice. Since it may take an arbitrary time
979 * to enter the idle state, the first read may be executed before
980 * the processor has stopped. Doing it again provides enough
981 * margin that we are certain to have a correct value.
983 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
984 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
986 /* Enable bus master arbitration and disable bus master wakeup. */
987 if (cx_next->type == ACPI_STATE_C3 &&
988 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
989 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0);
990 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
993 /* Find the actual time asleep in microseconds, minus overhead. */
994 end_time = acpi_TimerDelta(end_time, start_time);
995 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
996 ACPI_ENABLE_IRQS();
999 /* Put the CPU in C1 in a machine-dependant way. */
1000 static void
1001 acpi_cpu_c1(void)
1003 #ifdef __ia64__
1004 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
1005 #else
1006 splz();
1007 #ifdef SMP
1008 if (!lwkt_runnable())
1009 __asm __volatile("sti; hlt");
1010 else
1011 __asm __volatile("sti; pause");
1012 #else
1013 if (!lwkt_runnable())
1014 __asm __volatile("sti; hlt");
1015 else
1016 __asm __volatile("sti");
1017 #endif
1018 #endif /* !__ia64__ */
1022 * Re-evaluate the _PSS and _CST objects when we are notified that they
1023 * have changed.
1025 * XXX Re-evaluation disabled until locking is done.
1027 static void
1028 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
1030 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
1032 switch (notify) {
1033 case ACPI_CPU_NOTIFY_PERF_STATES:
1034 device_printf(sc->cpu_dev, "Performance states changed\n");
1035 /* acpi_cpu_px_available(sc); */
1036 break;
1037 case ACPI_CPU_NOTIFY_CX_STATES:
1038 device_printf(sc->cpu_dev, "Cx states changed\n");
1039 /* acpi_cpu_cx_cst(sc); */
1040 break;
1041 default:
1042 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify);
1043 break;
1047 static int
1048 acpi_cpu_quirks(struct acpi_cpu_softc *sc)
1052 * C3 on multiple CPUs requires using the expensive flush cache
1053 * instruction.
1055 if (ncpus > 1)
1056 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1058 #ifdef notyet
1059 /* Look for various quirks of the PIIX4 part. */
1060 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1061 if (acpi_dev != NULL) {
1062 switch (pci_get_revid(acpi_dev)) {
1064 * Disable throttling control on PIIX4 A and B-step.
1065 * See specification changes #13 ("Manual Throttle Duty Cycle")
1066 * and #14 ("Enabling and Disabling Manual Throttle"), plus
1067 * erratum #5 ("STPCLK# Deassertion Time") from the January
1068 * 2002 PIIX4 specification update. Note that few (if any)
1069 * mobile systems ever used this part.
1071 case PCI_REVISION_A_STEP:
1072 case PCI_REVISION_B_STEP:
1073 cpu_quirks |= CPU_QUIRK_NO_THROTTLE;
1074 /* FALLTHROUGH */
1076 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1077 * do not report the BMIDE status to the BM status register and
1078 * others have a livelock bug if Type-F DMA is enabled. Linux
1079 * works around the BMIDE bug by reading the BM status directly
1080 * but we take the simpler approach of disabling C3 for these
1081 * parts.
1083 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1084 * Livelock") from the January 2002 PIIX4 specification update.
1085 * Applies to all PIIX4 models.
1087 case PCI_REVISION_4E:
1088 case PCI_REVISION_4M:
1089 cpu_quirks |= CPU_QUIRK_NO_C3;
1090 break;
1091 default:
1092 break;
1095 #endif
1097 return (0);
1100 /* Handle changes in the CPU throttling setting. */
1101 static int
1102 acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS)
1104 uint32_t *argp;
1105 uint32_t arg;
1106 int error;
1107 ACPI_LOCK_DECL;
1109 argp = (uint32_t *)oidp->oid_arg1;
1110 arg = *argp;
1111 error = sysctl_handle_int(oidp, &arg, 0, req);
1113 /* Error or no new value */
1114 if (error != 0 || req->newptr == NULL)
1115 return (error);
1116 if (arg < 1 || arg > cpu_throttle_max)
1117 return (EINVAL);
1119 /* If throttling changed, notify the BIOS of the new rate. */
1120 ACPI_LOCK;
1121 if (*argp != arg) {
1122 *argp = arg;
1123 acpi_cpu_throttle_set(arg);
1125 ACPI_UNLOCK;
1127 return (0);
1130 static int
1131 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1133 struct sbuf sb;
1134 char buf[128];
1135 int i;
1136 uintmax_t fract, sum, whole;
1138 sum = 0;
1139 for (i = 0; i < cpu_cx_count; i++)
1140 sum += cpu_cx_stats[i];
1141 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1142 for (i = 0; i < cpu_cx_count; i++) {
1143 if (sum > 0) {
1144 whole = (uintmax_t)cpu_cx_stats[i] * 100;
1145 fract = (whole % sum) * 100;
1146 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1147 (u_int)(fract / sum));
1148 } else
1149 sbuf_printf(&sb, "0%% ");
1151 sbuf_trim(&sb);
1152 sbuf_finish(&sb);
1153 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1154 sbuf_delete(&sb);
1156 return (0);
1159 static int
1160 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1162 struct acpi_cpu_softc *sc;
1163 char state[8];
1164 int val, error, i;
1166 sc = device_get_softc(cpu_devices[0]);
1167 ksnprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1168 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1169 if (error != 0 || req->newptr == NULL)
1170 return (error);
1171 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1172 return (EINVAL);
1173 val = (int) strtol(state + 1, NULL, 10) - 1;
1174 if (val < 0 || val > cpu_cx_count - 1)
1175 return (EINVAL);
1177 cpu_cx_lowest = val;
1179 /* If not disabling, cache the new lowest non-C3 state. */
1180 cpu_non_c3 = 0;
1181 for (i = cpu_cx_lowest; i >= 0; i--) {
1182 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1183 cpu_non_c3 = i;
1184 break;
1188 /* Reset the statistics counters. */
1189 bzero(cpu_cx_stats, sizeof(cpu_cx_stats));
1191 return (0);